intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH 9/9] drm/i915/display: Drop intel_vrr_vblank_delay and use set_context_latency
Date: Wed, 24 Sep 2025 15:13:13 +0300	[thread overview]
Message-ID: <aNPgWeXReSa7ZRQd@intel.com> (raw)
In-Reply-To: <20250924105129.2771196-10-ankit.k.nautiyal@intel.com>

On Wed, Sep 24, 2025 at 04:21:29PM +0530, Ankit Nautiyal wrote:
> The helper intel_vrr_vblank_delay() was used to keep track of the SCL
> lines + the extra vblank delay required for ICL/TGL.
> This was used to wait for sufficient lines for:
> -push send bit to clear for VRR case
> -evasion to delay the commit.
> 
> For first case we are using safe window scanline wait and with that we
> just need to wait for SCL lines, we do not need to wait for the extra
> vblank delay required for ICL/TGL. For the second case, we actually
> do not need to wait for extra lines before the undelayed vblank, if we
> are already in the safe window.
> 
> To sum up, SCL lines is sufficient for both cases.
> 
> So drop the helper intel_vrr_vblank_delay and just use
> crtc_state->set_context_latency instead.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c    | 4 ++--
>  drivers/gpu/drm/i915/display/intel_vblank.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_vrr.c    | 8 --------
>  drivers/gpu/drm/i915/display/intel_vrr.h    | 1 -
>  4 files changed, 3 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 3cb4c9be146f..c183209d7663 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -128,7 +128,7 @@ static int dsb_vblank_delay(struct intel_atomic_state *state,
>  		 * scanline until the delayed vblank occurs after
>  		 * TRANS_PUSH has been written.
>  		 */
> -		return intel_vrr_vblank_delay(crtc_state) + 1;
> +		return crtc_state->set_context_latency + 1;
>  	else
>  		return intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode);
>  }
> @@ -723,7 +723,7 @@ void intel_dsb_vblank_evade(struct intel_atomic_state *state,
>  		intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT, 0, 0);
>  
>  	if (pre_commit_is_vrr_active(state, crtc)) {
> -		int vblank_delay = intel_vrr_vblank_delay(crtc_state);
> +		int vblank_delay = crtc_state->set_context_latency;
>  
>  		end = intel_vrr_vmin_vblank_start(crtc_state);
>  		start = end - vblank_delay - latency;
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index c15234c1d96e..0b7fcc05e64c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -681,7 +681,7 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
>  		else
>  			evade->vblank_start = intel_vrr_vmax_vblank_start(crtc_state);
>  
> -		vblank_delay = intel_vrr_vblank_delay(crtc_state);
> +		vblank_delay = crtc_state->set_context_latency;
>  	} else {
>  		evade->vblank_start = intel_mode_vblank_start(adjusted_mode);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index e29b4050a9df..6d3f9e3de1f1 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -92,14 +92,6 @@ static int intel_vrr_extra_vblank_delay(struct intel_display *display)
>  	return DISPLAY_VER(display) < 13 ? 1 : 0;
>  }
>  
> -int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state)
> -{
> -	struct intel_display *display = to_intel_display(crtc_state);
> -
> -	return crtc_state->set_context_latency +
> -		intel_vrr_extra_vblank_delay(display);
> -}
> -
>  static int intel_vrr_vmin_flipline_offset(struct intel_display *display)
>  {
>  	/*
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index 239e4f94725c..cfd027118b60 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -35,7 +35,6 @@ int intel_vrr_vmax_vtotal(const struct intel_crtc_state *crtc_state);
>  int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
>  int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
>  int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
> -int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
>  bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-09-24 12:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-24 10:51 [PATCH 0/9] Introduce set_context_latency and refactor VRR/DSB timing logic Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 1/9] drm/i915/psr: s/intel_psr_min_vblank_delay/intel_psr_min_set_context_latency Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 2/9] drm/i915/display: Add set_context_latency to crtc_state Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 3/9] drm/i915/vrr: Use set_context_latency instead of intel_vrr_real_vblank_delay() Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 4/9] drm/i915/vrr: Use SCL for computing guardband Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 5/9] drm/i915/dsb: s/intel_dsb_wait_vblank_delay/intel_dsb_wait_for_delayed_vblank Ankit Nautiyal
2025-09-24 10:51 ` [PATCH 6/9] drm/i915/display: Wait for scl start instead of dsb_wait_vblanks Ankit Nautiyal
2025-09-24 12:11   ` Ville Syrjälä
2025-09-24 14:04     ` Nautiyal, Ankit K
2025-09-24 10:51 ` [PATCH 7/9] drm/i915/reg_defs: Add REG_FIELD_MAX wrapper for FIELD_MAX() Ankit Nautiyal
2025-09-24 12:24   ` Andi Shyti
2025-09-24 14:17     ` Nautiyal, Ankit K
2025-09-24 10:51 ` [PATCH 8/9] drm/i915/vrr: Clamp guardband as per hardware and timing constraints Ankit Nautiyal
2025-09-24 12:04   ` Ville Syrjälä
2025-09-24 14:19     ` Nautiyal, Ankit K
2025-09-24 10:51 ` [PATCH 9/9] drm/i915/display: Drop intel_vrr_vblank_delay and use set_context_latency Ankit Nautiyal
2025-09-24 12:13   ` Ville Syrjälä [this message]
2025-09-24 12:05 ` ✓ i915.CI.BAT: success for Introduce set_context_latency and refactor VRR/DSB timing logic (rev3) Patchwork
2025-09-24 20:35 ` ✗ i915.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aNPgWeXReSa7ZRQd@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=ankit.k.nautiyal@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).