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Verify this during atomic commit check, > while determining if FEC is required for any stream. > > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 ++++ > drivers/gpu/drm/i915/display/intel_vdsc.c | 17 +++++++++++++++++ > drivers/gpu/drm/i915/display/intel_vdsc.h | 1 + > 3 files changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index f2266b2653046..73064829ab3a2 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -833,6 +833,10 @@ static int intel_dp_mst_check_fec_change(struct intel_atomic_state *state, > > if (crtc_state->fec_enable) > fec_pipe_mask |= BIT(crtc->pipe); > + > + /* The only reason to enable FEC on a DP-MST link is DSC. */ > + drm_WARN_ON(display->drm, > + intel_dsc_is_enabled_on_link(crtc_state) != crtc_state->fec_enable); > } > > if (!fec_pipe_mask || mst_pipe_mask == fec_pipe_mask) > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 8e799e225af17..8bd855c25896f 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -35,6 +35,23 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) > return true; > } > > +bool intel_dsc_is_enabled_on_link(const struct intel_crtc_state *crtc_state) > +{ > + if (crtc_state->dsc.compression_enable) > + return true; > + > + /* > + * On links other than DP-MST, the only stream is that tracked by > + * crtc_state, so there is no need to check if DSC is enabled on > + * another stream on the same link. > + */ > + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)) > + return false; > + > + /* The only reason to enable FEC on a DP-MST link is DSC. */ > + return crtc_state->fec_enable; Realized ony now, that on UHBR crtc_state->fec_enable is not set, even though it is enabled (since HW enables FEC on UHBR always explicitly), so that will need another way to determine the DSC enabled state on the link. I'll follow up with that. > +} > + > static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder) > { > struct intel_display *display = to_intel_display(crtc); > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h > index 9e2812f99dd74..c5d7cf9ff6788 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.h > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h > @@ -16,6 +16,7 @@ struct intel_crtc_state; > struct intel_encoder; > > bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); > +bool intel_dsc_is_enabled_on_link(const struct intel_crtc_state *crtc_state); > void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); > void intel_dsc_enable(const struct intel_crtc_state *crtc_state); > void intel_dsc_disable(const struct intel_crtc_state *crtc_state); > -- > 2.49.1 >