[PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[Ankit Nautiyal]

As we move towards using a shorter, optimized guardband, we need to adjust
how the delayed vblank start is computed.

Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
intel_vrr_always_use_vrr_tg() is true.

This also paves way for guardband optimization, by handling the movement of
the crtc_vblank_start for platforms that have VRR TG always active.

v2: Drop the helper and add the adjustment directly to
intel_vrr_compute_guardband(). Ville

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 221b25832e56..5f9b8e5c48be 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -436,7 +436,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
 void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 
 	if (!intel_vrr_possible(crtc_state))
 		return;
@@ -444,6 +444,10 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 	crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
 					intel_vrr_max_guardband(crtc_state));
 
+	if (intel_vrr_always_use_vrr_tg(display))
+		adjusted_mode->crtc_vblank_start  =
+			crtc_state->vrr.vmin - crtc_state->vrr.guardband;
+
 	if (DISPLAY_VER(display) < 13)
 		crtc_state->vrr.pipeline_full =
 			intel_vrr_guardband_to_pipeline_full(crtc_state,
-- 
2.45.2

[PATCH 0/8] Preparatory patches for guardband optimization

[Ankit Nautiyal]

Handle few cases which will need changes when guardband will no longer
be matched to vblank length.
- Fix the vblank_start evaluation.
- Fix PSR wake latency checks wrt to guradband.

Rev 2: PSR went through some changes recently, rebase the patches on latest
PSR changes.

Ankit Nautiyal (8):
  drm/i915/vrr: Use crtc_vsync_start/end for computing
    vrr.vsync_start/end
  drm/i915/vrr:
    s/intel_vrr_compute_config_late/intel_vrr_compute_guardband
  drm/i915/vblank: Add helper to get correct vblank length
  drm/i915/psr: Consider SCL lines when validating vblank for wake
    latency
  drm/i915/display: Check if final vblank is sufficient for PSR features
  drm/i915/vrr: Recompute vblank_start for platforms with always-on VRR
    TG
  drm/i915/display: Add vblank_start adjustment logic for always-on VRR
    TG
  drm/i915/display: Prepare for vblank_delay for LRR

 drivers/gpu/drm/i915/display/intel_ddi.c     |   3 +
 drivers/gpu/drm/i915/display/intel_display.c |  14 +-
 drivers/gpu/drm/i915/display/intel_dp.c      |   9 ++
 drivers/gpu/drm/i915/display/intel_dp.h      |   3 +
 drivers/gpu/drm/i915/display/intel_psr.c     | 153 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_psr.h     |   2 +
 drivers/gpu/drm/i915/display/intel_vblank.c  |  10 ++
 drivers/gpu/drm/i915/display/intel_vblank.h  |   2 +
 drivers/gpu/drm/i915/display/intel_vrr.c     |  26 +++-
 drivers/gpu/drm/i915/display/intel_vrr.h     |   2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c |   3 +-
 11 files changed, 168 insertions(+), 59 deletions(-)

-- 
2.45.2

[PATCH 1/8] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end

[Ankit Nautiyal]

Use adjusted_mode->crtc_vsync_start/end instead of
adjusted_mode->vsync_start while computing vrr.vsync_start/end.
For most modes, these are same but for 3D/stereo modes the
crtc_vsync_start is different than vsync_start.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 190c51be5cbc..4bc14b5e685f 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -394,10 +394,10 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 	if (HAS_AS_SDP(display)) {
 		crtc_state->vrr.vsync_start =
 			(crtc_state->hw.adjusted_mode.crtc_vtotal -
-			 crtc_state->hw.adjusted_mode.vsync_start);
+			 crtc_state->hw.adjusted_mode.crtc_vsync_start);
 		crtc_state->vrr.vsync_end =
 			(crtc_state->hw.adjusted_mode.crtc_vtotal -
-			 crtc_state->hw.adjusted_mode.vsync_end);
+			 crtc_state->hw.adjusted_mode.crtc_vsync_end);
 	}
 }
 
-- 
2.45.2

[PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband

[Ankit Nautiyal]

The helper intel_vrr_compute_config_late() practically just computes the
guardband. Rename intel_vrr_compute_config_late() to
intel_vrr_compute_guardband().

Since we are going to compute the guardband and then move the
vblank_start for optmizing guardband move it to
intel_crtc_compute_config() which handles such changes.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
 drivers/gpu/drm/i915/display/intel_vrr.c     | 2 +-
 drivers/gpu/drm/i915/display/intel_vrr.h     | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b57efd870774..cd499e58bed3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2414,6 +2414,8 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
 	if (ret)
 		return ret;
 
+	intel_vrr_compute_guardband(crtc_state);
+
 	ret = intel_dpll_crtc_compute_clock(state, crtc);
 	if (ret)
 		return ret;
@@ -4722,8 +4724,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
 	struct drm_connector *connector;
 	int i;
 
-	intel_vrr_compute_config_late(crtc_state);
-
 	for_each_new_connector_in_state(&state->base, connector,
 					conn_state, i) {
 		struct intel_encoder *encoder =
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4bc14b5e685f..8d71d7dc9d12 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -433,7 +433,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
 		   intel_vrr_max_vblank_guardband(crtc_state));
 }
 
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
+void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 7317f8730089..bc9044621635 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -21,7 +21,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
 void intel_vrr_check_modeset(struct intel_atomic_state *state);
 void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			      struct drm_connector_state *conn_state);
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
+void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
 void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
 void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
 void intel_vrr_send_push(struct intel_dsb *dsb,
-- 
2.45.2

[PATCH 3/8] drm/i915/vblank: Add helper to get correct vblank length

[Ankit Nautiyal]

Currently crtc_vblank_start is assumed to be the vblank_start for the fixed
refresh rate case. That value can be different from the variable refresh
rate case whenever always_use_vrr_tg()==false. On icl/tgl it's always
different due to the extra vblank delay, and also on adl+ it could be
different if we were to use an optimized guardband.

So places where crtc_vblank_start is used to compute vblank length needs
change so as to account for cases where vrr is enabled. Specifically
with vrr.enable the effective vblank length is actually guardband.

Add a helper to get the correct vblank length for both vrr and fixed
refresh rate cases. Use this helper where vblank_start is used to
compute the vblank length.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c  | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_vblank.h  |  2 ++
 drivers/gpu/drm/i915/display/skl_watermark.c |  3 ++-
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 0b7fcc05e64c..2fc0c1c0bb87 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -767,3 +767,13 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
 
 	return scanline;
 }
+
+int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state)
+{
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+
+	if (crtc_state->vrr.enable)
+		return crtc_state->vrr.guardband;
+	else
+		return adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h
index 21fbb08d61d5..98d04cacd65f 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.h
+++ b/drivers/gpu/drm/i915/display/intel_vblank.h
@@ -48,4 +48,6 @@ const struct intel_crtc_state *
 intel_pre_commit_crtc_state(struct intel_atomic_state *state,
 			    struct intel_crtc *crtc);
 
+int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state);
+
 #endif /* __INTEL_VBLANK_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9df9ee137bf9..06e5e6c77d2e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -28,6 +28,7 @@
 #include "intel_flipq.h"
 #include "intel_pcode.h"
 #include "intel_plane.h"
+#include "intel_vblank.h"
 #include "intel_wm.h"
 #include "skl_universal_plane_regs.h"
 #include "skl_watermark.h"
@@ -2241,7 +2242,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
 		scaler_prefill_latency(crtc_state) +
 		dsc_prefill_latency(crtc_state) +
 		wm0_lines >
-		adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
+		intel_crtc_vblank_length(crtc_state);
 }
 
 static int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
-- 
2.45.2

[PATCH 4/8] drm/i915/psr: Consider SCL lines when validating vblank for wake latency

[Ankit Nautiyal]

Panel Replay and PSR2 selective update require sufficient vblank duration
to accommodate wake latencies. However, the current
wake_lines_fit_into_vblank() logic does not account for the minimum
Set Context Latency (SCL) lines.

Separate out _intel_psr_min_set_context_latency() to compute the minimum
SCL requirement based on platform and feature usage.

The alpm_config_valid() helper is updated to pass the necessary context for
determining whether Panel Replay or PSR2 selective update is enabled.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 102 ++++++++++++++---------
 1 file changed, 61 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2131473cead6..212bd244beed 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1361,14 +1361,64 @@ static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
 	return entry_setup_frames;
 }
 
+static
+int _intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state,
+				       bool needs_panel_replay,
+				       bool needs_sel_update)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+
+	if (!crtc_state->has_psr)
+		return 0;
+
+	/* Wa_14015401596 */
+	if (intel_vrr_possible(crtc_state) && IS_DISPLAY_VER(display, 13, 14))
+		return 1;
+
+	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
+	if (DISPLAY_VER(display) < 20)
+		return 0;
+
+	/*
+	 * Comment on SRD_STATUS register in Bspec for LunarLake and onwards:
+	 *
+	 * To deterministically capture the transition of the state machine
+	 * going from SRDOFFACK to IDLE, the delayed V. Blank should be at least
+	 * one line after the non-delayed V. Blank.
+	 *
+	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
+	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[ VRR Vmax ]
+	 * - TRANS_VTOTAL[ Vertical Active ])
+	 *
+	 * SRD_STATUS is used only by PSR1 on PantherLake.
+	 * SRD_STATUS is used by PSR1 and Panel Replay DP on LunarLake.
+	 */
+
+	if (DISPLAY_VER(display) >= 30 && (needs_panel_replay ||
+					   needs_sel_update))
+		return 0;
+	else if (DISPLAY_VER(display) < 30 && (needs_sel_update ||
+					       intel_crtc_has_type(crtc_state,
+								   INTEL_OUTPUT_EDP)))
+		return 0;
+	else
+		return 1;
+}
+
 static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
 				       const struct intel_crtc_state *crtc_state,
-				       bool aux_less)
+				       bool aux_less,
+				       bool needs_sel_update,
+				       bool needs_panel_replay)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
 		crtc_state->hw.adjusted_mode.crtc_vblank_start;
 	int wake_lines;
+	int scl = _intel_psr_min_set_context_latency(crtc_state,
+						     needs_sel_update,
+						     needs_panel_replay);
+	vblank -= scl;
 
 	if (aux_less)
 		wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
@@ -1390,7 +1440,9 @@ static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
 
 static bool alpm_config_valid(struct intel_dp *intel_dp,
 			      struct intel_crtc_state *crtc_state,
-			      bool aux_less)
+			      bool aux_less,
+			      bool needs_sel_update,
+			      bool needs_panel_replay)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 
@@ -1400,7 +1452,8 @@ static bool alpm_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state, aux_less)) {
+	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state, aux_less,
+					needs_sel_update, needs_panel_replay)) {
 		drm_dbg_kms(display->drm,
 			    "PSR2/Panel Replay not enabled, too short vblank time\n");
 		return false;
@@ -1492,7 +1545,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!alpm_config_valid(intel_dp, crtc_state, false))
+	if (!alpm_config_valid(intel_dp, crtc_state, false, true, crtc_state->has_panel_replay))
 		return false;
 
 	if (!crtc_state->enable_psr2_sel_fetch &&
@@ -1643,7 +1696,7 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!alpm_config_valid(intel_dp, crtc_state, true))
+	if (!alpm_config_valid(intel_dp, crtc_state, true, false, true))
 		return false;
 
 	return true;
@@ -2371,43 +2424,10 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
  */
 int intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state)
 {
-	struct intel_display *display = to_intel_display(crtc_state);
-
-	if (!crtc_state->has_psr)
-		return 0;
-
-	/* Wa_14015401596 */
-	if (intel_vrr_possible(crtc_state) && IS_DISPLAY_VER(display, 13, 14))
-		return 1;
-
-	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
-	if (DISPLAY_VER(display) < 20)
-		return 0;
 
-	/*
-	 * Comment on SRD_STATUS register in Bspec for LunarLake and onwards:
-	 *
-	 * To deterministically capture the transition of the state machine
-	 * going from SRDOFFACK to IDLE, the delayed V. Blank should be at least
-	 * one line after the non-delayed V. Blank.
-	 *
-	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
-	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[ VRR Vmax ]
-	 * - TRANS_VTOTAL[ Vertical Active ])
-	 *
-	 * SRD_STATUS is used only by PSR1 on PantherLake.
-	 * SRD_STATUS is used by PSR1 and Panel Replay DP on LunarLake.
-	 */
-
-	if (DISPLAY_VER(display) >= 30 && (crtc_state->has_panel_replay ||
-					   crtc_state->has_sel_update))
-		return 0;
-	else if (DISPLAY_VER(display) < 30 && (crtc_state->has_sel_update ||
-					       intel_crtc_has_type(crtc_state,
-								   INTEL_OUTPUT_EDP)))
-		return 0;
-	else
-		return 1;
+	return _intel_psr_min_set_context_latency(crtc_state,
+						  crtc_state->has_panel_replay,
+						  crtc_state->has_sel_update);
 }
 
 static u32 man_trk_ctl_enable_bit_get(struct intel_display *display)
-- 
2.45.2

[PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features

[Ankit Nautiyal]

Currently, wake line latency checks rely on the vblank length,
which does not account for either the extra vblank delay for icl/tgl or for
the optimized guardband which will come into picture later at some point.

Introduce intel_dp_compute_config_late() to handle late-stage
configuration checks for DP/eDP features. For now, it validates whether the
final vblank (with extra vblank delay) or guardband is sufficient to
support wake line latencies required by Panel Replay and PSR2 selective
update.

Check if vblank is sufficient for PSR features, and disable them if their
wake requirements cannot be accomodated.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  3 ++
 drivers/gpu/drm/i915/display/intel_dp.c  |  9 +++++
 drivers/gpu/drm/i915/display/intel_dp.h  |  3 ++
 drivers/gpu/drm/i915/display/intel_psr.c | 51 ++++++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_psr.h |  2 +
 5 files changed, 60 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c09aa759f4d4..94c593bbedf4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4560,6 +4560,9 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
 	struct drm_connector *connector = conn_state->connector;
 	u8 port_sync_transcoders = 0;
 
+	if (intel_crtc_has_dp_encoder(crtc_state))
+		intel_dp_compute_config_late(encoder, crtc_state, conn_state);
+
 	drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
 		    encoder->base.base.id, encoder->base.name,
 		    crtc_state->uapi.crtc->base.id, crtc_state->uapi.crtc->name);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a723e846321f..e481ff4c4959 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct intel_display *display)
 		}
 	}
 }
+
+void intel_dp_compute_config_late(struct intel_encoder *encoder,
+				  struct intel_crtc_state *crtc_state,
+				  struct drm_connector_state *conn_state)
+{
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+	intel_psr_compute_config_late(intel_dp, crtc_state);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index b379443e0211..0d9573ca44cb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
 int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
 void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
 bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
+void intel_dp_compute_config_late(struct intel_encoder *encoder,
+				  struct intel_crtc_state *crtc_state,
+				  struct drm_connector_state *conn_state);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 212bd244beed..dcab4127b399 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1405,6 +1405,20 @@ int _intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state
 		return 1;
 }
 
+static bool _wake_lines_fit_into_vblank(const struct intel_crtc_state *crtc_state,
+					int vblank,
+					int wake_lines)
+{
+	if (crtc_state->req_psr2_sdp_prior_scanline)
+		vblank -= 1;
+
+	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
+	if (vblank < wake_lines)
+		return false;
+
+	return true;
+}
+
 static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
 				       const struct intel_crtc_state *crtc_state,
 				       bool aux_less,
@@ -1428,14 +1442,7 @@ static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
 					       crtc_state->alpm_state.fast_wake_lines) :
 			crtc_state->alpm_state.io_wake_lines;
 
-	if (crtc_state->req_psr2_sdp_prior_scanline)
-		vblank -= 1;
-
-	/* Vblank >= PSR2_CTL Block Count Number maximum line count */
-	if (vblank < wake_lines)
-		return false;
-
-	return true;
+	return _wake_lines_fit_into_vblank(crtc_state, vblank, wake_lines);
 }
 
 static bool alpm_config_valid(struct intel_dp *intel_dp,
@@ -4346,3 +4353,31 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 {
 	return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
 }
+
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+				   struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+	int vblank = intel_crtc_vblank_length(crtc_state);
+	int aux_less_wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
+	int wake_lines = DISPLAY_VER(display) < 20 ?
+			 psr2_block_count_lines(crtc_state->alpm_state.io_wake_lines,
+						crtc_state->alpm_state.fast_wake_lines) :
+			 crtc_state->alpm_state.io_wake_lines;
+
+	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state) &&
+	    !_wake_lines_fit_into_vblank(crtc_state, vblank, aux_less_wake_lines)) {
+		drm_dbg_kms(display->drm,
+			    "Disabling Panel replay: vblank insufficient for wakelines = %d\n",
+			    aux_less_wake_lines);
+		crtc_state->has_panel_replay = false;
+	}
+
+	if (crtc_state->has_sel_update &&
+	    !_wake_lines_fit_into_vblank(crtc_state, vblank, wake_lines)) {
+		drm_dbg_kms(display->drm,
+			    "Disabling Selective Update: vblank insufficient for wakelines = %d\n",
+			    wake_lines);
+		crtc_state->has_sel_update = false;
+	}
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 9147996d6c9e..b17ce312dc37 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct intel_display *display);
 bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 				   const struct intel_crtc_state *crtc_state);
+void intel_psr_compute_config_late(struct intel_dp *intel_dp,
+				   struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_PSR_H__ */
-- 
2.45.2

[PATCH 6/8] drm/i915/vrr: Recompute vblank_start for platforms with always-on VRR TG

[Ankit Nautiyal]

Currently, crtc_vblank_start is read from either the VBLANK_START register
(on pre-ADL platforms) or computed as vdisplay + set_context_latency in
intel_get_transcoder_timings().

This works when the entire vblank region after vdisplay is treated as
guardband, i.e.:
delayed vblank start = vdisplay + SCL = vtotal - guardband.

However, with optimized guardband, the guardband becomes shorter, and the
delayed vblank_start moves further away from vdisplay.

For platforms where intel_vrr_always_use_vrr_tg == false, the delayed
vblank start is only relevant in VRR mode. We retain the original
crtc_vblank_start and apply adjustments in VRR-specific paths. Evasion
logic, push clear already use vtotal - guardband directly for VRR case.

On platforms where intel_vrr_always_use_vrr_tg == true, the delayed
vblank_start is used in both fixed and VRR modes. So we need to change the
crtc_vblank_start so that fixed rr case works properly.

Therefore for the readout, we need to overwrite crtc_vblank_start
with vtotal - guardband to ensure correct behavior across both modes.

This change prepares the pipeline for optimized guardband usage by ensuring
crtc_vblank_start reflects the correct timing on platforms with always-on
VRR TG.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8d71d7dc9d12..221b25832e56 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -821,6 +821,20 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 	 */
 	if (crtc_state->vrr.enable)
 		crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+	/*
+	 * For platforms that always use the VRR timing generator, we overwrite
+	 * crtc_vblank_start with vtotal - guardband to reflect the delayed
+	 * vblank start. This works for both default and optimized guardband values.
+	 * On other platforms, we keep the original value from
+	 * intel_get_transcoder_timings() and apply adjustments only in VRR-specific
+	 * paths as needed.
+	 */
+	if (intel_vrr_always_use_vrr_tg(display))
+		crtc_state->hw.adjusted_mode.crtc_vblank_start =
+			crtc_state->hw.adjusted_mode.crtc_vtotal -
+			crtc_state->vrr.guardband;
+
 }
 
 int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)
-- 
2.45.2

[PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[Ankit Nautiyal]

As we move towards using a shorter, optimized guardband, we need to adjust
how the delayed vblank start is computed.

Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
intel_vrr_always_use_vrr_tg() is true.

This also paves way for guardband optimization, by handling the movement of
the crtc_vblank_start for platforms that have VRR TG always active.

v2: Drop the helper and add the adjustment directly to
intel_vrr_compute_guardband(). Ville

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 221b25832e56..5f9b8e5c48be 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -436,7 +436,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
 void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 
 	if (!intel_vrr_possible(crtc_state))
 		return;
@@ -444,6 +444,10 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 	crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
 					intel_vrr_max_guardband(crtc_state));
 
+	if (intel_vrr_always_use_vrr_tg(display))
+		adjusted_mode->crtc_vblank_start  =
+			crtc_state->vrr.vmin - crtc_state->vrr.guardband;
+
 	if (DISPLAY_VER(display) < 13)
 		crtc_state->vrr.pipeline_full =
 			intel_vrr_guardband_to_pipeline_full(crtc_state,
-- 
2.45.2

[PATCH 8/8] drm/i915/display: Prepare for vblank_delay for LRR

[Ankit Nautiyal]

Update allow_vblank_delay_fastset() to permit vblank delay adjustments
during with LRR when VRR TG is always active.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index cd499e58bed3..1426218c01d2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4958,9 +4958,15 @@ static bool allow_vblank_delay_fastset(const struct intel_crtc_state *old_crtc_s
 	 * Allow fastboot to fix up vblank delay (handled via LRR
 	 * codepaths), a bit dodgy as the registers aren't
 	 * double buffered but seems to be working more or less...
+	 *
+	 * Also allow this when the VRR timing generator is always on,
+	 * and optimized guardband is used. In such cases,
+	 * vblank delay may vary even without inherited state, but it's
+	 * still safe as VRR guardband is still same.
 	 */
-	return HAS_LRR(display) && old_crtc_state->inherited &&
-		!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI);
+	return HAS_LRR(display) &&
+	       (old_crtc_state->inherited || intel_vrr_always_use_vrr_tg(display)) &&
+	       !intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI);
 }
 
 bool
-- 
2.45.2

✓ i915.CI.BAT: success for Preparatory patches for guardband optimization (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4759 bytes --]

== Series Details ==

Series: Preparatory patches for guardband optimization (rev2)
URL   : https://patchwork.freedesktop.org/series/155661/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_17329 -> Patchwork_155661v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/index.html

Participating hosts (44 -> 43)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_155661v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@dmabuf@all-tests@dma_fence_chain:
    - fi-bsw-n3050:       [PASS][1] -> [ABORT][2] ([i915#12904]) +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html

  * igt@i915_selftest@live@workarounds:
    - bat-mtlp-6:         [PASS][3] -> [DMESG-FAIL][4] ([i915#12061]) +1 other test dmesg-fail
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
    - bat-dg2-9:          [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-dg2-9/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-dg2-9/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@i915_selftest@live:
    - bat-mtlp-8:         [DMESG-FAIL][7] ([i915#12061]) -> [PASS][8] +1 other test pass
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-mtlp-8/igt@i915_selftest@live.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-mtlp-8/igt@i915_selftest@live.html
    - bat-jsl-1:          [DMESG-FAIL][9] ([i915#14808]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-jsl-1/igt@i915_selftest@live.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-jsl-1/igt@i915_selftest@live.html

  * igt@i915_selftest@live@client:
    - bat-dg2-11:         [INCOMPLETE][11] ([i915#14201]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-dg2-11/igt@i915_selftest@live@client.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-dg2-11/igt@i915_selftest@live@client.html

  
#### Warnings ####

  * igt@i915_selftest@live:
    - bat-dg2-11:         [INCOMPLETE][13] ([i915#12061] / [i915#14818]) -> [DMESG-FAIL][14] ([i915#12061])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-dg2-11/igt@i915_selftest@live.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-dg2-11/igt@i915_selftest@live.html
    - bat-atsm-1:         [DMESG-FAIL][15] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][16] ([i915#12061] / [i915#13929])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-atsm-1/igt@i915_selftest@live.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-atsm-1/igt@i915_selftest@live.html

  * igt@i915_selftest@live@mman:
    - bat-atsm-1:         [DMESG-FAIL][17] ([i915#14204]) -> [DMESG-FAIL][18] ([i915#13929])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/bat-atsm-1/igt@i915_selftest@live@mman.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/bat-atsm-1/igt@i915_selftest@live@mman.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
  [i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
  [i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201
  [i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
  [i915#14808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14808
  [i915#14818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14818


Build changes
-------------

  * Linux: CI_DRM_17329 -> Patchwork_155661v2

  CI-20190529: 20190529
  CI_DRM_17329: e4621fd776939016f32f5585b188429d68e5ae5b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8580: 8580
  Patchwork_155661v2: e4621fd776939016f32f5585b188429d68e5ae5b @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/index.html

[-- Attachment #2: Type: text/html, Size: 6099 bytes --]

✗ i915.CI.Full: failure for Preparatory patches for guardband optimization (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 152455 bytes --]

== Series Details ==

Series: Preparatory patches for guardband optimization (rev2)
URL   : https://patchwork.freedesktop.org/series/155661/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17329_full -> Patchwork_155661v2_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_155661v2_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_155661v2_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 11)
------------------------------

  Missing    (1): shard-snb-0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_155661v2_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-10/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-3.html

  
#### Warnings ####

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-dg2:          [SKIP][2] ([i915#3555] / [i915#8228]) -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-7/igt@kms_hdr@bpc-switch-suspend.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-10/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [FAIL][4] ([i915#9295]) -> [SKIP][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-tglu-2/igt@kms_pm_dc@dc6-dpms.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-6/igt@kms_pm_dc@dc6-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_155661v2_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-dg2:          NOTRUN -> [SKIP][6] ([i915#8411])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@api_intel_bb@object-noreloc-keep-cache-simple:
    - shard-snb:          NOTRUN -> [SKIP][7] +68 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb4/igt@api_intel_bb@object-noreloc-keep-cache-simple.html

  * igt@drm_buddy@drm_buddy:
    - shard-tglu:         NOTRUN -> [DMESG-WARN][8] ([i915#15095])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@drm_buddy@drm_buddy.html

  * igt@fbdev@unaligned-write:
    - shard-rkl:          [PASS][9] -> [SKIP][10] ([i915#14544] / [i915#2582]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@fbdev@unaligned-write.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@fbdev@unaligned-write.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][11] ([i915#3936])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_busy@semaphore.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][12] ([i915#9323])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-rkl:          NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          [PASS][14] -> [INCOMPLETE][15] ([i915#12392] / [i915#13356])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-1/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg2:          NOTRUN -> [SKIP][16] ([i915#8562])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_freq@sysfs:
    - shard-dg2-9:        NOTRUN -> [FAIL][17] ([i915#9561]) +1 other test fail
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_ctx_freq@sysfs.html

  * igt@gem_ctx_persistence@heartbeat-hostile:
    - shard-dg2-9:        NOTRUN -> [SKIP][18] ([i915#8555])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_ctx_persistence@heartbeat-hostile.html

  * igt@gem_ctx_persistence@heartbeat-stop:
    - shard-dg2:          NOTRUN -> [SKIP][19] ([i915#8555])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_ctx_persistence@heartbeat-stop.html

  * igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
    - shard-snb:          NOTRUN -> [SKIP][20] ([i915#1099])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb4/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-mtlp:         NOTRUN -> [SKIP][21] ([i915#280])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-rkl:          NOTRUN -> [SKIP][22] ([i915#4525])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_fence@submit3:
    - shard-dg2:          NOTRUN -> [SKIP][23] ([i915#4812])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_fence@submit67:
    - shard-dg2-9:        NOTRUN -> [SKIP][24] ([i915#4812])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-mtlp:         NOTRUN -> [SKIP][25] ([i915#3711])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-dg2-9:        NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#3539] / [i915#4852])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][28] ([i915#3281]) +7 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-range-active:
    - shard-mtlp:         NOTRUN -> [SKIP][29] ([i915#3281]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_exec_reloc@basic-range-active.html

  * igt@gem_exec_reloc@basic-write-cpu:
    - shard-dg2-9:        NOTRUN -> [SKIP][30] ([i915#3281])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_exec_reloc@basic-write-cpu.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-rkl:          NOTRUN -> [SKIP][31] ([i915#3281]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_fence_thrash@bo-write-verify-threaded-none:
    - shard-rkl:          [PASS][32] -> [DMESG-WARN][33] ([i915#12964]) +19 other tests dmesg-warn
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_fence_thrash@bo-write-verify-threaded-none.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_fence_thrash@bo-write-verify-threaded-none.html
    - shard-dg2-9:        NOTRUN -> [SKIP][34] ([i915#4860]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_fence_thrash@bo-write-verify-threaded-none.html

  * igt@gem_fenced_exec_thrash@2-spare-fences:
    - shard-mtlp:         NOTRUN -> [SKIP][35] ([i915#4860])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_fenced_exec_thrash@2-spare-fences.html

  * igt@gem_huc_copy@huc-copy:
    - shard-glk:          NOTRUN -> [SKIP][36] ([i915#2190])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk3/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
    - shard-mtlp:         NOTRUN -> [SKIP][37] ([i915#4613])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_lmem_swapping@heavy-verify-multi.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-tglu-1:       NOTRUN -> [SKIP][38] ([i915#4613])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          [PASS][39] -> [TIMEOUT][40] ([i915#5493]) +1 other test timeout
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-1/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-7/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][41] ([i915#4613]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-tglu:         NOTRUN -> [SKIP][42] ([i915#4613])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_mmap_gtt@big-bo-tiledx:
    - shard-dg2-9:        NOTRUN -> [SKIP][43] ([i915#4077]) +5 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_mmap_gtt@big-bo-tiledx.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-xy:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#4077]) +2 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html

  * igt@gem_mmap_wc@bad-size:
    - shard-dg2-9:        NOTRUN -> [SKIP][45] ([i915#4083]) +2 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_mmap_wc@bad-size.html

  * igt@gem_mmap_wc@copy:
    - shard-dg2:          NOTRUN -> [SKIP][46] ([i915#4083]) +6 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@gem_mmap_wc@copy.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-display:
    - shard-rkl:          NOTRUN -> [SKIP][47] ([i915#3282]) +3 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gem_partial_pwrite_pread@writes-after-reads-display.html

  * igt@gem_pread@display:
    - shard-mtlp:         NOTRUN -> [SKIP][48] ([i915#3282])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_pread@display.html

  * igt@gem_pread@exhaustion:
    - shard-dg2:          NOTRUN -> [SKIP][49] ([i915#3282]) +3 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_pread@exhaustion.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-tglu:         NOTRUN -> [WARN][50] ([i915#2658])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@create-protected-buffer:
    - shard-dg2:          NOTRUN -> [SKIP][51] ([i915#4270]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@gem_pxp@create-protected-buffer.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-tglu-1:       NOTRUN -> [SKIP][52] ([i915#13398])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
    - shard-rkl:          [PASS][53] -> [SKIP][54] ([i915#14544] / [i915#4270])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_pxp@regular-baseline-src-copy-readible.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_pxp@regular-baseline-src-copy-readible.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-rkl:          NOTRUN -> [TIMEOUT][55] ([i915#12917] / [i915#12964]) +1 other test timeout
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
    - shard-rkl:          [PASS][56] -> [TIMEOUT][57] ([i915#12917] / [i915#12964]) +1 other test timeout
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][58] ([i915#5190] / [i915#8428]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-dg2-9:        NOTRUN -> [SKIP][59] ([i915#5190] / [i915#8428])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-dg2:          NOTRUN -> [SKIP][60] ([i915#4079])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
    - shard-rkl:          NOTRUN -> [SKIP][61] ([i915#8411])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_tiled_blits@basic:
    - shard-dg2:          NOTRUN -> [SKIP][62] ([i915#4077]) +7 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gem_tiled_blits@basic.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#3297]) +4 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-mtlp:         NOTRUN -> [SKIP][64] ([i915#3297])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-dg2-9:        NOTRUN -> [SKIP][65] ([i915#3297] / [i915#4880])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][66] ([i915#3297]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-glk:          NOTRUN -> [INCOMPLETE][67] ([i915#13356])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk3/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen7_exec_parse@cmd-crossing-page:
    - shard-dg2-9:        NOTRUN -> [SKIP][68] +4 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gen7_exec_parse@cmd-crossing-page.html

  * igt@gen9_exec_parse@basic-rejected:
    - shard-tglu:         NOTRUN -> [SKIP][69] ([i915#2527] / [i915#2856]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@gen9_exec_parse@basic-rejected.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-tglu-1:       NOTRUN -> [SKIP][70] ([i915#2527] / [i915#2856]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-rkl:          NOTRUN -> [SKIP][71] ([i915#2527]) +2 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-dg2:          NOTRUN -> [SKIP][72] ([i915#2856]) +2 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@gen9_exec_parse@secure-batches.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-dg2-9:        NOTRUN -> [SKIP][73] ([i915#2856]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@gen9_exec_parse@shadow-peek.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-mtlp:         NOTRUN -> [SKIP][74] ([i915#2856])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@gen9_exec_parse@unaligned-access.html

  * igt@i915_drm_fdinfo@busy-check-all@bcs0:
    - shard-dg2-9:        NOTRUN -> [SKIP][75] ([i915#11527]) +7 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@i915_drm_fdinfo@busy-check-all@bcs0.html

  * igt@i915_drm_fdinfo@virtual-busy-idle-all:
    - shard-dg2:          NOTRUN -> [SKIP][76] ([i915#14118]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@i915_drm_fdinfo@virtual-busy-idle-all.html

  * igt@i915_module_load@reload-no-display:
    - shard-snb:          [PASS][77] -> [DMESG-WARN][78] ([i915#14545])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-snb1/igt@i915_module_load@reload-no-display.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb7/igt@i915_module_load@reload-no-display.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-tglu-1:       NOTRUN -> [SKIP][79] ([i915#6590]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-rkl:          [PASS][80] -> [FAIL][81] ([i915#12942]) +1 other test fail
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#14498])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@i915_pm_rps@thresholds:
    - shard-dg2-9:        NOTRUN -> [SKIP][83] ([i915#11681])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@i915_pm_rps@thresholds.html

  * igt@i915_power@sanity:
    - shard-mtlp:         [PASS][84] -> [SKIP][85] ([i915#7984])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-mtlp-4/igt@i915_power@sanity.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-5/igt@i915_power@sanity.html

  * igt@i915_selftest@live@workarounds:
    - shard-dg2:          NOTRUN -> [DMESG-FAIL][86] ([i915#12061]) +1 other test dmesg-fail
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@i915_selftest@live@workarounds.html

  * igt@i915_suspend@sysfs-reader:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][87] ([i915#4817])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk10/igt@i915_suspend@sysfs-reader.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - shard-dg2:          NOTRUN -> [SKIP][88] ([i915#4212]) +2 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-dg1:          [PASS][89] -> [FAIL][90] ([i915#14888])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-13/igt@kms_async_flips@alternate-sync-async-flip.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-14/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [FAIL][91] ([i915#14888])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-14/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-hdmi-a-4.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][92] ([i915#1769] / [i915#3555])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-dg2-9:        NOTRUN -> [SKIP][93] ([i915#1769] / [i915#3555])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [FAIL][94] ([i915#5956]) +1 other test fail
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][95] +2 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-mtlp:         NOTRUN -> [FAIL][96] ([i915#12469] / [i915#5138])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-tglu:         NOTRUN -> [SKIP][97] ([i915#5286]) +2 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][98] ([i915#5286]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][99] ([i915#5286]) +3 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [PASS][100] -> [FAIL][101] ([i915#5138])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-mtlp:         NOTRUN -> [SKIP][102] +3 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([i915#3638])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
    - shard-dg2-9:        NOTRUN -> [SKIP][104] ([i915#4538] / [i915#5190]) +5 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][105] ([i915#4538] / [i915#5190]) +8 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][106] +6 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#10307] / [i915#6095]) +77 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-4/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc:
    - shard-mtlp:         NOTRUN -> [SKIP][108] ([i915#6095]) +14 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][109] ([i915#6095]) +56 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2:
    - shard-dg2-9:        NOTRUN -> [SKIP][110] ([i915#10307] / [i915#6095]) +34 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][111] ([i915#12313]) +3 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][112] ([i915#6095]) +24 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([i915#12313])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][114] ([i915#12313])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][115] ([i915#14098] / [i915#6095]) +54 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-glk:          NOTRUN -> [INCOMPLETE][116] ([i915#12796]) +1 other test incomplete
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk6/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([i915#6095]) +8 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][118] ([i915#12313])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
    - shard-dg2-9:        NOTRUN -> [SKIP][119] ([i915#12313])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][120] ([i915#12313])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][121] ([i915#6095]) +29 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#10307] / [i915#10434] / [i915#6095])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-4/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][123] ([i915#6095]) +151 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-12/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling:
    - shard-rkl:          NOTRUN -> [SKIP][124] ([i915#3742])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_audio@hdmi-audio:
    - shard-mtlp:         NOTRUN -> [SKIP][125] ([i915#11151] / [i915#7828])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_chamelium_audio@hdmi-audio.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-tglu:         NOTRUN -> [SKIP][126] +27 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-glk:          NOTRUN -> [SKIP][127] +44 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk3/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][128] ([i915#11151] / [i915#7828]) +3 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_chamelium_frames@dp-crc-multiple:
    - shard-dg2-9:        NOTRUN -> [SKIP][129] ([i915#11151] / [i915#7828]) +3 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_chamelium_frames@dp-crc-multiple.html

  * igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#11151] / [i915#7828]) +6 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html
    - shard-rkl:          NOTRUN -> [SKIP][131] ([i915#11151] / [i915#7828]) +4 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-tglu:         NOTRUN -> [SKIP][132] ([i915#11151] / [i915#7828]) +3 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_content_protection@atomic:
    - shard-dg2:          NOTRUN -> [SKIP][133] ([i915#7118] / [i915#9424])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@content-type-change:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#9424])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([i915#3116] / [i915#3299]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-mtlp:         NOTRUN -> [SKIP][136] ([i915#3299])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg2:          NOTRUN -> [SKIP][137] ([i915#3299])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_content_protection@dp-mst-type-1.html
    - shard-rkl:          NOTRUN -> [SKIP][138] ([i915#3116])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#9424])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@lic-type-1:
    - shard-dg2-9:        NOTRUN -> [SKIP][140] ([i915#9424])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_content_protection@lic-type-1.html
    - shard-tglu-1:       NOTRUN -> [SKIP][141] ([i915#6944] / [i915#9424])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@srm:
    - shard-rkl:          NOTRUN -> [SKIP][142] ([i915#7118])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-tglu:         NOTRUN -> [SKIP][143] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_content_protection@uevent.html

  * igt@kms_content_protection@uevent@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][144] ([i915#1339] / [i915#7173])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-10/igt@kms_content_protection@uevent@pipe-a-dp-3.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-tglu-1:       NOTRUN -> [SKIP][145] ([i915#13049])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-mtlp:         NOTRUN -> [SKIP][146] ([i915#3555] / [i915#8814])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-onscreen-256x256:
    - shard-rkl:          [PASS][147] -> [SKIP][148] ([i915#14544]) +40 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-256x256.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-256x256.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-tglu-1:       NOTRUN -> [SKIP][149] ([i915#3555]) +2 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-random-64x21:
    - shard-tglu:         NOTRUN -> [FAIL][150] ([i915#13566]) +1 other test fail
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_cursor_crc@cursor-random-64x21.html

  * igt@kms_cursor_crc@cursor-random-64x21@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][151] ([i915#13566])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_cursor_crc@cursor-random-64x21@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-rapid-movement-128x42:
    - shard-mtlp:         NOTRUN -> [SKIP][152] ([i915#8814])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([i915#13049]) +1 other test skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-dg2-9:        NOTRUN -> [SKIP][154] ([i915#3555]) +2 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
    - shard-dg2-9:        NOTRUN -> [SKIP][155] ([i915#13046] / [i915#5354]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
    - shard-rkl:          [PASS][156] -> [SKIP][157] ([i915#11190] / [i915#14544]) +1 other test skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][158] ([i915#9809])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][159] ([i915#13046] / [i915#5354]) +3 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html

  * igt@kms_cursor_legacy@flip-vs-cursor-toggle:
    - shard-rkl:          [PASS][160] -> [FAIL][161] ([i915#2346])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][162] ([i915#4103])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#9833])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#9723]) +1 other test skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
    - shard-tglu:         NOTRUN -> [SKIP][165] ([i915#9723])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#3804])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dither@fb-8bpc-vs-panel-8bpc:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#3555]) +3 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-mtlp:         NOTRUN -> [SKIP][168] ([i915#13749])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-dg2-9:        NOTRUN -> [SKIP][169] ([i915#13748])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_dp_link_training@uhbr-mst.html
    - shard-tglu-1:       NOTRUN -> [SKIP][170] ([i915#13748])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-rkl:          NOTRUN -> [SKIP][171] ([i915#13748])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_dp_link_training@uhbr-sst.html
    - shard-tglu:         NOTRUN -> [SKIP][172] ([i915#13748])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_dp_link_training@uhbr-sst.html
    - shard-dg2:          NOTRUN -> [SKIP][173] ([i915#13748])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-tglu:         NOTRUN -> [SKIP][174] ([i915#13707])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_draw_crc@draw-method-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][175] ([i915#8812])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_draw_crc@draw-method-mmap-gtt.html

  * igt@kms_dsc@dsc-basic:
    - shard-dg2:          NOTRUN -> [SKIP][176] ([i915#3555] / [i915#3840])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_dsc@dsc-basic.html

  * igt@kms_feature_discovery@display-2x:
    - shard-dg2-9:        NOTRUN -> [SKIP][177] ([i915#1839])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-tglu:         NOTRUN -> [SKIP][178] ([i915#1839])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@psr1:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#658])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#9934]) +3 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-dg2-9:        NOTRUN -> [SKIP][181] ([i915#9934]) +4 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-tglu-1:       NOTRUN -> [SKIP][182] ([i915#3637] / [i915#9934]) +2 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-mtlp:         NOTRUN -> [SKIP][183] ([i915#3637] / [i915#9934])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#9934]) +5 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_flip@2x-plain-flip.html
    - shard-tglu:         NOTRUN -> [SKIP][185] ([i915#3637] / [i915#9934]) +3 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible@b-hdmi-a2:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][186] ([i915#12964]) +3 other tests dmesg-warn
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-5/igt@kms_flip@flip-vs-dpms-on-nop-interruptible@b-hdmi-a2.html

  * igt@kms_flip@flip-vs-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][187] ([i915#8381])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_flip@flip-vs-fences-interruptible.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-snb:          [PASS][188] -> [ABORT][189] ([i915#14870]) +1 other test abort
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-snb7/igt@kms_flip@flip-vs-suspend.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb1/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend@b-vga1:
    - shard-snb:          [PASS][190] -> [INCOMPLETE][191] ([i915#12314])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-snb7/igt@kms_flip@flip-vs-suspend@b-vga1.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb1/igt@kms_flip@flip-vs-suspend@b-vga1.html

  * igt@kms_flip@flip-vs-wf_vblank-interruptible:
    - shard-rkl:          [PASS][192] -> [SKIP][193] ([i915#14544] / [i915#3637]) +3 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_flip@flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-tglu:         [PASS][194] -> [FAIL][195] ([i915#14600]) +1 other test fail
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-tglu-8/igt@kms_flip@plain-flip-fb-recreate.html
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-8/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-tglu:         NOTRUN -> [SKIP][196] ([i915#2672] / [i915#3555]) +3 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][197] ([i915#2587] / [i915#2672]) +3 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][198] ([i915#2672] / [i915#3555] / [i915#8813]) +1 other test skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][199] ([i915#2672] / [i915#8813]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][200] ([i915#2672] / [i915#3555])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][201] ([i915#2587] / [i915#2672])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][202] ([i915#2672]) +6 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
    - shard-rkl:          [PASS][203] -> [SKIP][204] ([i915#14544] / [i915#3555]) +2 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([i915#2672] / [i915#3555]) +2 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][206] ([i915#2672] / [i915#3555]) +2 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][207] ([i915#2672])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-dg2-9:        NOTRUN -> [SKIP][208] ([i915#2672] / [i915#3555] / [i915#5190])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2-9:        NOTRUN -> [SKIP][209] ([i915#2672])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-rkl:          [PASS][210] -> [SKIP][211] ([i915#14544] / [i915#1849] / [i915#5354]) +5 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-tglu-1:       NOTRUN -> [SKIP][212] +28 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg2-9:        NOTRUN -> [SKIP][213] ([i915#5354]) +15 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][214] ([i915#8708]) +7 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-dg2-9:        NOTRUN -> [SKIP][215] ([i915#10055])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-tglu-1:       NOTRUN -> [SKIP][216] ([i915#15102]) +9 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-dg2-9:        NOTRUN -> [SKIP][217] ([i915#8708]) +4 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#15102] / [i915#3458]) +9 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][219] ([i915#8708]) +2 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#5354]) +23 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][221] ([i915#1825]) +25 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-tglu-1:       NOTRUN -> [SKIP][222] ([i915#5439])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#9766])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#15102] / [i915#3023]) +12 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
    - shard-tglu:         NOTRUN -> [SKIP][225] ([i915#15102]) +7 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-mtlp:         NOTRUN -> [SKIP][226] ([i915#1825]) +1 other test skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
    - shard-dg2-9:        NOTRUN -> [SKIP][227] ([i915#15102] / [i915#3458]) +8 other tests skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][228] ([i915#3555] / [i915#8228]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@static-toggle:
    - shard-tglu-1:       NOTRUN -> [SKIP][229] ([i915#3555] / [i915#8228]) +1 other test skip
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_hdr@static-toggle.html
    - shard-dg2-9:        NOTRUN -> [SKIP][230] ([i915#3555] / [i915#8228])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_hdr@static-toggle.html

  * igt@kms_invalid_mode@bad-htotal:
    - shard-rkl:          [PASS][231] -> [SKIP][232] ([i915#14544] / [i915#3555] / [i915#8826]) +1 other test skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_invalid_mode@bad-htotal.html
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_invalid_mode@bad-htotal.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-mtlp:         NOTRUN -> [SKIP][233] ([i915#10656])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][234] ([i915#12388])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][235] ([i915#10656])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#12388])
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][237] ([i915#13522])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#13522])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
    - shard-tglu:         NOTRUN -> [SKIP][239] ([i915#13522])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-dg2-9:        NOTRUN -> [SKIP][240] ([i915#4816])
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_crc_basic@hang-read-crc:
    - shard-glk10:        NOTRUN -> [SKIP][241] ([i915#11190])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk10/igt@kms_pipe_crc_basic@hang-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][242] ([i915#12756] / [i915#13476])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][243] ([i915#13476])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-mtlp:         NOTRUN -> [SKIP][244] ([i915#13705])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a:
    - shard-rkl:          [PASS][245] -> [INCOMPLETE][246] ([i915#14412]) +1 other test incomplete
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html

  * igt@kms_plane_alpha_blend@alpha-7efc:
    - shard-rkl:          [PASS][247] -> [SKIP][248] ([i915#14544] / [i915#7294]) +1 other test skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_alpha_blend@alpha-7efc.html
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_alpha_blend@alpha-7efc.html

  * igt@kms_plane_lowres@tiling-4:
    - shard-tglu:         NOTRUN -> [SKIP][249] ([i915#3555]) +1 other test skip
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_plane_lowres@tiling-4.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][250] ([i915#3555]) +3 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-tglu-1:       NOTRUN -> [SKIP][251] ([i915#13958])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_scaling@invalid-num-scalers:
    - shard-rkl:          [PASS][252] -> [SKIP][253] ([i915#14544] / [i915#3555] / [i915#6953] / [i915#8152])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_scaling@invalid-num-scalers.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@invalid-num-scalers.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers:
    - shard-rkl:          [PASS][254] -> [SKIP][255] ([i915#14544] / [i915#8152]) +1 other test skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-b:
    - shard-rkl:          [PASS][256] -> [SKIP][257] ([i915#12247] / [i915#14544] / [i915#8152]) +3 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-b.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-b.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][258] ([i915#12247]) +5 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html

  * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][259] ([i915#12247]) +9 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-rkl:          [PASS][260] -> [SKIP][261] ([i915#12247] / [i915#14544] / [i915#3555] / [i915#6953] / [i915#8152])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-rkl:          [PASS][262] -> [SKIP][263] ([i915#12247] / [i915#14544] / [i915#6953] / [i915#8152])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a:
    - shard-rkl:          [PASS][264] -> [SKIP][265] ([i915#12247] / [i915#14544]) +3 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][266] ([i915#12343])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-tglu:         NOTRUN -> [SKIP][267] ([i915#9685])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-dg2:          NOTRUN -> [SKIP][268] ([i915#3828])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-rkl:          NOTRUN -> [SKIP][269] ([i915#3828])
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_pm_dc@dc5-retention-flops.html
    - shard-tglu:         NOTRUN -> [SKIP][270] ([i915#3828])
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][271] ([i915#14104])
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][272] ([i915#4281])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-tglu-1:       NOTRUN -> [SKIP][273] ([i915#8430])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_pm_lpsp@screens-disabled.html
    - shard-dg2-9:        NOTRUN -> [SKIP][274] ([i915#8430])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-rkl:          [PASS][275] -> [SKIP][276] ([i915#14544] / [i915#15073])
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][277] -> [SKIP][278] ([i915#15073]) +1 other test skip
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp.html
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][279] ([i915#6524])
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-dg2:          NOTRUN -> [SKIP][280] ([i915#6524] / [i915#6805])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
    - shard-glk:          NOTRUN -> [SKIP][281] ([i915#11520])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk6/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][282] ([i915#11520]) +3 other tests skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][283] ([i915#11520]) +3 other tests skip
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-snb:          NOTRUN -> [SKIP][284] ([i915#11520]) +1 other test skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb4/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][285] ([i915#9808])
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
    - shard-dg2-9:        NOTRUN -> [SKIP][286] ([i915#11520]) +3 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][287] ([i915#11520]) +4 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-mtlp:         NOTRUN -> [SKIP][288] ([i915#12316]) +2 other tests skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
    - shard-glk10:        NOTRUN -> [SKIP][289] ([i915#11520]) +3 other tests skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk10/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][290] ([i915#11520]) +4 other tests skip
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-sprite-blt:
    - shard-dg2-9:        NOTRUN -> [SKIP][291] ([i915#1072] / [i915#9732]) +9 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_psr@fbc-pr-sprite-blt.html

  * igt@kms_psr@fbc-psr2-suspend@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][292] ([i915#9688]) +2 other tests skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_psr@fbc-psr2-suspend@edp-1.html

  * igt@kms_psr@pr-cursor-render:
    - shard-tglu-1:       NOTRUN -> [SKIP][293] ([i915#9732]) +9 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_psr@pr-cursor-render.html

  * igt@kms_psr@psr-cursor-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][294] ([i915#1072] / [i915#9732]) +12 other tests skip
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_psr@psr-cursor-mmap-cpu.html

  * igt@kms_psr@psr2-cursor-blt:
    - shard-rkl:          NOTRUN -> [SKIP][295] ([i915#1072] / [i915#9732]) +12 other tests skip
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_psr@psr2-cursor-blt.html

  * igt@kms_psr@psr2-primary-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][296] ([i915#9732]) +9 other tests skip
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_psr@psr2-primary-mmap-gtt.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-dg2-9:        NOTRUN -> [SKIP][297] ([i915#9685])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@exhaust-fences:
    - shard-dg2-9:        NOTRUN -> [SKIP][298] ([i915#4235])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_rotation_crc@exhaust-fences.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2-9:        NOTRUN -> [SKIP][299] ([i915#12755]) +1 other test skip
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-dg2:          NOTRUN -> [SKIP][300] ([i915#12755] / [i915#5190])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-rkl:          NOTRUN -> [SKIP][301] ([i915#5289])
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-tglu-1:       NOTRUN -> [SKIP][302] ([i915#5289])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
    - shard-dg2-9:        NOTRUN -> [SKIP][303] ([i915#12755] / [i915#5190])
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-mtlp:         NOTRUN -> [SKIP][304] ([i915#12755])
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-tglu-1:       NOTRUN -> [ABORT][305] ([i915#13179]) +1 other test abort
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-1/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-rkl:          NOTRUN -> [SKIP][306] ([i915#8623])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-tglu:         NOTRUN -> [SKIP][307] ([i915#8623])
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
    - shard-dg2:          NOTRUN -> [SKIP][308] ([i915#8623])
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-mtlp:         [PASS][309] -> [FAIL][310] ([i915#9196]) +1 other test fail
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-mtlp-7/igt@kms_universal_plane@cursor-fb-leak.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-3/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@kms_vblank@ts-continuation-idle-hang:
    - shard-glk10:        NOTRUN -> [SKIP][311] +137 other tests skip
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-glk10/igt@kms_vblank@ts-continuation-idle-hang.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-dg2:          NOTRUN -> [SKIP][312] ([i915#9906])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-tglu:         NOTRUN -> [SKIP][313] ([i915#9906])
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-9/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-dg2-9:        NOTRUN -> [SKIP][314] ([i915#9906])
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-mtlp:         NOTRUN -> [SKIP][315] ([i915#2437])
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-dg2:          NOTRUN -> [SKIP][316] ([i915#2437] / [i915#9412])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][317] ([i915#2433])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@event-wait:
    - shard-mtlp:         NOTRUN -> [SKIP][318] ([i915#8807])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@perf_pmu@event-wait.html

  * igt@perf_pmu@event-wait@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][319] ([i915#3555] / [i915#8807])
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@perf_pmu@event-wait@rcs0.html

  * igt@perf_pmu@frequency:
    - shard-dg2:          NOTRUN -> [FAIL][320] ([i915#12549] / [i915#6806]) +1 other test fail
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@perf_pmu@frequency.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-dg2:          NOTRUN -> [SKIP][321] ([i915#8516])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@perf_pmu@rc6-all-gts.html
    - shard-rkl:          NOTRUN -> [SKIP][322] ([i915#8516])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@perf_pmu@rc6-all-gts.html
    - shard-tglu:         NOTRUN -> [SKIP][323] ([i915#8516])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@perf_pmu@rc6-all-gts.html

  * igt@prime_vgem@basic-fence-mmap:
    - shard-dg2-9:        NOTRUN -> [SKIP][324] ([i915#3708] / [i915#4077])
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-read:
    - shard-rkl:          NOTRUN -> [SKIP][325] ([i915#3291] / [i915#3708])
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@fence-read-hang:
    - shard-mtlp:         NOTRUN -> [SKIP][326] ([i915#3708])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@prime_vgem@fence-read-hang.html

  * igt@sriov_basic@bind-unbind-vf:
    - shard-dg2:          NOTRUN -> [SKIP][327] ([i915#9917])
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-3/igt@sriov_basic@bind-unbind-vf.html

  
#### Possible fixes ####

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][328] ([i915#5493]) -> [PASS][329] +1 other test pass
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-14/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-rkl:          [TIMEOUT][330] ([i915#12917] / [i915#12964]) -> [PASS][331]
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-2/igt@gem_pxp@verify-pxp-stale-ctx-execution.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_tiled_wb:
    - shard-rkl:          [DMESG-WARN][332] ([i915#12964]) -> [PASS][333] +2 other tests pass
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_tiled_wb.html
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_tiled_wb.html

  * igt@gem_workarounds@suspend-resume:
    - shard-dg2:          [ABORT][334] ([i915#15069]) -> [PASS][335]
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-10/igt@gem_workarounds@suspend-resume.html
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-8/igt@gem_workarounds@suspend-resume.html
    - shard-rkl:          [INCOMPLETE][336] ([i915#13356]) -> [PASS][337]
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-3/igt@gem_workarounds@suspend-resume.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-8/igt@gem_workarounds@suspend-resume.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg2-9:        [DMESG-WARN][338] ([i915#13447]) -> [PASS][339]
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-9/igt@i915_module_load@reload-with-fault-injection.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-9/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_addfb_basic@bad-pitch-63:
    - shard-dg1:          [DMESG-WARN][340] ([i915#4391] / [i915#4423]) -> [PASS][341]
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-17/igt@kms_addfb_basic@bad-pitch-63.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-13/igt@kms_addfb_basic@bad-pitch-63.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-rkl:          [INCOMPLETE][342] ([i915#12761]) -> [PASS][343]
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-3/igt@kms_async_flips@async-flip-suspend-resume.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-7/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-edp-1:
    - shard-mtlp:         [ABORT][344] ([i915#13562]) -> [PASS][345] +1 other test pass
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-mtlp-4/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-edp-1.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-mtlp-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-a-edp-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][346] -> [PASS][347] +1 other test pass
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-6/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_color@ctm-negative:
    - shard-rkl:          [SKIP][348] ([i915#12655] / [i915#14544]) -> [PASS][349] +2 other tests pass
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_color@ctm-negative.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_color@ctm-negative.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-rkl:          [SKIP][350] ([i915#14544] / [i915#14561]) -> [PASS][351]
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_fbcon_fbt@fbc-suspend.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_feature_discovery@display-1x:
    - shard-rkl:          [SKIP][352] ([i915#14544] / [i915#9738]) -> [PASS][353]
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_feature_discovery@display-1x.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_feature_discovery@display-1x.html

  * igt@kms_flip@flip-vs-dpms-on-nop:
    - shard-rkl:          [SKIP][354] ([i915#14544] / [i915#14553]) -> [PASS][355]
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_flip@flip-vs-dpms-on-nop.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_flip@flip-vs-dpms-on-nop.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-rkl:          [SKIP][356] ([i915#14544] / [i915#3637]) -> [PASS][357] +8 other tests pass
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
    - shard-rkl:          [SKIP][358] ([i915#14544] / [i915#3555]) -> [PASS][359] +3 other tests pass
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html

  * {igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt}:
    - shard-rkl:          [SKIP][360] ([i915#14544]) -> [PASS][361] +51 other tests pass
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
    - shard-rkl:          [SKIP][362] ([i915#14544] / [i915#1849] / [i915#5354]) -> [PASS][363] +10 other tests pass
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html

  * igt@kms_hdr@static-swap:
    - shard-dg2:          [SKIP][364] ([i915#3555] / [i915#8228]) -> [PASS][365]
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-7/igt@kms_hdr@static-swap.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-10/igt@kms_hdr@static-swap.html

  * igt@kms_invalid_mode@zero-clock:
    - shard-rkl:          [SKIP][366] ([i915#14544] / [i915#3555] / [i915#8826]) -> [PASS][367]
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_invalid_mode@zero-clock.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_invalid_mode@zero-clock.html

  * igt@kms_plane@plane-position-covered:
    - shard-rkl:          [SKIP][368] ([i915#14544] / [i915#8825]) -> [PASS][369]
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane@plane-position-covered.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane@plane-position-covered.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb:
    - shard-rkl:          [SKIP][370] ([i915#14544] / [i915#7294]) -> [PASS][371]
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_alpha_blend@alpha-opaque-fb.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_alpha_blend@alpha-opaque-fb.html

  * igt@kms_plane_scaling@invalid-parameters:
    - shard-rkl:          [SKIP][372] ([i915#14544] / [i915#8152]) -> [PASS][373] +1 other test pass
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@invalid-parameters.html
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@invalid-parameters.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers:
    - shard-dg1:          [DMESG-WARN][374] ([i915#4423]) -> [PASS][375] +6 other tests pass
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-17/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-13/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5:
    - shard-rkl:          [SKIP][376] ([i915#12247] / [i915#14544] / [i915#6953] / [i915#8152]) -> [PASS][377]
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a:
    - shard-rkl:          [SKIP][378] ([i915#12247] / [i915#14544]) -> [PASS][379] +3 other tests pass
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a.html
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5:
    - shard-rkl:          [SKIP][380] ([i915#14544] / [i915#6953] / [i915#8152]) -> [PASS][381]
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5.html
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-b:
    - shard-rkl:          [SKIP][382] ([i915#12247] / [i915#14544] / [i915#8152]) -> [PASS][383] +3 other tests pass
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-b.html
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
    - shard-rkl:          [SKIP][384] ([i915#12247] / [i915#14544] / [i915#3555] / [i915#6953] / [i915#8152]) -> [PASS][385]
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-rkl:          [SKIP][386] ([i915#15073]) -> [PASS][387] +1 other test pass
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-dg2:          [FAIL][388] ([i915#9196]) -> [PASS][389] +1 other test pass
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-5/igt@kms_universal_plane@cursor-fb-leak.html
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-1/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@perf@gen12-group-concurrent-oa-buffer-read:
    - shard-tglu:         [FAIL][390] ([i915#10538]) -> [PASS][391]
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-tglu-5/igt@perf@gen12-group-concurrent-oa-buffer-read.html
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-tglu-10/igt@perf@gen12-group-concurrent-oa-buffer-read.html

  * igt@prime_vgem@basic-fence-flip:
    - shard-rkl:          [SKIP][392] ([i915#14544] / [i915#3708]) -> [PASS][393]
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@prime_vgem@basic-fence-flip.html
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@prime_vgem@basic-fence-flip.html

  
#### Warnings ####

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          [SKIP][394] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][395] ([i915#3555] / [i915#9323])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-rkl:          [SKIP][396] ([i915#6335]) -> [SKIP][397] ([i915#14544] / [i915#6335])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_create@create-ext-cpu-access-big.html
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-rkl:          [SKIP][398] ([i915#14544] / [i915#6335]) -> [SKIP][399] ([i915#6335])
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_create@create-ext-cpu-access-sanity-check.html
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          [SKIP][400] ([i915#280]) -> [SKIP][401] ([i915#14544] / [i915#280])
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_ctx_sseu@invalid-args.html
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-rkl:          [SKIP][402] ([i915#14544] / [i915#280]) -> [SKIP][403] ([i915#280])
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_ctx_sseu@invalid-sseu.html
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-rkl:          [SKIP][404] ([i915#4525]) -> [SKIP][405] ([i915#14544] / [i915#4525])
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_exec_balancer@parallel-bb-first.html
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-rkl:          [SKIP][406] ([i915#14544] / [i915#4525]) -> [SKIP][407] ([i915#4525]) +1 other test skip
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_exec_balancer@parallel-out-fence.html
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_capture@capture-recoverable:
    - shard-rkl:          [SKIP][408] ([i915#6344]) -> [SKIP][409] ([i915#14544] / [i915#6344])
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_exec_capture@capture-recoverable.html
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_exec_capture@capture-recoverable.html

  * igt@gem_exec_reloc@basic-gtt-wc-active:
    - shard-rkl:          [SKIP][410] ([i915#3281]) -> [SKIP][411] ([i915#14544] / [i915#3281]) +5 other tests skip
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_exec_reloc@basic-gtt-wc-active.html
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-wc-active.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-rkl:          [SKIP][412] ([i915#14544] / [i915#3281]) -> [SKIP][413] ([i915#3281]) +8 other tests skip
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_exec_reloc@basic-softpin.html
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_huc_copy@huc-copy:
    - shard-rkl:          [SKIP][414] ([i915#14544] / [i915#2190]) -> [SKIP][415] ([i915#2190])
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_huc_copy@huc-copy.html
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          [SKIP][416] ([i915#14544] / [i915#4613] / [i915#7582]) -> [SKIP][417] ([i915#4613] / [i915#7582])
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-rkl:          [SKIP][418] ([i915#4613]) -> [SKIP][419] ([i915#14544] / [i915#4613]) +3 other tests skip
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@random-engines:
    - shard-rkl:          [SKIP][420] ([i915#14544] / [i915#4613]) -> [SKIP][421] ([i915#4613]) +2 other tests skip
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_lmem_swapping@random-engines.html
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-rkl:          [SKIP][422] ([i915#3282]) -> [SKIP][423] ([i915#14544] / [i915#3282]) +2 other tests skip
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_partial_pwrite_pread@reads-uncached.html
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          [SKIP][424] ([i915#14544] / [i915#3282]) -> [SKIP][425] ([i915#3282]) +7 other tests skip
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_pxp@hw-rejects-pxp-buffer:
    - shard-rkl:          [SKIP][426] ([i915#13717]) -> [TIMEOUT][427] ([i915#12917] / [i915#12964])
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-buffer.html
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_pxp@hw-rejects-pxp-buffer.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-rkl:          [TIMEOUT][428] ([i915#12917] / [i915#12964]) -> [SKIP][429] ([i915#4270])
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_pxp@reject-modify-context-protection-off-2.html
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-rkl:          [SKIP][430] ([i915#14544] / [i915#4270]) -> [SKIP][431] ([i915#4270])
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_pxp@reject-modify-context-protection-off-3.html
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-rkl:          [SKIP][432] -> [SKIP][433] ([i915#14544]) +13 other tests skip
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_softpin@evict-snoop-interruptible.html
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_softpin@evict-snoop-interruptible.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-rkl:          [SKIP][434] ([i915#14544] / [i915#3297]) -> [SKIP][435] ([i915#3297])
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_userptr_blits@coherency-unsync.html
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-rkl:          [SKIP][436] ([i915#14544] / [i915#3297] / [i915#3323]) -> [SKIP][437] ([i915#3297] / [i915#3323])
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_userptr_blits@dmabuf-sync.html
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-rkl:          [SKIP][438] ([i915#3297]) -> [SKIP][439] ([i915#14544] / [i915#3297])
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gem_userptr_blits@dmabuf-unsync.html
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@relocations:
    - shard-rkl:          [SKIP][440] ([i915#14544] / [i915#3281] / [i915#3297]) -> [SKIP][441] ([i915#3281] / [i915#3297])
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gem_userptr_blits@relocations.html
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@gem_userptr_blits@relocations.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-rkl:          [SKIP][442] ([i915#14544] / [i915#2527]) -> [SKIP][443] ([i915#2527]) +1 other test skip
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@gen9_exec_parse@allowed-all.html
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          [SKIP][444] ([i915#2527]) -> [SKIP][445] ([i915#14544] / [i915#2527]) +1 other test skip
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@gen9_exec_parse@shadow-peek.html
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-rkl:          [SKIP][446] ([i915#14544] / [i915#8399]) -> [SKIP][447] ([i915#8399]) +1 other test skip
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@i915_pm_freq_api@freq-reset-multiple.html
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          [SKIP][448] ([i915#8399]) -> [SKIP][449] ([i915#14544] / [i915#8399])
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@i915_pm_freq_api@freq-suspend.html
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_sseu@full-enable:
    - shard-rkl:          [SKIP][450] ([i915#14544] / [i915#4387]) -> [SKIP][451] ([i915#4387])
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@i915_pm_sseu@full-enable.html
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@i915_pm_sseu@full-enable.html

  * igt@i915_power@sanity:
    - shard-rkl:          [SKIP][452] ([i915#14544] / [i915#7984]) -> [SKIP][453] ([i915#7984])
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@i915_power@sanity.html
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@i915_power@sanity.html

  * igt@i915_query@hwconfig_table:
    - shard-rkl:          [SKIP][454] ([i915#6245]) -> [SKIP][455] ([i915#14544] / [i915#6245])
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@i915_query@hwconfig_table.html
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@i915_query@hwconfig_table.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-rkl:          [SKIP][456] ([i915#12454] / [i915#12712]) -> [SKIP][457] ([i915#12454] / [i915#12712] / [i915#14544])
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-rkl:          [SKIP][458] ([i915#1769] / [i915#3555]) -> [SKIP][459] ([i915#14544])
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          [SKIP][460] ([i915#5286]) -> [SKIP][461] ([i915#14544]) +3 other tests skip
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          [SKIP][462] ([i915#14544]) -> [SKIP][463] ([i915#5286]) +3 other tests skip
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          [SKIP][464] ([i915#3638]) -> [SKIP][465] ([i915#14544]) +4 other tests skip
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_big_fb@linear-64bpp-rotate-90.html
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-rkl:          [SKIP][466] ([i915#14544]) -> [SKIP][467] ([i915#3638]) +3 other tests skip
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs:
    - shard-rkl:          [SKIP][468] ([i915#14544]) -> [SKIP][469] ([i915#14098] / [i915#6095]) +13 other tests skip
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs.html
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-rkl:          [SKIP][470] ([i915#14544]) -> [SKIP][471] ([i915#12805])
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-rkl:          [SKIP][472] ([i915#14544]) -> [SKIP][473] ([i915#12313]) +1 other test skip
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs:
    - shard-rkl:          [SKIP][474] ([i915#14098] / [i915#6095]) -> [SKIP][475] ([i915#14544]) +10 other tests skip
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          [SKIP][476] ([i915#3742]) -> [SKIP][477] ([i915#14544] / [i915#3742])
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_cdclk@mode-transition.html
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-rkl:          [SKIP][478] ([i915#11151] / [i915#7828]) -> [SKIP][479] ([i915#11151] / [i915#14544] / [i915#7828]) +5 other tests skip
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
    - shard-rkl:          [SKIP][480] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][481] ([i915#11151] / [i915#7828]) +8 other tests skip
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_chamelium_hpd@vga-hpd-fast.html
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_chamelium_hpd@vga-hpd-fast.html

  * igt@kms_color@deep-color:
    - shard-rkl:          [SKIP][482] ([i915#12655] / [i915#14544] / [i915#3555]) -> [SKIP][483] ([i915#12655] / [i915#3555])
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_color@deep-color.html
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_color@deep-color.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-rkl:          [SKIP][484] ([i915#3116]) -> [SKIP][485] ([i915#14544])
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_content_protection@dp-mst-lic-type-1.html
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-rkl:          [SKIP][486] ([i915#14544]) -> [SKIP][487] ([i915#3116])
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0.html
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][488] ([i915#9433]) -> [SKIP][489] ([i915#9424])
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-13/igt@kms_content_protection@mei-interface.html
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-14/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          [SKIP][490] ([i915#14544]) -> [SKIP][491] ([i915#7118] / [i915#9424])
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_content_protection@type1.html
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-dg2:          [SKIP][492] ([i915#7118] / [i915#9424]) -> [FAIL][493] ([i915#1339] / [i915#7173])
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-7/igt@kms_content_protection@uevent.html
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-10/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-rkl:          [SKIP][494] ([i915#3555]) -> [SKIP][495] ([i915#14544]) +2 other tests skip
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-32x32.html
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-rkl:          [FAIL][496] ([i915#13566]) -> [SKIP][497] ([i915#14544]) +1 other test skip
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_cursor_crc@cursor-sliding-256x85.html
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][498] ([i915#14544]) -> [SKIP][499] ([i915#3555]) +3 other tests skip
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-rkl:          [SKIP][500] ([i915#14544]) -> [SKIP][501] ([i915#13049])
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-512x512.html
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-rkl:          [SKIP][502] ([i915#4103]) -> [SKIP][503] ([i915#14544])
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-rkl:          [SKIP][504] ([i915#14544]) -> [SKIP][505] +24 other tests skip
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-rkl:          [SKIP][506] ([i915#14544]) -> [SKIP][507] ([i915#13691])
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_display_modes@extended-mode-basic.html
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-rkl:          [SKIP][508] ([i915#14544]) -> [SKIP][509] ([i915#13749])
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_dp_link_training@non-uhbr-sst.html
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-rkl:          [SKIP][510] ([i915#14544]) -> [SKIP][511] ([i915#13707])
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-rkl:          [SKIP][512] ([i915#3840]) -> [SKIP][513] ([i915#14544])
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-rkl:          [SKIP][514] ([i915#14544]) -> [SKIP][515] ([i915#3555] / [i915#3840]) +1 other test skip
   [514]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats.html
   [515]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_feature_discovery@display-3x:
    - shard-rkl:          [SKIP][516] ([i915#1839]) -> [SKIP][517] ([i915#14544] / [i915#1839]) +1 other test skip
   [516]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_feature_discovery@display-3x.html
   [517]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_feature_discovery@display-3x.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-rkl:          [SKIP][518] ([i915#9934]) -> [SKIP][519] ([i915#14544] / [i915#9934]) +4 other tests skip
   [518]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_flip@2x-flip-vs-dpms.html
   [519]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-rkl:          [SKIP][520] ([i915#14544] / [i915#9934]) -> [SKIP][521] ([i915#9934]) +4 other tests skip
   [520]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_flip@2x-flip-vs-panning.html
   [521]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1:
    - shard-snb:          [ABORT][522] ([i915#14849] / [i915#14871]) -> [TIMEOUT][523] ([i915#14033]) +1 other test timeout
   [522]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-snb4/igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1.html
   [523]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-snb5/igt@kms_flip@2x-flip-vs-suspend@ab-vga1-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling:
    - shard-rkl:          [SKIP][524] ([i915#2672] / [i915#3555]) -> [SKIP][525] ([i915#14544] / [i915#3555]) +1 other test skip
   [524]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html
   [525]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-rkl:          [SKIP][526] ([i915#14544] / [i915#3555]) -> [SKIP][527] ([i915#2672] / [i915#3555]) +3 other tests skip
   [526]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
   [527]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-rkl:          [SKIP][528] ([i915#15102] / [i915#3023]) -> [SKIP][529] ([i915#14544] / [i915#1849] / [i915#5354]) +13 other tests skip
   [528]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [529]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt:
    - shard-rkl:          [SKIP][530] ([i915#14544] / [i915#1849] / [i915#5354]) -> [SKIP][531] +1 other test skip
   [530]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html
   [531]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-rkl:          [SKIP][532] ([i915#1825]) -> [SKIP][533] ([i915#14544] / [i915#1849] / [i915#5354]) +28 other tests skip
   [532]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [533]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-rkl:          [SKIP][534] ([i915#14544] / [i915#1849] / [i915#5354]) -> [SKIP][535] ([i915#15102] / [i915#3023]) +19 other tests skip
   [534]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
   [535]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary:
    - shard-dg2:          [SKIP][536] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][537] ([i915#15102] / [i915#3458]) +1 other test skip
   [536]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
   [537]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          [SKIP][538] ([i915#14544] / [i915#1849] / [i915#5354]) -> [SKIP][539] ([i915#1825]) +30 other tests skip
   [538]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
   [539]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_hdr@bpc-switch:
    - shard-rkl:          [SKIP][540] ([i915#3555] / [i915#8228]) -> [SKIP][541] ([i915#14544])
   [540]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_hdr@bpc-switch.html
   [541]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_hdr@bpc-switch.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-rkl:          [SKIP][542] ([i915#14544]) -> [SKIP][543] ([i915#3555] / [i915#8228])
   [542]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_hdr@invalid-metadata-sizes.html
   [543]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-rkl:          [SKIP][544] ([i915#10656] / [i915#14544]) -> [SKIP][545] ([i915#10656])
   [544]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_joiner@basic-big-joiner.html
   [545]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-rkl:          [SKIP][546] ([i915#13688]) -> [SKIP][547] ([i915#13688] / [i915#14544])
   [546]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_joiner@basic-max-non-joiner.html
   [547]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-rkl:          [SKIP][548] ([i915#12339] / [i915#14544]) -> [SKIP][549] ([i915#12339])
   [548]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_joiner@basic-ultra-joiner.html
   [549]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-rkl:          [SKIP][550] ([i915#1839] / [i915#4816]) -> [SKIP][551] ([i915#14544] / [i915#4070] / [i915#4816])
   [550]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
   [551]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-rkl:          [SKIP][552] ([i915#6301]) -> [SKIP][553] ([i915#14544])
   [552]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_panel_fitting@atomic-fastset.html
   [553]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-rkl:          [SKIP][554] ([i915#14544]) -> [SKIP][555] ([i915#13958]) +1 other test skip
   [554]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-4.html
   [555]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          [SKIP][556] ([i915#14259]) -> [SKIP][557] ([i915#14544])
   [556]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_multiple@tiling-yf.html
   [557]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-rkl:          [SKIP][558] -> [SKIP][559] ([i915#14544] / [i915#8152])
   [558]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [559]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-rkl:          [SKIP][560] ([i915#6953]) -> [SKIP][561] ([i915#14544] / [i915#6953] / [i915#8152])
   [560]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_plane_scaling@intel-max-src-size.html
   [561]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          [SKIP][562] ([i915#14544] / [i915#5354]) -> [SKIP][563] ([i915#5354])
   [562]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_pm_backlight@fade-with-suspend.html
   [563]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-rkl:          [SKIP][564] ([i915#14544] / [i915#9685]) -> [SKIP][565] ([i915#9685])
   [564]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_pm_dc@dc5-psr.html
   [565]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-rkl:          [SKIP][566] ([i915#9685]) -> [SKIP][567] ([i915#14544] / [i915#9685]) +1 other test skip
   [566]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_pm_dc@dc6-psr.html
   [567]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-rkl:          [SKIP][568] ([i915#15073]) -> [SKIP][569] ([i915#14544] / [i915#15073])
   [568]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp.html
   [569]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-rkl:          [SKIP][570] ([i915#14544] / [i915#15073]) -> [SKIP][571] ([i915#15073]) +1 other test skip
   [570]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [571]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-pc8-residency-stress:
    - shard-rkl:          [SKIP][572] ([i915#14544]) -> [SKIP][573] ([i915#12916])
   [572]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_pm_rpm@modeset-pc8-residency-stress.html
   [573]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_pm_rpm@modeset-pc8-residency-stress.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
    - shard-rkl:          [SKIP][574] ([i915#11520] / [i915#14544]) -> [SKIP][575] ([i915#11520]) +7 other tests skip
   [574]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html
   [575]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-rkl:          [SKIP][576] ([i915#11520]) -> [SKIP][577] ([i915#11520] / [i915#14544]) +5 other tests skip
   [576]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
   [577]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-rkl:          [SKIP][578] ([i915#9683]) -> [SKIP][579] ([i915#14544] / [i915#9683])
   [578]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_psr2_su@page_flip-nv12.html
   [579]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-pr-primary-blt:
    - shard-dg1:          [SKIP][580] ([i915#1072] / [i915#4423] / [i915#9732]) -> [SKIP][581] ([i915#1072] / [i915#9732])
   [580]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-dg1-17/igt@kms_psr@fbc-pr-primary-blt.html
   [581]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-dg1-13/igt@kms_psr@fbc-pr-primary-blt.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-rkl:          [SKIP][582] ([i915#1072] / [i915#9732]) -> [SKIP][583] ([i915#1072] / [i915#14544] / [i915#9732]) +13 other tests skip
   [582]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-5/igt@kms_psr@fbc-psr-cursor-plane-move.html
   [583]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr@psr2-cursor-mmap-gtt:
    - shard-rkl:          [SKIP][584] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][585] ([i915#1072] / [i915#9732]) +20 other tests skip
   [584]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_psr@psr2-cursor-mmap-gtt.html
   [585]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_psr@psr2-cursor-mmap-gtt.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][586] ([i915#5289]) -> [SKIP][587] ([i915#14544])
   [586]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [587]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-x-tiled-reflect-x-0:
    - shard-rkl:          [SKIP][588] ([i915#14544]) -> [DMESG-WARN][589] ([i915#12964])
   [588]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_rotation_crc@primary-x-tiled-reflect-x-0.html
   [589]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_rotation_crc@primary-x-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-rkl:          [SKIP][590] ([i915#14544]) -> [SKIP][591] ([i915#5289])
   [590]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
   [591]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-rkl:          [SKIP][592] ([i915#3555]) -> [SKIP][593] ([i915#14544] / [i915#3555])
   [592]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_setmode@basic-clone-single-crtc.html
   [593]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          [SKIP][594] ([i915#14544]) -> [SKIP][595] ([i915#11920])
   [594]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_vrr@lobf.html
   [595]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-rkl:          [SKIP][596] ([i915#14544]) -> [SKIP][597] ([i915#9906])
   [596]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_vrr@max-min.html
   [597]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_vrr@max-min.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-rkl:          [SKIP][598] ([i915#9906]) -> [SKIP][599] ([i915#14544]) +1 other test skip
   [598]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-8/igt@kms_vrr@seamless-rr-switch-vrr.html
   [599]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          [SKIP][600] ([i915#14544] / [i915#2437]) -> [SKIP][601] ([i915#2437])
   [600]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@kms_writeback@writeback-fb-id.html
   [601]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-rkl:          [SKIP][602] ([i915#14544] / [i915#2435]) -> [SKIP][603] ([i915#2435])
   [602]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@perf@per-context-mode-unprivileged.html
   [603]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@perf@per-context-mode-unprivileged.html

  * igt@prime_vgem@fence-read-hang:
    - shard-rkl:          [SKIP][604] ([i915#14544] / [i915#3708]) -> [SKIP][605] ([i915#3708]) +2 other tests skip
   [604]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@prime_vgem@fence-read-hang.html
   [605]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-2/igt@prime_vgem@fence-read-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - shard-rkl:          [SKIP][606] ([i915#14544] / [i915#9917]) -> [SKIP][607] ([i915#9917])
   [606]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17329/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-on.html
   [607]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/shard-rkl-4/igt@sriov_basic@enable-vfs-autoprobe-on.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10538
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11190
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11527
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
  [i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
  [i915#12469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12469
  [i915#12549]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12549
  [i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
  [i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12916]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12916
  [i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
  [i915#12942]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12942
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#1339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1339
  [i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
  [i915#13447]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13447
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
  [i915#13562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13562
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13705]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13705
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14104
  [i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
  [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
  [i915#14412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14412
  [i915#14498]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14498
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14545]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14545
  [i915#14553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14553
  [i915#14561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14561
  [i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
  [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
  [i915#14849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14849
  [i915#14870]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14870
  [i915#14871]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14871
  [i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
  [i915#15069]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15069
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15095
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849
  [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
  [i915#2435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2435
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3711
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3936
  [i915#4070]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6806
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7294]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7294
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
  [i915#8152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8152
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8807]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8807
  [i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
  [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
  [i915#8826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8826
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9738]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9738
  [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
  [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_17329 -> Patchwork_155661v2

  CI-20190529: 20190529
  CI_DRM_17329: e4621fd776939016f32f5585b188429d68e5ae5b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8580: 8580
  Patchwork_155661v2: e4621fd776939016f32f5585b188429d68e5ae5b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_155661v2/index.html

[-- Attachment #2: Type: text/html, Size: 204516 bytes --]

Re: [PATCH 4/8] drm/i915/psr: Consider SCL lines when validating vblank for wake latency

[Hogander, Jouni]

On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
> Panel Replay and PSR2 selective update require sufficient vblank
> duration
> to accommodate wake latencies. However, the current
> wake_lines_fit_into_vblank() logic does not account for the minimum
> Set Context Latency (SCL) lines.
> 
> Separate out _intel_psr_min_set_context_latency() to compute the
> minimum
> SCL requirement based on platform and feature usage.
> 
> The alpm_config_valid() helper is updated to pass the necessary
> context for
> determining whether Panel Replay or PSR2 selective update is enabled.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 102 ++++++++++++++-------
> --
>  1 file changed, 61 insertions(+), 41 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2131473cead6..212bd244beed 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1361,14 +1361,64 @@ static int
> intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
>  	return entry_setup_frames;
>  }
>  
> +static
> +int _intel_psr_min_set_context_latency(const struct intel_crtc_state
> *crtc_state,
> +				       bool needs_panel_replay,
> +				       bool needs_sel_update)
> +{
> +	struct intel_display *display =
> to_intel_display(crtc_state);
> +
> +	if (!crtc_state->has_psr)
> +		return 0;
> +
> +	/* Wa_14015401596 */
> +	if (intel_vrr_possible(crtc_state) &&
> IS_DISPLAY_VER(display, 13, 14))
> +		return 1;
> +
> +	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
> +	if (DISPLAY_VER(display) < 20)
> +		return 0;
> +
> +	/*
> +	 * Comment on SRD_STATUS register in Bspec for LunarLake and
> onwards:
> +	 *
> +	 * To deterministically capture the transition of the state
> machine
> +	 * going from SRDOFFACK to IDLE, the delayed V. Blank should
> be at least
> +	 * one line after the non-delayed V. Blank.
> +	 *
> +	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
> +	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[
> VRR Vmax ]
> +	 * - TRANS_VTOTAL[ Vertical Active ])
> +	 *
> +	 * SRD_STATUS is used only by PSR1 on PantherLake.
> +	 * SRD_STATUS is used by PSR1 and Panel Replay DP on
> LunarLake.
> +	 */
> +
> +	if (DISPLAY_VER(display) >= 30 && (needs_panel_replay ||
> +					   needs_sel_update))
> +		return 0;
> +	else if (DISPLAY_VER(display) < 30 && (needs_sel_update ||
> +					      
> intel_crtc_has_type(crtc_state,
> +								  
> INTEL_OUTPUT_EDP)))
> +		return 0;
> +	else
> +		return 1;
> +}
> +
>  static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
>  				       const struct intel_crtc_state
> *crtc_state,
> -				       bool aux_less)
> +				       bool aux_less,
> +				       bool needs_sel_update,
> +				       bool needs_panel_replay)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
>  		crtc_state->hw.adjusted_mode.crtc_vblank_start;
>  	int wake_lines;
> +	int scl = _intel_psr_min_set_context_latency(crtc_state,
> +						    
> needs_sel_update,
> +						    
> needs_panel_replay);

Why can't you use crtc_state->set_context_latency?

> +	vblank -= scl;
>  
>  	if (aux_less)
>  		wake_lines = crtc_state-
> >alpm_state.aux_less_wake_lines;
> @@ -1390,7 +1440,9 @@ static bool wake_lines_fit_into_vblank(struct
> intel_dp *intel_dp,
>  
>  static bool alpm_config_valid(struct intel_dp *intel_dp,
>  			      struct intel_crtc_state *crtc_state,
> -			      bool aux_less)
> +			      bool aux_less,
> +			      bool needs_sel_update,
> +			      bool needs_panel_replay)
>  {
>  	struct intel_display *display = to_intel_display(intel_dp);
>  
> @@ -1400,7 +1452,8 @@ static bool alpm_config_valid(struct intel_dp
> *intel_dp,
>  		return false;
>  	}
>  
> -	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state,
> aux_less)) {
> +	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state,
> aux_less,
> +					needs_sel_update,
> needs_panel_replay)) {
>  		drm_dbg_kms(display->drm,
>  			    "PSR2/Panel Replay not enabled, too
> short vblank time\n");
>  		return false;
> @@ -1492,7 +1545,7 @@ static bool intel_psr2_config_valid(struct
> intel_dp *intel_dp,
>  		return false;
>  	}
>  
> -	if (!alpm_config_valid(intel_dp, crtc_state, false))
> +	if (!alpm_config_valid(intel_dp, crtc_state, false, true,
> crtc_state->has_panel_replay))

This is a bit misleading. Someone might think intel_psr2_config_valid
could be called with crtc_state->has_panel_replay == 1. Rather use
false here.

BR,

Jouni Högander

>  		return false;
>  
>  	if (!crtc_state->enable_psr2_sel_fetch &&
> @@ -1643,7 +1696,7 @@ _panel_replay_compute_config(struct intel_dp
> *intel_dp,
>  		return false;
>  	}
>  
> -	if (!alpm_config_valid(intel_dp, crtc_state, true))
> +	if (!alpm_config_valid(intel_dp, crtc_state, true, false,
> true))
>  		return false;
>  
>  	return true;
> @@ -2371,43 +2424,10 @@ void
> intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
>   */
>  int intel_psr_min_set_context_latency(const struct intel_crtc_state
> *crtc_state)
>  {
> -	struct intel_display *display =
> to_intel_display(crtc_state);
> -
> -	if (!crtc_state->has_psr)
> -		return 0;
> -
> -	/* Wa_14015401596 */
> -	if (intel_vrr_possible(crtc_state) &&
> IS_DISPLAY_VER(display, 13, 14))
> -		return 1;
> -
> -	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
> -	if (DISPLAY_VER(display) < 20)
> -		return 0;
>  
> -	/*
> -	 * Comment on SRD_STATUS register in Bspec for LunarLake and
> onwards:
> -	 *
> -	 * To deterministically capture the transition of the state
> machine
> -	 * going from SRDOFFACK to IDLE, the delayed V. Blank should
> be at least
> -	 * one line after the non-delayed V. Blank.
> -	 *
> -	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
> -	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[
> VRR Vmax ]
> -	 * - TRANS_VTOTAL[ Vertical Active ])
> -	 *
> -	 * SRD_STATUS is used only by PSR1 on PantherLake.
> -	 * SRD_STATUS is used by PSR1 and Panel Replay DP on
> LunarLake.
> -	 */
> -
> -	if (DISPLAY_VER(display) >= 30 && (crtc_state-
> >has_panel_replay ||
> -					   crtc_state-
> >has_sel_update))
> -		return 0;
> -	else if (DISPLAY_VER(display) < 30 && (crtc_state-
> >has_sel_update ||
> -					      
> intel_crtc_has_type(crtc_state,
> -								  
> INTEL_OUTPUT_EDP)))
> -		return 0;
> -	else
> -		return 1;
> +	return _intel_psr_min_set_context_latency(crtc_state,
> +						  crtc_state-
> >has_panel_replay,
> +						  crtc_state-
> >has_sel_update);
>  }
>  
>  static u32 man_trk_ctl_enable_bit_get(struct intel_display *display)

Re: [PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features

[Hogander, Jouni]

On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
> Currently, wake line latency checks rely on the vblank length,
> which does not account for either the extra vblank delay for icl/tgl
> or for
> the optimized guardband which will come into picture later at some
> point.
> 
> Introduce intel_dp_compute_config_late() to handle late-stage
> configuration checks for DP/eDP features. For now, it validates
> whether the
> final vblank (with extra vblank delay) or guardband is sufficient to
> support wake line latencies required by Panel Replay and PSR2
> selective
> update.
> 
> Check if vblank is sufficient for PSR features, and disable them if
> their
> wake requirements cannot be accomodated.

Now as we are adding this: Can't we just drop checks made earlier and
rely on psr_compute_config_late checking the vblank?

BR,

Jouni Högander

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c |  3 ++
>  drivers/gpu/drm/i915/display/intel_dp.c  |  9 +++++
>  drivers/gpu/drm/i915/display/intel_dp.h  |  3 ++
>  drivers/gpu/drm/i915/display/intel_psr.c | 51 ++++++++++++++++++++--
> --
>  drivers/gpu/drm/i915/display/intel_psr.h |  2 +
>  5 files changed, 60 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c09aa759f4d4..94c593bbedf4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4560,6 +4560,9 @@ static int intel_ddi_compute_config_late(struct
> intel_encoder *encoder,
>  	struct drm_connector *connector = conn_state->connector;
>  	u8 port_sync_transcoders = 0;
>  
> +	if (intel_crtc_has_dp_encoder(crtc_state))
> +		intel_dp_compute_config_late(encoder, crtc_state,
> conn_state);
> +
>  	drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
>  		    encoder->base.base.id, encoder->base.name,
>  		    crtc_state->uapi.crtc->base.id, crtc_state-
> >uapi.crtc->name);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index a723e846321f..e481ff4c4959 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct intel_display
> *display)
>  		}
>  	}
>  }
> +
> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
> +				  struct intel_crtc_state
> *crtc_state,
> +				  struct drm_connector_state
> *conn_state)
> +{
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> +	intel_psr_compute_config_late(intel_dp, crtc_state);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index b379443e0211..0d9573ca44cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct
> intel_crtc_state *crtc_state,
>  int intel_dp_dsc_bpp_step_x16(const struct intel_connector
> *connector);
>  void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool
> force_on_external);
>  bool intel_dp_in_hdr_mode(const struct drm_connector_state
> *conn_state);
> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
> +				  struct intel_crtc_state
> *crtc_state,
> +				  struct drm_connector_state
> *conn_state);
>  
>  #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 212bd244beed..dcab4127b399 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1405,6 +1405,20 @@ int _intel_psr_min_set_context_latency(const
> struct intel_crtc_state *crtc_state
>  		return 1;
>  }
>  
> +static bool _wake_lines_fit_into_vblank(const struct
> intel_crtc_state *crtc_state,
> +					int vblank,
> +					int wake_lines)
> +{
> +	if (crtc_state->req_psr2_sdp_prior_scanline)
> +		vblank -= 1;
> +
> +	/* Vblank >= PSR2_CTL Block Count Number maximum line count
> */
> +	if (vblank < wake_lines)
> +		return false;
> +
> +	return true;
> +}
> +
>  static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
>  				       const struct intel_crtc_state
> *crtc_state,
>  				       bool aux_less,
> @@ -1428,14 +1442,7 @@ static bool wake_lines_fit_into_vblank(struct
> intel_dp *intel_dp,
>  					       crtc_state-
> >alpm_state.fast_wake_lines) :
>  			crtc_state->alpm_state.io_wake_lines;
>  
> -	if (crtc_state->req_psr2_sdp_prior_scanline)
> -		vblank -= 1;
> -
> -	/* Vblank >= PSR2_CTL Block Count Number maximum line count
> */
> -	if (vblank < wake_lines)
> -		return false;
> -
> -	return true;
> +	return _wake_lines_fit_into_vblank(crtc_state, vblank,
> wake_lines);
>  }
>  
>  static bool alpm_config_valid(struct intel_dp *intel_dp,
> @@ -4346,3 +4353,31 @@ bool intel_psr_needs_alpm_aux_less(struct
> intel_dp *intel_dp,
>  {
>  	return intel_dp_is_edp(intel_dp) && crtc_state-
> >has_panel_replay;
>  }
> +
> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
> +				   struct intel_crtc_state
> *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	int vblank = intel_crtc_vblank_length(crtc_state);
> +	int aux_less_wake_lines = crtc_state-
> >alpm_state.aux_less_wake_lines;
> +	int wake_lines = DISPLAY_VER(display) < 20 ?
> +			 psr2_block_count_lines(crtc_state-
> >alpm_state.io_wake_lines,
> +						crtc_state-
> >alpm_state.fast_wake_lines) :
> +			 crtc_state->alpm_state.io_wake_lines;
> +
> +	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state) &&
> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
> aux_less_wake_lines)) {
> +		drm_dbg_kms(display->drm,
> +			    "Disabling Panel replay: vblank
> insufficient for wakelines = %d\n",
> +			    aux_less_wake_lines);
> +		crtc_state->has_panel_replay = false;
> +	}
> +
> +	if (crtc_state->has_sel_update &&
> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
> wake_lines)) {
> +		drm_dbg_kms(display->drm,
> +			    "Disabling Selective Update: vblank
> insufficient for wakelines = %d\n",
> +			    wake_lines);
> +		crtc_state->has_sel_update = false;
> +	}
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> b/drivers/gpu/drm/i915/display/intel_psr.h
> index 9147996d6c9e..b17ce312dc37 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct
> intel_display *display);
>  bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct
> intel_crtc_state *crtc_state);
>  bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>  				   const struct intel_crtc_state
> *crtc_state);
> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
> +				   struct intel_crtc_state
> *crtc_state);
>  
>  #endif /* __INTEL_PSR_H__ */

Re: [PATCH 4/8] drm/i915/psr: Consider SCL lines when validating vblank for wake latency

[Nautiyal, Ankit K]

On 10/10/2025 12:10 PM, Hogander, Jouni wrote:
> On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
>> Panel Replay and PSR2 selective update require sufficient vblank
>> duration
>> to accommodate wake latencies. However, the current
>> wake_lines_fit_into_vblank() logic does not account for the minimum
>> Set Context Latency (SCL) lines.
>>
>> Separate out _intel_psr_min_set_context_latency() to compute the
>> minimum
>> SCL requirement based on platform and feature usage.
>>
>> The alpm_config_valid() helper is updated to pass the necessary
>> context for
>> determining whether Panel Replay or PSR2 selective update is enabled.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Cc: Animesh Manna <animesh.manna@intel.com>
>> Cc: Jouni Högander <jouni.hogander@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_psr.c | 102 ++++++++++++++-------
>> --
>>   1 file changed, 61 insertions(+), 41 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
>> b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 2131473cead6..212bd244beed 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -1361,14 +1361,64 @@ static int
>> intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
>>   	return entry_setup_frames;
>>   }
>>   
>> +static
>> +int _intel_psr_min_set_context_latency(const struct intel_crtc_state
>> *crtc_state,
>> +				       bool needs_panel_replay,
>> +				       bool needs_sel_update)
>> +{
>> +	struct intel_display *display =
>> to_intel_display(crtc_state);
>> +
>> +	if (!crtc_state->has_psr)
>> +		return 0;
>> +
>> +	/* Wa_14015401596 */
>> +	if (intel_vrr_possible(crtc_state) &&
>> IS_DISPLAY_VER(display, 13, 14))
>> +		return 1;
>> +
>> +	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
>> +	if (DISPLAY_VER(display) < 20)
>> +		return 0;
>> +
>> +	/*
>> +	 * Comment on SRD_STATUS register in Bspec for LunarLake and
>> onwards:
>> +	 *
>> +	 * To deterministically capture the transition of the state
>> machine
>> +	 * going from SRDOFFACK to IDLE, the delayed V. Blank should
>> be at least
>> +	 * one line after the non-delayed V. Blank.
>> +	 *
>> +	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
>> +	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[
>> VRR Vmax ]
>> +	 * - TRANS_VTOTAL[ Vertical Active ])
>> +	 *
>> +	 * SRD_STATUS is used only by PSR1 on PantherLake.
>> +	 * SRD_STATUS is used by PSR1 and Panel Replay DP on
>> LunarLake.
>> +	 */
>> +
>> +	if (DISPLAY_VER(display) >= 30 && (needs_panel_replay ||
>> +					   needs_sel_update))
>> +		return 0;
>> +	else if (DISPLAY_VER(display) < 30 && (needs_sel_update ||
>> +					
>> intel_crtc_has_type(crtc_state,
>> +								
>> INTEL_OUTPUT_EDP)))
>> +		return 0;
>> +	else
>> +		return 1;
>> +}
>> +
>>   static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
>>   				       const struct intel_crtc_state
>> *crtc_state,
>> -				       bool aux_less)
>> +				       bool aux_less,
>> +				       bool needs_sel_update,
>> +				       bool needs_panel_replay)
>>   {
>>   	struct intel_display *display = to_intel_display(intel_dp);
>>   	int vblank = crtc_state->hw.adjusted_mode.crtc_vblank_end -
>>   		crtc_state->hw.adjusted_mode.crtc_vblank_start;
>>   	int wake_lines;
>> +	int scl = _intel_psr_min_set_context_latency(crtc_state,
>> +						
>> needs_sel_update,
>> +						
>> needs_panel_replay);
> Why can't you use crtc_state->set_context_latency?

This check wake_lines_fit_into_vblank() is called during 
encoder->compute_config() path (specifically in psr_compute_config()).

At this point of time set_context_latency is not computed. It is 
computed later in intel_crtc_compute_config().

There is some more discussion about it in : 
https://lore.kernel.org/all/aOVOJp2zeN1eCp7O@intel.com/

Perhaps I should have mentioned this in cover-letter.



>
>> +	vblank -= scl;
>>   
>>   	if (aux_less)
>>   		wake_lines = crtc_state-
>>> alpm_state.aux_less_wake_lines;
>> @@ -1390,7 +1440,9 @@ static bool wake_lines_fit_into_vblank(struct
>> intel_dp *intel_dp,
>>   
>>   static bool alpm_config_valid(struct intel_dp *intel_dp,
>>   			      struct intel_crtc_state *crtc_state,
>> -			      bool aux_less)
>> +			      bool aux_less,
>> +			      bool needs_sel_update,
>> +			      bool needs_panel_replay)
>>   {
>>   	struct intel_display *display = to_intel_display(intel_dp);
>>   
>> @@ -1400,7 +1452,8 @@ static bool alpm_config_valid(struct intel_dp
>> *intel_dp,
>>   		return false;
>>   	}
>>   
>> -	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state,
>> aux_less)) {
>> +	if (!wake_lines_fit_into_vblank(intel_dp, crtc_state,
>> aux_less,
>> +					needs_sel_update,
>> needs_panel_replay)) {
>>   		drm_dbg_kms(display->drm,
>>   			    "PSR2/Panel Replay not enabled, too
>> short vblank time\n");
>>   		return false;
>> @@ -1492,7 +1545,7 @@ static bool intel_psr2_config_valid(struct
>> intel_dp *intel_dp,
>>   		return false;
>>   	}
>>   
>> -	if (!alpm_config_valid(intel_dp, crtc_state, false))
>> +	if (!alpm_config_valid(intel_dp, crtc_state, false, true,
>> crtc_state->has_panel_replay))
> This is a bit misleading. Someone might think intel_psr2_config_valid
> could be called with crtc_state->has_panel_replay == 1. Rather use
> false here.

Hmm makes sense we are checking for psr2_config_valid() only when 
crtc_state->has_panel_replay is false.

Thanks for pointing this out, will fix this.


Regards,

Ankit

>
> BR,
>
> Jouni Högander
>
>>   		return false;
>>   
>>   	if (!crtc_state->enable_psr2_sel_fetch &&
>> @@ -1643,7 +1696,7 @@ _panel_replay_compute_config(struct intel_dp
>> *intel_dp,
>>   		return false;
>>   	}
>>   
>> -	if (!alpm_config_valid(intel_dp, crtc_state, true))
>> +	if (!alpm_config_valid(intel_dp, crtc_state, true, false,
>> true))
>>   		return false;
>>   
>>   	return true;
>> @@ -2371,43 +2424,10 @@ void
>> intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
>>    */
>>   int intel_psr_min_set_context_latency(const struct intel_crtc_state
>> *crtc_state)
>>   {
>> -	struct intel_display *display =
>> to_intel_display(crtc_state);
>> -
>> -	if (!crtc_state->has_psr)
>> -		return 0;
>> -
>> -	/* Wa_14015401596 */
>> -	if (intel_vrr_possible(crtc_state) &&
>> IS_DISPLAY_VER(display, 13, 14))
>> -		return 1;
>> -
>> -	/* Rest is for SRD_STATUS needed on LunarLake and onwards */
>> -	if (DISPLAY_VER(display) < 20)
>> -		return 0;
>>   
>> -	/*
>> -	 * Comment on SRD_STATUS register in Bspec for LunarLake and
>> onwards:
>> -	 *
>> -	 * To deterministically capture the transition of the state
>> machine
>> -	 * going from SRDOFFACK to IDLE, the delayed V. Blank should
>> be at least
>> -	 * one line after the non-delayed V. Blank.
>> -	 *
>> -	 * Legacy TG: TRANS_SET_CONTEXT_LATENCY > 0
>> -	 * VRR TG: TRANS_VRR_CTL[ VRR Guardband ] < (TRANS_VRR_VMAX[
>> VRR Vmax ]
>> -	 * - TRANS_VTOTAL[ Vertical Active ])
>> -	 *
>> -	 * SRD_STATUS is used only by PSR1 on PantherLake.
>> -	 * SRD_STATUS is used by PSR1 and Panel Replay DP on
>> LunarLake.
>> -	 */
>> -
>> -	if (DISPLAY_VER(display) >= 30 && (crtc_state-
>>> has_panel_replay ||
>> -					   crtc_state-
>>> has_sel_update))
>> -		return 0;
>> -	else if (DISPLAY_VER(display) < 30 && (crtc_state-
>>> has_sel_update ||
>> -					
>> intel_crtc_has_type(crtc_state,
>> -								
>> INTEL_OUTPUT_EDP)))
>> -		return 0;
>> -	else
>> -		return 1;
>> +	return _intel_psr_min_set_context_latency(crtc_state,
>> +						  crtc_state-
>>> has_panel_replay,
>> +						  crtc_state-
>>> has_sel_update);
>>   }
>>   
>>   static u32 man_trk_ctl_enable_bit_get(struct intel_display *display)

Re: [PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features

[Nautiyal, Ankit K]

On 10/10/2025 12:23 PM, Hogander, Jouni wrote:
> On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
>> Currently, wake line latency checks rely on the vblank length,
>> which does not account for either the extra vblank delay for icl/tgl
>> or for
>> the optimized guardband which will come into picture later at some
>> point.
>>
>> Introduce intel_dp_compute_config_late() to handle late-stage
>> configuration checks for DP/eDP features. For now, it validates
>> whether the
>> final vblank (with extra vblank delay) or guardband is sufficient to
>> support wake line latencies required by Panel Replay and PSR2
>> selective
>> update.
>>
>> Check if vblank is sufficient for PSR features, and disable them if
>> their
>> wake requirements cannot be accomodated.
> Now as we are adding this: Can't we just drop checks made earlier and
> rely on psr_compute_config_late checking the vblank?


You're right to raise this question. The key point is that there are 
dependencies between the PSR configuration, the VRR guardband, and SCL 
that influence the sequence of checks.

Here’s how the flow works:


1. psr_compute_config()
This is called first to determine if PSR is possible.
At this stage:

-> We check if the vblank is long enough to accommodate wake lines.
-> However, we don’t yet know the actual guardband or whether SCL lines 
need to be accounted for.
-> So, we can only establish whether the vblank length is sufficient in 
a general sense.
-> On platforms like ICL/TGL (with extra vblank delay) or with optimized 
guardband, the actual lines may be fewer than the full vblank length.


2. compute_scl()

-> This computes the SCL.
-> If PSR was not enabled earlier, SCL will be 0 at this point.
-> The vblank_start is adjusted to accommodate the SCL lines.


3. vrr_compute_guardband()

-> This sets the guardband.
-> With optimized guardband, we consider max PSR requirements and other 
prefill latencies.
-> On platforms where VRR TG is always active, the guardband cannot be 
changed dynamically and any change in guardband triggers a full modeset.
-> So, the goal is to set a guardband during modeset that works across 
most scenarios.


4. psr_compute_config_late()

-> This is where we re-check if the guardband is sufficient for PSR wake 
time latencies.
-> If not, we disable PSR features that can’t be supported with the 
current timing.


As mentioned in the earlier comment, more details are available in the 
following references:
[1] https://lore.kernel.org/all/aOVOJp2zeN1eCp7O@intel.com/
[2] https://patchwork.freedesktop.org/patch/678520/?series=151245&rev=13

So to answer your question: We can't entirely drop the early checks in 
psr_compute_config(), as it helps to filter PSR early based on vblank 
length, and also helps to get the SCL adjustments. By the time we reach 
psr_compute_config_late() we have more accurate picture to take a call 
to disable specific PSR features.


That said, do you see any issues if we disable these later?
Also, are there other parts or logic that depend on 
crtc_state->has_panel_replay and crtc_state->has_sel_update that you 
think could be moved to psr_compute_config_late()?

Regards,

Ankit

>
> BR,
>
> Jouni Högander
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Cc: Animesh Manna <animesh.manna@intel.com>
>> Cc: Jouni Högander <jouni.hogander@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_ddi.c |  3 ++
>>   drivers/gpu/drm/i915/display/intel_dp.c  |  9 +++++
>>   drivers/gpu/drm/i915/display/intel_dp.h  |  3 ++
>>   drivers/gpu/drm/i915/display/intel_psr.c | 51 ++++++++++++++++++++--
>> --
>>   drivers/gpu/drm/i915/display/intel_psr.h |  2 +
>>   5 files changed, 60 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
>> b/drivers/gpu/drm/i915/display/intel_ddi.c
>> index c09aa759f4d4..94c593bbedf4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>> @@ -4560,6 +4560,9 @@ static int intel_ddi_compute_config_late(struct
>> intel_encoder *encoder,
>>   	struct drm_connector *connector = conn_state->connector;
>>   	u8 port_sync_transcoders = 0;
>>   
>> +	if (intel_crtc_has_dp_encoder(crtc_state))
>> +		intel_dp_compute_config_late(encoder, crtc_state,
>> conn_state);
>> +
>>   	drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
>>   		    encoder->base.base.id, encoder->base.name,
>>   		    crtc_state->uapi.crtc->base.id, crtc_state-
>>> uapi.crtc->name);
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index a723e846321f..e481ff4c4959 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct intel_display
>> *display)
>>   		}
>>   	}
>>   }
>> +
>> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
>> +				  struct intel_crtc_state
>> *crtc_state,
>> +				  struct drm_connector_state
>> *conn_state)
>> +{
>> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> +
>> +	intel_psr_compute_config_late(intel_dp, crtc_state);
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
>> b/drivers/gpu/drm/i915/display/intel_dp.h
>> index b379443e0211..0d9573ca44cb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> @@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct
>> intel_crtc_state *crtc_state,
>>   int intel_dp_dsc_bpp_step_x16(const struct intel_connector
>> *connector);
>>   void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool
>> force_on_external);
>>   bool intel_dp_in_hdr_mode(const struct drm_connector_state
>> *conn_state);
>> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
>> +				  struct intel_crtc_state
>> *crtc_state,
>> +				  struct drm_connector_state
>> *conn_state);
>>   
>>   #endif /* __INTEL_DP_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
>> b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 212bd244beed..dcab4127b399 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -1405,6 +1405,20 @@ int _intel_psr_min_set_context_latency(const
>> struct intel_crtc_state *crtc_state
>>   		return 1;
>>   }
>>   
>> +static bool _wake_lines_fit_into_vblank(const struct
>> intel_crtc_state *crtc_state,
>> +					int vblank,
>> +					int wake_lines)
>> +{
>> +	if (crtc_state->req_psr2_sdp_prior_scanline)
>> +		vblank -= 1;
>> +
>> +	/* Vblank >= PSR2_CTL Block Count Number maximum line count
>> */
>> +	if (vblank < wake_lines)
>> +		return false;
>> +
>> +	return true;
>> +}
>> +
>>   static bool wake_lines_fit_into_vblank(struct intel_dp *intel_dp,
>>   				       const struct intel_crtc_state
>> *crtc_state,
>>   				       bool aux_less,
>> @@ -1428,14 +1442,7 @@ static bool wake_lines_fit_into_vblank(struct
>> intel_dp *intel_dp,
>>   					       crtc_state-
>>> alpm_state.fast_wake_lines) :
>>   			crtc_state->alpm_state.io_wake_lines;
>>   
>> -	if (crtc_state->req_psr2_sdp_prior_scanline)
>> -		vblank -= 1;
>> -
>> -	/* Vblank >= PSR2_CTL Block Count Number maximum line count
>> */
>> -	if (vblank < wake_lines)
>> -		return false;
>> -
>> -	return true;
>> +	return _wake_lines_fit_into_vblank(crtc_state, vblank,
>> wake_lines);
>>   }
>>   
>>   static bool alpm_config_valid(struct intel_dp *intel_dp,
>> @@ -4346,3 +4353,31 @@ bool intel_psr_needs_alpm_aux_less(struct
>> intel_dp *intel_dp,
>>   {
>>   	return intel_dp_is_edp(intel_dp) && crtc_state-
>>> has_panel_replay;
>>   }
>> +
>> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
>> +				   struct intel_crtc_state
>> *crtc_state)
>> +{
>> +	struct intel_display *display = to_intel_display(intel_dp);
>> +	int vblank = intel_crtc_vblank_length(crtc_state);
>> +	int aux_less_wake_lines = crtc_state-
>>> alpm_state.aux_less_wake_lines;
>> +	int wake_lines = DISPLAY_VER(display) < 20 ?
>> +			 psr2_block_count_lines(crtc_state-
>>> alpm_state.io_wake_lines,
>> +						crtc_state-
>>> alpm_state.fast_wake_lines) :
>> +			 crtc_state->alpm_state.io_wake_lines;
>> +
>> +	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state) &&
>> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
>> aux_less_wake_lines)) {
>> +		drm_dbg_kms(display->drm,
>> +			    "Disabling Panel replay: vblank
>> insufficient for wakelines = %d\n",
>> +			    aux_less_wake_lines);
>> +		crtc_state->has_panel_replay = false;
>> +	}
>> +
>> +	if (crtc_state->has_sel_update &&
>> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
>> wake_lines)) {
>> +		drm_dbg_kms(display->drm,
>> +			    "Disabling Selective Update: vblank
>> insufficient for wakelines = %d\n",
>> +			    wake_lines);
>> +		crtc_state->has_sel_update = false;
>> +	}
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
>> b/drivers/gpu/drm/i915/display/intel_psr.h
>> index 9147996d6c9e..b17ce312dc37 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.h
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
>> @@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct
>> intel_display *display);
>>   bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct
>> intel_crtc_state *crtc_state);
>>   bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>>   				   const struct intel_crtc_state
>> *crtc_state);
>> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
>> +				   struct intel_crtc_state
>> *crtc_state);
>>   
>>   #endif /* __INTEL_PSR_H__ */

Re: [PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband

[Ville Syrjälä]

On Thu, Oct 09, 2025 at 02:30:56PM +0530, Ankit Nautiyal wrote:
> The helper intel_vrr_compute_config_late() practically just computes the
> guardband. Rename intel_vrr_compute_config_late() to
> intel_vrr_compute_guardband().
> 
> Since we are going to compute the guardband and then move the
> vblank_start for optmizing guardband move it to
> intel_crtc_compute_config() which handles such changes.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
>  drivers/gpu/drm/i915/display/intel_vrr.c     | 2 +-
>  drivers/gpu/drm/i915/display/intel_vrr.h     | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b57efd870774..cd499e58bed3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2414,6 +2414,8 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
>  	if (ret)
>  		return ret;
>  
> +	intel_vrr_compute_guardband(crtc_state);
> +
>  	ret = intel_dpll_crtc_compute_clock(state, crtc);

Hmm. The intel_dpll_crtc_compute_clock() probably needs to move to the
very start of the function, so that we'll have an accurate clock for the 
eventual guardband calculations. In fact my plan has been to move it
into .compute_config() entirely, but I haven't had time to revisit
this topic in a while :/

For easier bisectability I'd do that move first as a separate patch.

>  	if (ret)
>  		return ret;

The other thing we have here is intel_crtc_compute_pipe_mode(). I have
a feeling I didn't consider the joiner aspect at all with the prefill
helpers. We might need the pipe_mode for the guardband calculations.
I'll have to have a look at what I did there and think a bit more about
how the joiner affects that stuff.


And the other thing I haven't considered at all is MSO. Right now
adjusted_mode will contain the per-segment timings with MSO which,
now that I think about it again, migth be a bad idea (my idea IIRC).
Eg. adjusted_mode based linetime calculations will be skewed by the
overlap included in the segement timings.

We may have to rethink the MSO apporoach to keep the full timings in
adjusted_mode and either introduce yet another mode for the per-segment
timings, or perhaps just do the full<->segment conversions as needed
(set_transcoder_timings()+its readout, compute_m_n(), maybe some other
places as well?).

> @@ -4722,8 +4724,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
>  	struct drm_connector *connector;
>  	int i;
>  
> -	intel_vrr_compute_config_late(crtc_state);
> -
>  	for_each_new_connector_in_state(&state->base, connector,
>  					conn_state, i) {
>  		struct intel_encoder *encoder =
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 4bc14b5e685f..8d71d7dc9d12 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -433,7 +433,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
>  		   intel_vrr_max_vblank_guardband(crtc_state));
>  }
>  
> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(crtc_state);
>  	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index 7317f8730089..bc9044621635 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -21,7 +21,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_check_modeset(struct intel_atomic_state *state);
>  void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>  			      struct drm_connector_state *conn_state);
> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
>  void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
>  void intel_vrr_send_push(struct intel_dsb *dsb,
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

Re: [PATCH 3/8] drm/i915/vblank: Add helper to get correct vblank length

[Ville Syrjälä]

On Thu, Oct 09, 2025 at 02:30:57PM +0530, Ankit Nautiyal wrote:
> Currently crtc_vblank_start is assumed to be the vblank_start for the fixed
> refresh rate case. That value can be different from the variable refresh
> rate case whenever always_use_vrr_tg()==false. On icl/tgl it's always
> different due to the extra vblank delay, and also on adl+ it could be
> different if we were to use an optimized guardband.
> 
> So places where crtc_vblank_start is used to compute vblank length needs
> change so as to account for cases where vrr is enabled. Specifically
> with vrr.enable the effective vblank length is actually guardband.
> 
> Add a helper to get the correct vblank length for both vrr and fixed
> refresh rate cases. Use this helper where vblank_start is used to
> compute the vblank length.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_vblank.c  | 10 ++++++++++
>  drivers/gpu/drm/i915/display/intel_vblank.h  |  2 ++
>  drivers/gpu/drm/i915/display/skl_watermark.c |  3 ++-
>  3 files changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 0b7fcc05e64c..2fc0c1c0bb87 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -767,3 +767,13 @@ int intel_vblank_evade(struct intel_vblank_evade_ctx *evade)
>  
>  	return scanline;
>  }
> +
> +int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state)
> +{
> +	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +
> +	if (crtc_state->vrr.enable)
> +		return crtc_state->vrr.guardband;
> +	else
> +		return adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.h b/drivers/gpu/drm/i915/display/intel_vblank.h
> index 21fbb08d61d5..98d04cacd65f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.h
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.h
> @@ -48,4 +48,6 @@ const struct intel_crtc_state *
>  intel_pre_commit_crtc_state(struct intel_atomic_state *state,
>  			    struct intel_crtc *crtc);
>  
> +int intel_crtc_vblank_length(const struct intel_crtc_state *crtc_state);
> +
>  #endif /* __INTEL_VBLANK_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 9df9ee137bf9..06e5e6c77d2e 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -28,6 +28,7 @@
>  #include "intel_flipq.h"
>  #include "intel_pcode.h"
>  #include "intel_plane.h"
> +#include "intel_vblank.h"
>  #include "intel_wm.h"
>  #include "skl_universal_plane_regs.h"
>  #include "skl_watermark.h"
> @@ -2241,7 +2242,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
>  		scaler_prefill_latency(crtc_state) +
>  		dsc_prefill_latency(crtc_state) +
>  		wm0_lines >
> -		adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
> +		intel_crtc_vblank_length(crtc_state);
>  }
>  
>  static int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

Re: [PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[Ville Syrjälä]

On Thu, Oct 09, 2025 at 02:31:01PM +0530, Ankit Nautiyal wrote:
> As we move towards using a shorter, optimized guardband, we need to adjust
> how the delayed vblank start is computed.
> 
> Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
> intel_vrr_always_use_vrr_tg() is true.
> 
> This also paves way for guardband optimization, by handling the movement of
> the crtc_vblank_start for platforms that have VRR TG always active.
> 
> v2: Drop the helper and add the adjustment directly to
> intel_vrr_compute_guardband(). Ville
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vrr.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 221b25832e56..5f9b8e5c48be 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -436,7 +436,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
>  void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(crtc_state);
> -	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> +	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>  
>  	if (!intel_vrr_possible(crtc_state))
>  		return;
> @@ -444,6 +444,10 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>  	crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
>  					intel_vrr_max_guardband(crtc_state));
>  
> +	if (intel_vrr_always_use_vrr_tg(display))
> +		adjusted_mode->crtc_vblank_start  =
> +			crtc_state->vrr.vmin - crtc_state->vrr.guardband;

Since this is for the fixed refresh rate timings I think we should use
adjusted_mode.crtc_vtotal here instead of vmin (yes the two should be
equivalent at least for now, but I think it's better to be consistent).

And this should be squashed with the readout equivalent to make sure
both sides stay in sync so there's no possibility of angering the state
checker by only having the changes on one side.

> +
>  	if (DISPLAY_VER(display) < 13)
>  		crtc_state->vrr.pipeline_full =
>  			intel_vrr_guardband_to_pipeline_full(crtc_state,
> -- 
> 2.45.2

-- 
Ville Syrjälä
Intel

Re: [PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[Nautiyal, Ankit K]

On 10/10/2025 8:35 PM, Ville Syrjälä wrote:
> On Thu, Oct 09, 2025 at 02:31:01PM +0530, Ankit Nautiyal wrote:
>> As we move towards using a shorter, optimized guardband, we need to adjust
>> how the delayed vblank start is computed.
>>
>> Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
>> intel_vrr_always_use_vrr_tg() is true.
>>
>> This also paves way for guardband optimization, by handling the movement of
>> the crtc_vblank_start for platforms that have VRR TG always active.
>>
>> v2: Drop the helper and add the adjustment directly to
>> intel_vrr_compute_guardband(). Ville
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_vrr.c | 6 +++++-
>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 221b25832e56..5f9b8e5c48be 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -436,7 +436,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
>>   void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>>   {
>>   	struct intel_display *display = to_intel_display(crtc_state);
>> -	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> +	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>>   
>>   	if (!intel_vrr_possible(crtc_state))
>>   		return;
>> @@ -444,6 +444,10 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>>   	crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
>>   					intel_vrr_max_guardband(crtc_state));
>>   
>> +	if (intel_vrr_always_use_vrr_tg(display))
>> +		adjusted_mode->crtc_vblank_start  =
>> +			crtc_state->vrr.vmin - crtc_state->vrr.guardband;
> Since this is for the fixed refresh rate timings I think we should use
> adjusted_mode.crtc_vtotal here instead of vmin (yes the two should be
> equivalent at least for now, but I think it's better to be consistent).

Got it.


>
> And this should be squashed with the readout equivalent to make sure
> both sides stay in sync so there's no possibility of angering the state
> checker by only having the changes on one side.

Right sure, I will merge the two patches.

Regards,

Ankit

>
>> +
>>   	if (DISPLAY_VER(display) < 13)
>>   		crtc_state->vrr.pipeline_full =
>>   			intel_vrr_guardband_to_pipeline_full(crtc_state,
>> -- 
>> 2.45.2

Re: [PATCH 2/8] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband

[Nautiyal, Ankit K]

On 10/10/2025 8:23 PM, Ville Syrjälä wrote:
> On Thu, Oct 09, 2025 at 02:30:56PM +0530, Ankit Nautiyal wrote:
>> The helper intel_vrr_compute_config_late() practically just computes the
>> guardband. Rename intel_vrr_compute_config_late() to
>> intel_vrr_compute_guardband().
>>
>> Since we are going to compute the guardband and then move the
>> vblank_start for optmizing guardband move it to
>> intel_crtc_compute_config() which handles such changes.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
>>   drivers/gpu/drm/i915/display/intel_vrr.c     | 2 +-
>>   drivers/gpu/drm/i915/display/intel_vrr.h     | 2 +-
>>   3 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index b57efd870774..cd499e58bed3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -2414,6 +2414,8 @@ static int intel_crtc_compute_config(struct intel_atomic_state *state,
>>   	if (ret)
>>   		return ret;
>>   
>> +	intel_vrr_compute_guardband(crtc_state);
>> +
>>   	ret = intel_dpll_crtc_compute_clock(state, crtc);
> Hmm. The intel_dpll_crtc_compute_clock() probably needs to move to the
> very start of the function, so that we'll have an accurate clock for the
> eventual guardband calculations. In fact my plan has been to move it
> into .compute_config() entirely, but I haven't had time to revisit
> this topic in a while :/
>
> For easier bisectability I'd do that move first as a separate patch.

Ohh I missed that, will move intel_dpll_crtc_compute_clock() in the 
beginning of the function.


>
>>   	if (ret)
>>   		return ret;
> The other thing we have here is intel_crtc_compute_pipe_mode(). I have
> a feeling I didn't consider the joiner aspect at all with the prefill
> helpers. We might need the pipe_mode for the guardband calculations.
> I'll have to have a look at what I did there and think a bit more about
> how the joiner affects that stuff.

Hmm in that case I guess will move intel_vrr_compute_guardband() at the 
last or perhaps atleast after intel_crtc_compute_pipe_mode().


>
>
> And the other thing I haven't considered at all is MSO. Right now
> adjusted_mode will contain the per-segment timings with MSO which,
> now that I think about it again, migth be a bad idea (my idea IIRC).
> Eg. adjusted_mode based linetime calculations will be skewed by the
> overlap included in the segement timings.
>
> We may have to rethink the MSO apporoach to keep the full timings in
> adjusted_mode and either introduce yet another mode for the per-segment
> timings, or perhaps just do the full<->segment conversions as needed
> (set_transcoder_timings()+its readout, compute_m_n(), maybe some other
> places as well?).

I still look into the series for pre-fill, but yes now I can see how 
joiner and MSO need to be accounted for the prefill computation.

Regards,

Ankit


>
>> @@ -4722,8 +4724,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
>>   	struct drm_connector *connector;
>>   	int i;
>>   
>> -	intel_vrr_compute_config_late(crtc_state);
>> -
>>   	for_each_new_connector_in_state(&state->base, connector,
>>   					conn_state, i) {
>>   		struct intel_encoder *encoder =
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 4bc14b5e685f..8d71d7dc9d12 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -433,7 +433,7 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
>>   		   intel_vrr_max_vblank_guardband(crtc_state));
>>   }
>>   
>> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
>> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
>>   {
>>   	struct intel_display *display = to_intel_display(crtc_state);
>>   	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
>> index 7317f8730089..bc9044621635 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
>> @@ -21,7 +21,7 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_check_modeset(struct intel_atomic_state *state);
>>   void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>>   			      struct drm_connector_state *conn_state);
>> -void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
>> +void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state);
>>   void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
>>   void intel_vrr_send_push(struct intel_dsb *dsb,
>> -- 
>> 2.45.2

Re: [PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features

[Hogander, Jouni]

On Fri, 2025-10-10 at 19:12 +0530, Nautiyal, Ankit K wrote:
> 
> On 10/10/2025 12:23 PM, Hogander, Jouni wrote:
> > On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
> > > Currently, wake line latency checks rely on the vblank length,
> > > which does not account for either the extra vblank delay for
> > > icl/tgl
> > > or for
> > > the optimized guardband which will come into picture later at
> > > some
> > > point.
> > > 
> > > Introduce intel_dp_compute_config_late() to handle late-stage
> > > configuration checks for DP/eDP features. For now, it validates
> > > whether the
> > > final vblank (with extra vblank delay) or guardband is sufficient
> > > to
> > > support wake line latencies required by Panel Replay and PSR2
> > > selective
> > > update.
> > > 
> > > Check if vblank is sufficient for PSR features, and disable them
> > > if
> > > their
> > > wake requirements cannot be accomodated.
> > Now as we are adding this: Can't we just drop checks made earlier
> > and
> > rely on psr_compute_config_late checking the vblank?
> 
> 
> You're right to raise this question. The key point is that there are 
> dependencies between the PSR configuration, the VRR guardband, and
> SCL 
> that influence the sequence of checks.
> 
> Here’s how the flow works:
> 
> 
> 1. psr_compute_config()
> This is called first to determine if PSR is possible.
> At this stage:
> 
> -> We check if the vblank is long enough to accommodate wake lines.
> -> However, we don’t yet know the actual guardband or whether SCL
> lines 
> need to be accounted for.
> -> So, we can only establish whether the vblank length is sufficient
> in 
> a general sense.
> -> On platforms like ICL/TGL (with extra vblank delay) or with
> optimized 
> guardband, the actual lines may be fewer than the full vblank length.

Please add a comment into psr_compute_config that it is roughly
checking if PSR is possible with current understanding of vblank
length. It will be checked later in psr_compute_config_late against
optimized vblank length.
> 
> 
> 2. compute_scl()
> 
> -> This computes the SCL.
> -> If PSR was not enabled earlier, SCL will be 0 at this point.
> -> The vblank_start is adjusted to accommodate the SCL lines.
> 
> 
> 3. vrr_compute_guardband()
> 
> -> This sets the guardband.
> -> With optimized guardband, we consider max PSR requirements and
> other 
> prefill latencies.
> -> On platforms where VRR TG is always active, the guardband cannot
> be 
> changed dynamically and any change in guardband triggers a full
> modeset.
> -> So, the goal is to set a guardband during modeset that works
> across 
> most scenarios.
> 
> 
> 4. psr_compute_config_late()
> 
> -> This is where we re-check if the guardband is sufficient for PSR
> wake 
> time latencies.
> -> If not, we disable PSR features that can’t be supported with the 
> current timing.

Add comment into psr_compute_config_late about SCL being left untouched
and containing intel_psr_set_context_latency if PSR was possible after
intel_psr_compute_config.

> 
> 
> As mentioned in the earlier comment, more details are available in
> the 
> following references:
> [1] https://lore.kernel.org/all/aOVOJp2zeN1eCp7O@intel.com/
> [2]
> https://patchwork.freedesktop.org/patch/678520/?series=151245&rev=13
> 
> So to answer your question: We can't entirely drop the early checks
> in 
> psr_compute_config(), as it helps to filter PSR early based on vblank
> length, and also helps to get the SCL adjustments. By the time we
> reach 
> psr_compute_config_late() we have more accurate picture to take a
> call 
> to disable specific PSR features.
> 
> 
> That said, do you see any issues if we disable these later?
> Also, are there other parts or logic that depend on 
> crtc_state->has_panel_replay and crtc_state->has_sel_update that you 
> think could be moved to psr_compute_config_late()?

I don't see other need for psr_compute_config_late ATM.

BR,

Jouni Högander
> 
> Regards,
> 
> Ankit
> 
> > 
> > BR,
> > 
> > Jouni Högander
> > 
> > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > > Cc: Animesh Manna <animesh.manna@intel.com>
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/display/intel_ddi.c |  3 ++
> > >   drivers/gpu/drm/i915/display/intel_dp.c  |  9 +++++
> > >   drivers/gpu/drm/i915/display/intel_dp.h  |  3 ++
> > >   drivers/gpu/drm/i915/display/intel_psr.c | 51
> > > ++++++++++++++++++++--
> > > --
> > >   drivers/gpu/drm/i915/display/intel_psr.h |  2 +
> > >   5 files changed, 60 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index c09aa759f4d4..94c593bbedf4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -4560,6 +4560,9 @@ static int
> > > intel_ddi_compute_config_late(struct
> > > intel_encoder *encoder,
> > >   	struct drm_connector *connector = conn_state->connector;
> > >   	u8 port_sync_transcoders = 0;
> > >   
> > > +	if (intel_crtc_has_dp_encoder(crtc_state))
> > > +		intel_dp_compute_config_late(encoder,
> > > crtc_state,
> > > conn_state);
> > > +
> > >   	drm_dbg_kms(display->drm, "[ENCODER:%d:%s]
> > > [CRTC:%d:%s]\n",
> > >   		    encoder->base.base.id, encoder->base.name,
> > >   		    crtc_state->uapi.crtc->base.id, crtc_state-
> > > > uapi.crtc->name);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > > b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index a723e846321f..e481ff4c4959 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct
> > > intel_display
> > > *display)
> > >   		}
> > >   	}
> > >   }
> > > +
> > > +void intel_dp_compute_config_late(struct intel_encoder *encoder,
> > > +				  struct intel_crtc_state
> > > *crtc_state,
> > > +				  struct drm_connector_state
> > > *conn_state)
> > > +{
> > > +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > > +
> > > +	intel_psr_compute_config_late(intel_dp, crtc_state);
> > > +}
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> > > b/drivers/gpu/drm/i915/display/intel_dp.h
> > > index b379443e0211..0d9573ca44cb 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > > @@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct
> > > intel_crtc_state *crtc_state,
> > >   int intel_dp_dsc_bpp_step_x16(const struct intel_connector
> > > *connector);
> > >   void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool
> > > force_on_external);
> > >   bool intel_dp_in_hdr_mode(const struct drm_connector_state
> > > *conn_state);
> > > +void intel_dp_compute_config_late(struct intel_encoder *encoder,
> > > +				  struct intel_crtc_state
> > > *crtc_state,
> > > +				  struct drm_connector_state
> > > *conn_state);
> > >   
> > >   #endif /* __INTEL_DP_H__ */
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 212bd244beed..dcab4127b399 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1405,6 +1405,20 @@ int
> > > _intel_psr_min_set_context_latency(const
> > > struct intel_crtc_state *crtc_state
> > >   		return 1;
> > >   }
> > >   
> > > +static bool _wake_lines_fit_into_vblank(const struct
> > > intel_crtc_state *crtc_state,
> > > +					int vblank,
> > > +					int wake_lines)
> > > +{
> > > +	if (crtc_state->req_psr2_sdp_prior_scanline)
> > > +		vblank -= 1;
> > > +
> > > +	/* Vblank >= PSR2_CTL Block Count Number maximum line
> > > count
> > > */
> > > +	if (vblank < wake_lines)
> > > +		return false;
> > > +
> > > +	return true;
> > > +}
> > > +
> > >   static bool wake_lines_fit_into_vblank(struct intel_dp
> > > *intel_dp,
> > >   				       const struct
> > > intel_crtc_state
> > > *crtc_state,
> > >   				       bool aux_less,
> > > @@ -1428,14 +1442,7 @@ static bool
> > > wake_lines_fit_into_vblank(struct
> > > intel_dp *intel_dp,
> > >   					       crtc_state-
> > > > alpm_state.fast_wake_lines) :
> > >   			crtc_state->alpm_state.io_wake_lines;
> > >   
> > > -	if (crtc_state->req_psr2_sdp_prior_scanline)
> > > -		vblank -= 1;
> > > -
> > > -	/* Vblank >= PSR2_CTL Block Count Number maximum line
> > > count
> > > */
> > > -	if (vblank < wake_lines)
> > > -		return false;
> > > -
> > > -	return true;
> > > +	return _wake_lines_fit_into_vblank(crtc_state, vblank,
> > > wake_lines);
> > >   }
> > >   
> > >   static bool alpm_config_valid(struct intel_dp *intel_dp,
> > > @@ -4346,3 +4353,31 @@ bool intel_psr_needs_alpm_aux_less(struct
> > > intel_dp *intel_dp,
> > >   {
> > >   	return intel_dp_is_edp(intel_dp) && crtc_state-
> > > > has_panel_replay;
> > >   }
> > > +
> > > +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
> > > +				   struct intel_crtc_state
> > > *crtc_state)
> > > +{
> > > +	struct intel_display *display =
> > > to_intel_display(intel_dp);
> > > +	int vblank = intel_crtc_vblank_length(crtc_state);
> > > +	int aux_less_wake_lines = crtc_state-
> > > > alpm_state.aux_less_wake_lines;
> > > +	int wake_lines = DISPLAY_VER(display) < 20 ?
> > > +			 psr2_block_count_lines(crtc_state-
> > > > alpm_state.io_wake_lines,
> > > +						crtc_state-
> > > > alpm_state.fast_wake_lines) :
> > > +			 crtc_state->alpm_state.io_wake_lines;
> > > +
> > > +	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state)
> > > &&
> > > +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
> > > aux_less_wake_lines)) {
> > > +		drm_dbg_kms(display->drm,
> > > +			    "Disabling Panel replay: vblank
> > > insufficient for wakelines = %d\n",
> > > +			    aux_less_wake_lines);
> > > +		crtc_state->has_panel_replay = false;
> > > +	}
> > > +
> > > +	if (crtc_state->has_sel_update &&
> > > +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
> > > wake_lines)) {
> > > +		drm_dbg_kms(display->drm,
> > > +			    "Disabling Selective Update: vblank
> > > insufficient for wakelines = %d\n",
> > > +			    wake_lines);
> > > +		crtc_state->has_sel_update = false;
> > > +	}
> > > +}
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> > > b/drivers/gpu/drm/i915/display/intel_psr.h
> > > index 9147996d6c9e..b17ce312dc37 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> > > @@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct
> > > intel_display *display);
> > >   bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const
> > > struct
> > > intel_crtc_state *crtc_state);
> > >   bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
> > >   				   const struct intel_crtc_state
> > > *crtc_state);
> > > +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
> > > +				   struct intel_crtc_state
> > > *crtc_state);
> > >   
> > >   #endif /* __INTEL_PSR_H__ */

Re: [PATCH 5/8] drm/i915/display: Check if final vblank is sufficient for PSR features

[Nautiyal, Ankit K]

On 10/13/2025 4:27 PM, Hogander, Jouni wrote:
> On Fri, 2025-10-10 at 19:12 +0530, Nautiyal, Ankit K wrote:
>> On 10/10/2025 12:23 PM, Hogander, Jouni wrote:
>>> On Thu, 2025-10-09 at 14:30 +0530, Ankit Nautiyal wrote:
>>>> Currently, wake line latency checks rely on the vblank length,
>>>> which does not account for either the extra vblank delay for
>>>> icl/tgl
>>>> or for
>>>> the optimized guardband which will come into picture later at
>>>> some
>>>> point.
>>>>
>>>> Introduce intel_dp_compute_config_late() to handle late-stage
>>>> configuration checks for DP/eDP features. For now, it validates
>>>> whether the
>>>> final vblank (with extra vblank delay) or guardband is sufficient
>>>> to
>>>> support wake line latencies required by Panel Replay and PSR2
>>>> selective
>>>> update.
>>>>
>>>> Check if vblank is sufficient for PSR features, and disable them
>>>> if
>>>> their
>>>> wake requirements cannot be accomodated.
>>> Now as we are adding this: Can't we just drop checks made earlier
>>> and
>>> rely on psr_compute_config_late checking the vblank?
>>
>> You're right to raise this question. The key point is that there are
>> dependencies between the PSR configuration, the VRR guardband, and
>> SCL
>> that influence the sequence of checks.
>>
>> Here’s how the flow works:
>>
>>
>> 1. psr_compute_config()
>> This is called first to determine if PSR is possible.
>> At this stage:
>>
>> -> We check if the vblank is long enough to accommodate wake lines.
>> -> However, we don’t yet know the actual guardband or whether SCL
>> lines
>> need to be accounted for.
>> -> So, we can only establish whether the vblank length is sufficient
>> in
>> a general sense.
>> -> On platforms like ICL/TGL (with extra vblank delay) or with
>> optimized
>> guardband, the actual lines may be fewer than the full vblank length.
> Please add a comment into psr_compute_config that it is roughly
> checking if PSR is possible with current understanding of vblank
> length. It will be checked later in psr_compute_config_late against
> optimized vblank length.

Makes sense. Will add the appropriate comment.


>>
>> 2. compute_scl()
>>
>> -> This computes the SCL.
>> -> If PSR was not enabled earlier, SCL will be 0 at this point.
>> -> The vblank_start is adjusted to accommodate the SCL lines.
>>
>>
>> 3. vrr_compute_guardband()
>>
>> -> This sets the guardband.
>> -> With optimized guardband, we consider max PSR requirements and
>> other
>> prefill latencies.
>> -> On platforms where VRR TG is always active, the guardband cannot
>> be
>> changed dynamically and any change in guardband triggers a full
>> modeset.
>> -> So, the goal is to set a guardband during modeset that works
>> across
>> most scenarios.
>>
>>
>> 4. psr_compute_config_late()
>>
>> -> This is where we re-check if the guardband is sufficient for PSR
>> wake
>> time latencies.
>> -> If not, we disable PSR features that can’t be supported with the
>> current timing.
> Add comment into psr_compute_config_late about SCL being left untouched
> and containing intel_psr_set_context_latency if PSR was possible after
> intel_psr_compute_config.

Hmm sure can add rationale for not re-setting SCL.

Thanks & Regards,

Ankit

>
>>
>> As mentioned in the earlier comment, more details are available in
>> the
>> following references:
>> [1] https://lore.kernel.org/all/aOVOJp2zeN1eCp7O@intel.com/
>> [2]
>> https://patchwork.freedesktop.org/patch/678520/?series=151245&rev=13
>>
>> So to answer your question: We can't entirely drop the early checks
>> in
>> psr_compute_config(), as it helps to filter PSR early based on vblank
>> length, and also helps to get the SCL adjustments. By the time we
>> reach
>> psr_compute_config_late() we have more accurate picture to take a
>> call
>> to disable specific PSR features.
>>
>>
>> That said, do you see any issues if we disable these later?
>> Also, are there other parts or logic that depend on
>> crtc_state->has_panel_replay and crtc_state->has_sel_update that you
>> think could be moved to psr_compute_config_late()?
> I don't see other need for psr_compute_config_late ATM.
>
> BR,
>
> Jouni Högander
>> Regards,
>>
>> Ankit
>>
>>> BR,
>>>
>>> Jouni Högander
>>>
>>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>>> Cc: Animesh Manna <animesh.manna@intel.com>
>>>> Cc: Jouni Högander <jouni.hogander@intel.com>
>>>> ---
>>>>    drivers/gpu/drm/i915/display/intel_ddi.c |  3 ++
>>>>    drivers/gpu/drm/i915/display/intel_dp.c  |  9 +++++
>>>>    drivers/gpu/drm/i915/display/intel_dp.h  |  3 ++
>>>>    drivers/gpu/drm/i915/display/intel_psr.c | 51
>>>> ++++++++++++++++++++--
>>>> --
>>>>    drivers/gpu/drm/i915/display/intel_psr.h |  2 +
>>>>    5 files changed, 60 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
>>>> b/drivers/gpu/drm/i915/display/intel_ddi.c
>>>> index c09aa759f4d4..94c593bbedf4 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>>>> @@ -4560,6 +4560,9 @@ static int
>>>> intel_ddi_compute_config_late(struct
>>>> intel_encoder *encoder,
>>>>    	struct drm_connector *connector = conn_state->connector;
>>>>    	u8 port_sync_transcoders = 0;
>>>>    
>>>> +	if (intel_crtc_has_dp_encoder(crtc_state))
>>>> +		intel_dp_compute_config_late(encoder,
>>>> crtc_state,
>>>> conn_state);
>>>> +
>>>>    	drm_dbg_kms(display->drm, "[ENCODER:%d:%s]
>>>> [CRTC:%d:%s]\n",
>>>>    		    encoder->base.base.id, encoder->base.name,
>>>>    		    crtc_state->uapi.crtc->base.id, crtc_state-
>>>>> uapi.crtc->name);
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>>>> b/drivers/gpu/drm/i915/display/intel_dp.c
>>>> index a723e846321f..e481ff4c4959 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>>> @@ -6979,3 +6979,12 @@ void intel_dp_mst_resume(struct
>>>> intel_display
>>>> *display)
>>>>    		}
>>>>    	}
>>>>    }
>>>> +
>>>> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
>>>> +				  struct intel_crtc_state
>>>> *crtc_state,
>>>> +				  struct drm_connector_state
>>>> *conn_state)
>>>> +{
>>>> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>>> +
>>>> +	intel_psr_compute_config_late(intel_dp, crtc_state);
>>>> +}
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
>>>> b/drivers/gpu/drm/i915/display/intel_dp.h
>>>> index b379443e0211..0d9573ca44cb 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>>>> @@ -218,5 +218,8 @@ int intel_dp_compute_min_hblank(struct
>>>> intel_crtc_state *crtc_state,
>>>>    int intel_dp_dsc_bpp_step_x16(const struct intel_connector
>>>> *connector);
>>>>    void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool
>>>> force_on_external);
>>>>    bool intel_dp_in_hdr_mode(const struct drm_connector_state
>>>> *conn_state);
>>>> +void intel_dp_compute_config_late(struct intel_encoder *encoder,
>>>> +				  struct intel_crtc_state
>>>> *crtc_state,
>>>> +				  struct drm_connector_state
>>>> *conn_state);
>>>>    
>>>>    #endif /* __INTEL_DP_H__ */
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
>>>> b/drivers/gpu/drm/i915/display/intel_psr.c
>>>> index 212bd244beed..dcab4127b399 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>>>> @@ -1405,6 +1405,20 @@ int
>>>> _intel_psr_min_set_context_latency(const
>>>> struct intel_crtc_state *crtc_state
>>>>    		return 1;
>>>>    }
>>>>    
>>>> +static bool _wake_lines_fit_into_vblank(const struct
>>>> intel_crtc_state *crtc_state,
>>>> +					int vblank,
>>>> +					int wake_lines)
>>>> +{
>>>> +	if (crtc_state->req_psr2_sdp_prior_scanline)
>>>> +		vblank -= 1;
>>>> +
>>>> +	/* Vblank >= PSR2_CTL Block Count Number maximum line
>>>> count
>>>> */
>>>> +	if (vblank < wake_lines)
>>>> +		return false;
>>>> +
>>>> +	return true;
>>>> +}
>>>> +
>>>>    static bool wake_lines_fit_into_vblank(struct intel_dp
>>>> *intel_dp,
>>>>    				       const struct
>>>> intel_crtc_state
>>>> *crtc_state,
>>>>    				       bool aux_less,
>>>> @@ -1428,14 +1442,7 @@ static bool
>>>> wake_lines_fit_into_vblank(struct
>>>> intel_dp *intel_dp,
>>>>    					       crtc_state-
>>>>> alpm_state.fast_wake_lines) :
>>>>    			crtc_state->alpm_state.io_wake_lines;
>>>>    
>>>> -	if (crtc_state->req_psr2_sdp_prior_scanline)
>>>> -		vblank -= 1;
>>>> -
>>>> -	/* Vblank >= PSR2_CTL Block Count Number maximum line
>>>> count
>>>> */
>>>> -	if (vblank < wake_lines)
>>>> -		return false;
>>>> -
>>>> -	return true;
>>>> +	return _wake_lines_fit_into_vblank(crtc_state, vblank,
>>>> wake_lines);
>>>>    }
>>>>    
>>>>    static bool alpm_config_valid(struct intel_dp *intel_dp,
>>>> @@ -4346,3 +4353,31 @@ bool intel_psr_needs_alpm_aux_less(struct
>>>> intel_dp *intel_dp,
>>>>    {
>>>>    	return intel_dp_is_edp(intel_dp) && crtc_state-
>>>>> has_panel_replay;
>>>>    }
>>>> +
>>>> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
>>>> +				   struct intel_crtc_state
>>>> *crtc_state)
>>>> +{
>>>> +	struct intel_display *display =
>>>> to_intel_display(intel_dp);
>>>> +	int vblank = intel_crtc_vblank_length(crtc_state);
>>>> +	int aux_less_wake_lines = crtc_state-
>>>>> alpm_state.aux_less_wake_lines;
>>>> +	int wake_lines = DISPLAY_VER(display) < 20 ?
>>>> +			 psr2_block_count_lines(crtc_state-
>>>>> alpm_state.io_wake_lines,
>>>> +						crtc_state-
>>>>> alpm_state.fast_wake_lines) :
>>>> +			 crtc_state->alpm_state.io_wake_lines;
>>>> +
>>>> +	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state)
>>>> &&
>>>> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
>>>> aux_less_wake_lines)) {
>>>> +		drm_dbg_kms(display->drm,
>>>> +			    "Disabling Panel replay: vblank
>>>> insufficient for wakelines = %d\n",
>>>> +			    aux_less_wake_lines);
>>>> +		crtc_state->has_panel_replay = false;
>>>> +	}
>>>> +
>>>> +	if (crtc_state->has_sel_update &&
>>>> +	    !_wake_lines_fit_into_vblank(crtc_state, vblank,
>>>> wake_lines)) {
>>>> +		drm_dbg_kms(display->drm,
>>>> +			    "Disabling Selective Update: vblank
>>>> insufficient for wakelines = %d\n",
>>>> +			    wake_lines);
>>>> +		crtc_state->has_sel_update = false;
>>>> +	}
>>>> +}
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
>>>> b/drivers/gpu/drm/i915/display/intel_psr.h
>>>> index 9147996d6c9e..b17ce312dc37 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_psr.h
>>>> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
>>>> @@ -83,5 +83,7 @@ void intel_psr_debugfs_register(struct
>>>> intel_display *display);
>>>>    bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const
>>>> struct
>>>> intel_crtc_state *crtc_state);
>>>>    bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>>>>    				   const struct intel_crtc_state
>>>> *crtc_state);
>>>> +void intel_psr_compute_config_late(struct intel_dp *intel_dp,
>>>> +				   struct intel_crtc_state
>>>> *crtc_state);
>>>>    
>>>>    #endif /* __INTEL_PSR_H__ */

[PATCH 7/8] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG

[Ankit Nautiyal]

As we move towards using a shorter, optimized guardband, we need to adjust
how the delayed vblank start is computed.

Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
intel_vrr_always_use_vrr_tg() is true. Also update the
pipe_mode->crtc_vblank_start which is derived from
adjusted_mode->crtc_vblank_start in intel_crtc_compute_pipe_mode().

To maintain consistency between the computed and readout paths, also update
the readout logic in intel_vrr_get_config() to overwrite crtc_vblank_start
with the same value (vtotal - guardband) on platforms with always-on
VRR TG. pipe_mode is derived

This also paves way for guardband optimization, by handling the movement of
the crtc_vblank_start for platforms that have VRR TG always active.

v2: Drop the helper and add the adjustment directly to
    intel_vrr_compute_guardband(). (Ville)
v3: Use adjusted_mode.crtc_vtotal instead of vmin and include the readout
    logic to keep the compute and readout paths in sync. (Ville)
v4: Also set pipe_mode->crtc_vblank_start as its derived from
    adjusted_mode. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8d71d7dc9d12..1cfcc31bd899 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -436,7 +436,8 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
 void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+	struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
 
 	if (!intel_vrr_possible(crtc_state))
 		return;
@@ -444,6 +445,13 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
 	crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
 					intel_vrr_max_guardband(crtc_state));
 
+	if (intel_vrr_always_use_vrr_tg(display)) {
+		adjusted_mode->crtc_vblank_start  =
+			adjusted_mode->crtc_vtotal - crtc_state->vrr.guardband;
+		pipe_mode->crtc_vblank_start =
+			adjusted_mode->crtc_vblank_start;
+	}
+
 	if (DISPLAY_VER(display) < 13)
 		crtc_state->vrr.pipeline_full =
 			intel_vrr_guardband_to_pipeline_full(crtc_state,
@@ -821,6 +829,19 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 	 */
 	if (crtc_state->vrr.enable)
 		crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+
+	/*
+	 * For platforms that always use the VRR timing generator, we overwrite
+	 * crtc_vblank_start with vtotal - guardband to reflect the delayed
+	 * vblank start. This works for both default and optimized guardband values.
+	 * On other platforms, we keep the original value from
+	 * intel_get_transcoder_timings() and apply adjustments only in VRR-specific
+	 * paths as needed.
+	 */
+	if (intel_vrr_always_use_vrr_tg(display))
+		crtc_state->hw.adjusted_mode.crtc_vblank_start =
+			crtc_state->hw.adjusted_mode.crtc_vtotal -
+			crtc_state->vrr.guardband;
 }
 
 int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)
-- 
2.45.2