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Limits don't apply > when DSC is enabled. > > For the currently supported versions of HDMI, pixel clock is already > limited to 600Mhz so nothing needs to be done there as of now. > > BSpec: 49199, 68912 > > v2: Add this limit to the new helper > intel_dp_pixel_rate_fits_dotclk(). (Ankit) > > Signed-off-by: Chaitanya Kumar Borah > Signed-off-by: Ankit Nautiyal > --- > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++ > drivers/gpu/drm/i915/display/intel_display.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ > 3 files changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 7491e00e3858..04021ad6b473 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -8001,6 +8001,18 @@ void intel_setup_outputs(struct intel_display *display) > drm_helper_move_panel_connectors_to_head(display->drm); > } > > +int intel_dotclock_limit(struct intel_display *display) The name should reflect that it's the (stricter) non-DSC dotclock limit, so maybe intel_max_uncompressed_dotclock()? > +{ I guess display->cdclk.max_dotclk_freq could be used as a base, reducing it if needed. > + if (DISPLAY_VERx100(display) == 3002) > + return 937500; While the above WCL limit is indeed in bspec, I couldn't find the HSD for it. Windows doesn't use this limit either. So could it be a follow-up to add the limit for this platform, to reduce the number of affacted platforms until it's clarified why Windows doesn't use it? > + else if (DISPLAY_VER(display) >= 30) > + return 1350000; This one for PTL matches bspec, there is an HSD for it and it is also used by Windows. > + else if (DISPLAY_VER(display) >= 13) > + return 1200000; > + else > + return 1100000; The above ICL-MTL limits are not used by Windows either and I couldn't find the corresponding HSDs. So could adding these two be done separately as a follow-up (even though they are listed by bspec)? > +} > + > static int max_dotclock(struct intel_display *display) > { > int max_dotclock = display->cdclk.max_dotclk_freq; > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index f8e6e4e82722..0009c305f140 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -488,6 +488,7 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc, > struct intel_link_m_n *m_n); > int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n); > int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config); > +int intel_dotclock_limit(struct intel_display *display); > enum intel_display_power_domain intel_port_to_power_domain(struct intel_digital_port *dig_port); > enum intel_display_power_domain > intel_aux_power_domain(struct intel_digital_port *dig_port); > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index a6a1a803d860..bd8ba6db01db 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1456,6 +1456,9 @@ bool intel_dp_pixel_rate_fits_dotclk(struct intel_display *display, > target_clock, > htotal, > dsc_slice_count); > + else > + effective_dotclk_limit = > + min(max_dotclk, intel_dotclock_limit(display)) * num_joined_pipes; > > return target_clock <= effective_dotclk_limit; > } > -- > 2.45.2 >