From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
arun.r.murthy@intel.com
Subject: Re: [PATCH 3/5] drm/i915/dp: Add helper for AS SDP TL and fix documentation
Date: Wed, 11 Mar 2026 14:04:13 +0200 [thread overview]
Message-ID: <abFaPftPmvwGPXkD@intel.com> (raw)
In-Reply-To: <270d9647-7238-4d78-a942-d45ea846b763@intel.com>
On Wed, Mar 11, 2026 at 05:24:22PM +0530, Nautiyal, Ankit K wrote:
>
> On 3/10/2026 2:38 PM, Ville Syrjälä wrote:
> > On Fri, Mar 06, 2026 at 02:02:09PM +0200, Ville Syrjälä wrote:
> >> On Thu, Mar 05, 2026 at 09:31:16AM +0530, Ankit Nautiyal wrote:
> >>> Add a helper, intel_dp_emp_as_sdp_tl(), to compute the EMP_AS_SDP_TL
> >>> value used when programming the double‑buffering point and transmission
> >>> line for VRR packets.
> >>> Also improve the documentation: the AS SDP transmission line corresponds
> >>> to the T1 position, which maps to the start of the Vsync pulse.
> >>>
> >>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> >>> ---
> >>> drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++
> >>> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> >>> drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
> >>> 3 files changed, 12 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >>> index 86390553800d..9204a813639a 100644
> >>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >>> @@ -7288,6 +7288,15 @@ bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
> >>> return true;
> >>> }
> >>>
> >>> +int intel_dp_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
> >>> +{
> >>> + /*
> >>> + * EMP_AS_SDP_TL defines the T1 position : The default AS SDP position
> >>> + * that corresponds to the start of the Vsync pulse.
> >>> + */
> >>> + return crtc_state->vrr.vsync_start;
> >>> +}
> >> Other parts of the code (eg. ALPM) still just directly use the
> >> adjusted_mode timings to calculate the same stuff. So this doesn't
> >> really seem to help us.
> >>
> >> Feels like all of our abstractions around this SDP transmission line
> >> stuff are way too low level, and thus the same information is
> >> calculated in different ways in different parts of the code. There
> >> should be a single place that defines the transmission line(s),
> >> and everyone should just consult that stuff (regardless of whether
> >> the platform uses implicit transmission lines, EMP_AS_SDP_TL, or
> >> the new stuff).
> > I think instead of tracking the low level stagger values directly, what
> > we want to track is just the transmission line itself for each type of
> > SDP. That seems like a form that is easier to use elsewhere in the code.
>
> Agreed storing TL will be easier, stagger values can be derived from that.
>
> So we set the transmission line for the packets only if we plan to send
> them right?
I don't see why we wouldn't just always set them. And if we set one we
have to anyway set all of them since they're all derived from that one
pair of registers.
>
>
> >
> > And to accommodate VRR I suppose we should use the "transmission line
> > is specified relative to the end of vblank/vtotal" convention for all
> > of these.
>
> Makes sense.
>
>
> Regards,
>
> Ankit
>
> >
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2026-03-11 12:05 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-05 4:01 [PATCH 0/5] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 1/5] drm/i915/nvl: Add register definitions for common " Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 2/5] drm/i915/dp: Add fields to store CMN_SDP_TL register state in crtc_state Ankit Nautiyal
2026-03-06 11:55 ` Ville Syrjälä
2026-03-10 4:54 ` Nautiyal, Ankit K
2026-03-05 4:01 ` [PATCH 3/5] drm/i915/dp: Add helper for AS SDP TL and fix documentation Ankit Nautiyal
2026-03-06 12:02 ` Ville Syrjälä
2026-03-10 4:57 ` Nautiyal, Ankit K
2026-03-10 9:08 ` Ville Syrjälä
2026-03-11 11:54 ` Nautiyal, Ankit K
2026-03-11 12:04 ` Ville Syrjälä [this message]
2026-03-11 12:10 ` Nautiyal, Ankit K
2026-03-05 4:01 ` [PATCH 4/5] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 5/5] drm/i915/dp: Enable Common " Ankit Nautiyal
2026-03-06 11:56 ` Ville Syrjälä
2026-03-10 5:01 ` Nautiyal, Ankit K
2026-03-05 5:40 ` ✓ i915.CI.BAT: success for Add support for Common SDP Transmission Line Patchwork
2026-03-06 4:34 ` ✗ i915.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=abFaPftPmvwGPXkD@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=ankit.k.nautiyal@intel.com \
--cc=arun.r.murthy@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox