Re: [CI] drm/i915/display: change pipe allocation order for discrete platforms

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Mar 30, 2026 at 06:35:54PM +0300, Ville Syrjälä wrote:
> On Mon, Mar 30, 2026 at 02:37:47PM +0300, Jani Nikula wrote:
> > On Mon, 16 Mar 2026, Jani Nikula <jani.nikula@intel.com> wrote:
> > > When big joiner is enabled, it reserves the adjacent pipe as the
> > > secondary pipe. This happens without the user space knowing, and
> > > subsequent attempts at using the CRTC with that pipe will fail. If the
> > > user space does not have a coping mechanism, i.e. trying another CRTC,
> > > this leads to a black screen.
> > >
> > > Try to reduce the impact of the problem on discrete platforms by mapping
> > > the CRTCs to pipes in order A, C, B, and D. If the user space reserves
> > > CRTCs in order, this should trick it to using pipes that are more likely
> > > to be available for and after joining.
> > >
> > > Limit this to discrete platforms, which have four pipes, and no eDP, a
> > > combination that should benefit the most with least drawbacks.
> > 
> > Ville, I think it's time to review and, pretty soon, merge this.
> > 
> > Our IGT changes to deconflate CRTCs and pipes have been merged, and
> > there's the removal of invalid igt_crtc_t at [1] left. The trybot CI
> > results on i915 for swapping pipes B and C on all platforms, not just
> > discrete like here, didn't break anything either anymore [2].
> > 
> > I'm contemplating slapping Cc: stable on this too.
> > 
> > There's the FIXME on the CRTC index warning.
> 
> IIRC we already concluded that the WARN is unnecessary. I'd have to
> look through the previous mails to see what I actually said there.

Couldn't find the mail, but glanced at the code again, and I think I
removed that requirement long ago.

After commit 3a5e09d82f97 ("drm/i915: Fix intel_modeset_pipe_config_late()
for bigjoiner") intel_atomic_check_(big)joiner() isn't even in the same
loop anymore as the uapi->hw state copy,compute_config*(),etc. so clearly
all that stuff will have happened beforehand. Before that the situation
was a bit more unclear so that requirement might have still held then.
Too lazy to really dig that far.

> 
> > With the A+C and B+D
> > pairing there's no issue, the CRTC indexes remain in that order. But can
> > we ever really end up with B+C pairing?
> 
> It might be rare if userspace picks crtcs in order. But IIRC we had
> bugs where it was clear userspace was just picking random crtcs willy
> nilly. IIRC it was sway doing it, and I think I even proposed a
> uapi documentation update to suggest using crtcs in order. Can't 
> remember that happened to that one.
> 
> But I think we still want the "walk the crtcs in pipe order" change,
> mainly to keep the more optimal commit sequence. Also I'm not quite
> 100% convinced we don't have some subtle assumption somewhere about
> the order.
> 
> BTW I just realized that DG2 may also get a slight extra benefit from
> the reordering because A+C has twice the dbuf space compared to A+B.
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Ville Syrjälä
Intel