From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH] drm/i915: Check lane sharing between pipes B & C using atomic state Date: 27 Mar 2015 13:12:47 -0700 Message-ID: References: <1427461208-26204-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id D25606EC1B for ; Fri, 27 Mar 2015 13:12:51 -0700 (PDT) In-Reply-To: <1427461208-26204-1-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, ander.conselvan.de.oliveira@intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBQUkMgUUEgUFJUUyAoUGF0Y2ggUmVncmVzc2lvbiBUZXN0IFN5c3RlbSBDb250 YWN0OiBzaHVhbmcuaGVAaW50ZWwuY29tKQpUYXNrIGlkOiA2MDgwCi0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS1TdW1tYXJ5LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLQpQbGF0Zm9ybSAgICAgICAgICBEZWx0YSAgICAgICAgICBkcm0taW50ZWwtbmlnaHRs eSAgICAgICAgICBTZXJpZXMgQXBwbGllZApQTlYgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgMjc2LzI3NiAgICAgICAgICAgICAgMjc2LzI3NgpJTEsgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgMzAzLzMwMyAgICAgICAgICAgICAgMzAzLzMwMwpTTkIgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgMzA0LzMwNCAgICAgICAgICAgICAgMzA0LzMwNApJVkIg ICAgICAgICAgICAgICAgIC0yICAgICAgICAgICAgICAzMzAvMzMwICAgICAgICAgICAgICAzMjgv MzMwCkJZVCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAyODcvMjg3ICAgICAgICAg ICAgICAyODcvMjg3CkhTVyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAzNjEvMzYx ICAgICAgICAgICAgICAzNjEvMzYxCkJEVyAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAzMDkvMzA5ICAgICAgICAgICAgICAzMDkvMzA5Ci0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS1EZXRhaWxlZC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0K UGxhdGZvcm0gIFRlc3QgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGRybS1pbnRlbC1u aWdodGx5ICAgICAgICAgIFNlcmllcyBBcHBsaWVkCipJVkIgIGlndEBnZW1fc3RvcmVkd19iYXRj aGVzX2xvb3BAbm9ybWFsICAgICAgUEFTUyg2KSAgICAgIERNRVNHX1dBUk4oMSlQQVNTKDEpCihk bWVzZyBwYXRjaCBhcHBsaWVkKWRybTppOTE1X2hhbmdjaGVja19lbGFwc2VkW2k5MTVdXSpFUlJP UipIYW5nY2hlY2tfdGltZXJfZWxhcHNlZC4uLmJsaXR0ZXJfcmluZ19pZGxlQEhhbmdjaGVjayB0 aW1lciBlbGFwc2VkLi4uIGJsaXR0ZXIgcmluZyBpZGxlCipJVkIgIGlndEBnZW1fcHdyaXRlX3By ZWFkQHNub29wZWQtY29weS1wZXJmb3JtYW5jZSAgICAgIFBBU1MoNSkgICAgICBETUVTR19XQVJO KDIpCihkbWVzZyBwYXRjaCBhcHBsaWVkKWRybTppOTE1X2hhbmdjaGVja19lbGFwc2VkW2k5MTVd XSpFUlJPUipIYW5nY2hlY2tfdGltZXJfZWxhcHNlZC4uLmJsaXR0ZXJfcmluZ19pZGxlQEhhbmdj aGVjayB0aW1lciBlbGFwc2VkLi4uIGJsaXR0ZXIgcmluZyBpZGxlCk5vdGU6IFlvdSBuZWVkIHRv IHBheSBtb3JlIGF0dGVudGlvbiB0byBsaW5lIHN0YXJ0IHdpdGggJyonCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QK SW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Au b3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==