From mboxrd@z Thu Jan 1 00:00:00 1970 From: shuang.he@intel.com Subject: Re: [PATCH v4] drm/i915/chv: Set min freq to efficient frequency on chv Date: 29 Apr 2015 19:42:02 -0700 Message-ID: References: <1430276001-3454-1-git-send-email-deepak.s@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id D8B8B6E177 for ; Wed, 29 Apr 2015 19:42:03 -0700 (PDT) In-Reply-To: <1430276001-3454-1-git-send-email-deepak.s@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: shuang.he@intel.com, ethan.gao@intel.com, intel-gfx@lists.freedesktop.org, deepak.s@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org VGVzdGVkLUJ5OiBJbnRlbCBHcmFwaGljcyBRQSBQUlRTIChQYXRjaCBSZWdyZXNzaW9uIFRlc3Qg U3lzdGVtIENvbnRhY3Q6IHNodWFuZy5oZUBpbnRlbC5jb20pClRhc2sgaWQ6IDYyODIKLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLVN1bW1hcnktLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tClBsYXRmb3JtICAgICAgICAgIERlbHRhICAgICAgICAgIGRybS1p bnRlbC1uaWdodGx5ICAgICAgICAgIFNlcmllcyBBcHBsaWVkClBOViAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAyNzYvMjc2ICAgICAgICAgICAgICAyNzYvMjc2CklMSyAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAzMDIvMzAyICAgICAgICAgICAgICAzMDIvMzAyClNO QiAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAzMTYvMzE2ICAgICAgICAgICAgICAz MTYvMzE2CklWQiAgICAgICAgICAgICAgICAgLTEgICAgICAgICAgICAgIDI2NC8yNjQgICAgICAg ICAgICAgIDI2My8yNjQKQllUICAgICAgICAgICAgICAgICAtNCAgICAgICAgICAgICAgMjI3LzIy NyAgICAgICAgICAgICAgMjIzLzIyNwpCRFcgICAgICAgICAgICAgICAgIC0xICAgICAgICAgICAg ICAzMTgvMzE4ICAgICAgICAgICAgICAzMTcvMzE4Ci0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS1EZXRhaWxlZC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0K UGxhdGZvcm0gIFRlc3QgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGRybS1pbnRlbC1u aWdodGx5ICAgICAgICAgIFNlcmllcyBBcHBsaWVkCipJVkIgIGlndEBnZW1fc3RvcmVkd19iYXRj aGVzX2xvb3BAbm9ybWFsICAgICAgUEFTUygyKSAgICAgIEZBSUwoMSlQQVNTKDEpCipCWVQgIGln dEBnZW1fZHVtbXlfcmVsb2NfbG9vcEByZW5kZXIgICAgICBGQUlMKDEpUEFTUyg2KSAgICAgIFRJ TUVPVVQoMSlQQVNTKDEpCipCWVQgIGlndEBnZW1fZXhlY19wYXJzZUBiaXRtYXNrcyAgICAgIEZB SUwoMSlQQVNTKDQpICAgICAgRE1FU0dfV0FSTigxKVBBU1MoMSkKKGRtZXNnIHBhdGNoIGFwcGxp ZWQpZHJtOmNoZWNrX2NydGNfc3RhdGVbaTkxNV1dKkVSUk9SKm1pc21hdGNoX2luX2hhc19pbmZv ZnJhbWUoZXhwZWN0ZWQjLGZvdW5kIylAbWlzbWF0Y2ggaW4gaGFzX2luZm9mcmFtZSAuKiBmb3Vu ZApXQVJOSU5HOmF0X2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rpc3BsYXkuYzojY2hlY2tf Y3J0Y19zdGF0ZVtpOTE1XSgpQFdBUk5JTkc6LiogYXQgLiogY2hlY2tfY3J0Y19zdGF0ZSsweAog QllUICBpZ3RAZ2VtX3BpcGVfY29udHJvbF9zdG9yZV9sb29wQGZyZXNoLWJ1ZmZlciAgICAgIEZB SUwoMSlUSU1FT1VUKDQpUEFTUygzKSAgICAgIFRJTUVPVVQoMikKKkJZVCAgaWd0QGdlbV90aWxl ZF9wcmVhZCAgICAgIEZBSUwoMSlQQVNTKDIpICAgICAgRE1FU0dfV0FSTigxKVBBU1MoMSkKKGRt ZXNnIHBhdGNoIGFwcGxpZWQpZHJtOmNoZWNrX2NydGNfc3RhdGVbaTkxNV1dKkVSUk9SKm1pc21h dGNoX2luX2hhc19pbmZvZnJhbWUoZXhwZWN0ZWQjLGZvdW5kIylAbWlzbWF0Y2ggaW4gaGFzX2lu Zm9mcmFtZSAuKiBmb3VuZApXQVJOSU5HOmF0X2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rp c3BsYXkuYzojY2hlY2tfY3J0Y19zdGF0ZVtpOTE1XSgpQFdBUk5JTkc6LiogYXQgLiogY2hlY2tf Y3J0Y19zdGF0ZSsweAoqQkRXICBpZ3RAZ2VtX3VzZXJwdHJfYmxpdHNAZm9ya2VkLXN5bmMtc3dh cHBpbmctbXVsdGlmZC1tZW1wcmVzc3VyZS1ub3JtYWwgICAgICBQQVNTKDIpICAgICAgTk9fUkVT VUxUKDEpUEFTUygxKQpOb3RlOiBZb3UgbmVlZCB0byBwYXkgbW9yZSBhdHRlbnRpb24gdG8gbGlu ZSBzdGFydCB3aXRoICcqJwpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3Rv cC5vcmcKaHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVs LWdmeAo=