* [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
@ 2026-03-30 23:53 Ville Syrjala
2026-03-30 23:53 ` [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
` (10 more replies)
0 siblings, 11 replies; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Restructure the DP/HDMI sink format handling. I got inspired to do this
by https://lore.kernel.org/dri-devel/20260324-color-format-v11-8-605559af4fb4@collabora.com/
I envision that after this the aforementioned patch could just
become something like this:
1. s/intel_foo_compute_formats/intel_foo_compute_formats_auto/
2. Add a new intel_foo_compute_formats()
intel_foo_compute_formats()
{
switch (color_format) {
case YCBCR420:
return intel_foo_compute_output_format(YCBCR420);
case RGB:
return intel_foo_compute_output_format(RGB);
case AUTO:
return intel_foo_compute_formats_auto();
}
}
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Ville Syrjälä (9):
drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also
modes
drm/i915/hdmi: Restructure the sink/output format selection
drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
drm/i915/dp: Restructure the sink/output format selection
drm/i915/dp: Validate "4:2:0 also" modes twice
drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
drm/i915/dp: Validate sink format in .mode_valid()
drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last
resort
drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last
resort
drivers/gpu/drm/i915/display/intel_dp.c | 213 ++++++++++++++--------
drivers/gpu/drm/i915/display/intel_hdmi.c | 167 ++++++++++-------
2 files changed, 237 insertions(+), 143 deletions(-)
--
2.52.0
^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 5:23 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
` (9 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_hdmi_mode_valid() is calling intel_pfit_mode_valid() only
on the first attempt (4:2:0 for "4:2:0 only" modes, 4:4:4 for
everything else). Add the call also for the "4:2:0 also" modes case
so that we actually know the pipe scaler can actually produce the
4:2:0 output.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 05e898d10a2b..072b0554cc24 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2079,6 +2079,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
return status;
sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
+
+ status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+ if (status != MODE_OK)
+ return status;
+
status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
sink_format);
if (status != MODE_OK)
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
2026-03-30 23:53 ` [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-03-31 12:12 ` Nicolas Frattaroli
2026-04-06 5:27 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
` (8 subsequent siblings)
10 siblings, 2 replies; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_hdmi_compute_output_format() is a bit of a mess. Try to
restructure it into a more readable form.
Right now we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes
Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
but in opposite orders. Let's write that out in a more explicit
if-else form. And since I'm running out of function names I'll
rename the function with that high level logic into
intel_hdmi_compute_formats() and it will call (the new) with
intel_hdmi_compute_output_format() with an explicit sink_format
as needed.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
1 file changed, 70 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 072b0554cc24..16873fc7bcb9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
return status;
}
+static enum drm_mode_status
+intel_hdmi_sink_format_valid(struct intel_connector *connector,
+ const struct drm_display_mode *mode,
+ bool has_hdmi_sink,
+ enum intel_output_format sink_format)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ switch (sink_format) {
+ case INTEL_OUTPUT_FORMAT_YCBCR420:
+ if (!has_hdmi_sink ||
+ !connector->base.ycbcr_420_allowed ||
+ !drm_mode_is_420(info, mode))
+ return MODE_NO_420;
+
+ return MODE_OK;
+ case INTEL_OUTPUT_FORMAT_RGB:
+ return MODE_OK;
+ default:
+ MISSING_CASE(sink_format);
+ return MODE_BAD;
+ }
+}
+
static enum drm_mode_status
intel_hdmi_mode_valid(struct drm_connector *_connector,
const struct drm_display_mode *mode)
@@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
return intel_conn_state->force_audio == HDMI_AUDIO_ON;
}
-static enum intel_output_format
-intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
- struct intel_connector *connector,
- bool ycbcr_420_output)
-{
- if (!crtc_state->has_hdmi_sink)
- return INTEL_OUTPUT_FORMAT_RGB;
-
- if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
- return INTEL_OUTPUT_FORMAT_YCBCR420;
- else
- return INTEL_OUTPUT_FORMAT_RGB;
-}
-
static enum intel_output_format
intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
{
@@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
- const struct drm_connector_state *conn_state,
- bool respect_downstream_limits)
+ struct intel_connector *connector,
+ bool respect_downstream_limits,
+ enum intel_output_format sink_format)
{
- struct intel_display *display = to_intel_display(encoder);
- struct intel_connector *connector = to_intel_connector(conn_state->connector);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- const struct drm_display_info *info = &connector->base.display_info;
- bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
- int ret;
- crtc_state->sink_format =
- intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
-
- if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
- drm_dbg_kms(display->drm,
- "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
- crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
- }
+ if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
+ crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
+ return -EINVAL;
+ crtc_state->sink_format = sink_format;
crtc_state->output_format = intel_hdmi_output_format(crtc_state);
- ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
- if (ret) {
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- !crtc_state->has_hdmi_sink ||
- !connector->base.ycbcr_420_allowed ||
- !drm_mode_is_420_also(info, adjusted_mode))
- return ret;
-
- crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- crtc_state->output_format = intel_hdmi_output_format(crtc_state);
- ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+
+ return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
+}
+
+static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state,
+ const struct drm_connector_state *conn_state,
+ bool respect_downstream_limits)
+{
+ struct intel_display *display = to_intel_display(encoder);
+ struct intel_connector *connector = to_intel_connector(conn_state->connector);
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ const struct drm_display_info *info = &connector->base.display_info;
+ int ret;
+
+ if (drm_mode_is_420_only(info, adjusted_mode)) {
+ ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+
+ if (ret) {
+ drm_dbg_kms(display->drm,
+ "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+ ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_RGB);
+ }
+ } else {
+ ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_RGB);
+
+ if (ret && drm_mode_is_420_also(info, adjusted_mode))
+ ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
}
return ret;
@@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
* Try to respect downstream TMDS clock limits first, if
* that fails assume the user might know something we don't.
*/
- ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
+ ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
if (ret)
- ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
+ ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
if (ret) {
drm_dbg_kms(display->drm,
"unsupported HDMI clock (%d kHz), rejecting mode\n",
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
2026-03-30 23:53 ` [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
2026-03-30 23:53 ` [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 5:28 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
` (7 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Restructure the HDMI mode validation to resemble the new
intel_hdmi_compute_formats(). Keeping the two in sync helps
to avoid different bugs in each.
The main difference between mode_valid() and
intel_hdmi_compute_formats() is that we don't want the
Hail Mary RGB fallback for "4:2:0 only" modes.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++++++++++++-----------
1 file changed, 32 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 16873fc7bcb9..95bd38c620d1 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2045,6 +2045,27 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
}
}
+static enum drm_mode_status
+intel_hdmi_mode_valid_format(struct intel_connector *connector,
+ const struct drm_display_mode *mode,
+ int clock, bool has_hdmi_sink,
+ enum intel_output_format sink_format)
+{
+ struct intel_display *display = to_intel_display(connector);
+ enum drm_mode_status status;
+
+ status = intel_hdmi_sink_format_valid(connector, mode,
+ has_hdmi_sink, sink_format);
+ if (status != MODE_OK)
+ return status;
+
+ status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+ if (status != MODE_OK)
+ return status;
+
+ return intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
+}
+
static enum drm_mode_status
intel_hdmi_mode_valid(struct drm_connector *_connector,
const struct drm_display_mode *mode)
@@ -2052,12 +2073,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_display *display = to_intel_display(connector);
struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
+ const struct drm_display_info *info = &connector->base.display_info;
enum drm_mode_status status;
int clock = mode->clock;
int max_dotclk = display->cdclk.max_dotclk_freq;
bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
- bool ycbcr_420_only;
- enum intel_output_format sink_format;
status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
@@ -2084,36 +2104,20 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
if (clock > 600000)
return MODE_CLOCK_HIGH;
- ycbcr_420_only = drm_mode_is_420_only(&connector->base.display_info, mode);
+ if (drm_mode_is_420_only(info, mode)) {
+ status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+ } else {
+ status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+ INTEL_OUTPUT_FORMAT_RGB);
- if (ycbcr_420_only)
- sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- else
- sink_format = INTEL_OUTPUT_FORMAT_RGB;
-
- status = intel_pfit_mode_valid(display, mode, sink_format, 0);
+ if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+ status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+ }
if (status != MODE_OK)
return status;
- status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
- if (status != MODE_OK) {
- if (ycbcr_420_only ||
- !connector->base.ycbcr_420_allowed ||
- !drm_mode_is_420_also(&connector->base.display_info, mode))
- return status;
-
- sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
-
- status = intel_pfit_mode_valid(display, mode, sink_format, 0);
- if (status != MODE_OK)
- return status;
-
- status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
- sink_format);
- if (status != MODE_OK)
- return status;
- }
-
return intel_mode_valid_max_plane_size(display, mode, 1);
}
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (2 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-03-31 13:35 ` Nicolas Frattaroli
2026-03-30 23:53 ` [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
` (6 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Restructure intel_dp_compute_output_format() to resemble the new
intel_hdmi_compute_output_formats().
Again, we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes
Take the exact same approach with the DP code, making the
format selection much less convoluted.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
1 file changed, 69 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4955bd8b11d7..230b45acde29 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
return MODE_OK;
}
+static enum drm_mode_status
+intel_dp_sink_format_valid(struct intel_connector *connector,
+ const struct drm_display_mode *mode,
+ enum intel_output_format sink_format)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ switch (sink_format) {
+ case INTEL_OUTPUT_FORMAT_YCBCR420:
+ if (!connector->base.ycbcr_420_allowed ||
+ !drm_mode_is_420(info, mode))
+ return MODE_NO_420;
+
+ return MODE_OK;
+ case INTEL_OUTPUT_FORMAT_RGB:
+ return MODE_OK;
+ default:
+ MISSING_CASE(sink_format);
+ return MODE_BAD;
+ }
+}
+
int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
{
return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@@ -3330,41 +3352,59 @@ static int
intel_dp_compute_output_format(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state,
- bool respect_downstream_limits)
+ bool respect_downstream_limits,
+ enum intel_output_format sink_format)
{
- struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_connector *connector = intel_dp->attached_connector;
- const struct drm_display_info *info = &connector->base.display_info;
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- bool ycbcr_420_only;
- int ret;
- ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
-
- if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
- drm_dbg_kms(display->drm,
- "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
- crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
- } else {
- crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
- }
+ if (intel_dp_sink_format_valid(connector, adjusted_mode,
+ sink_format) != MODE_OK)
+ return -EINVAL;
+ crtc_state->sink_format = sink_format;
crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
- ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
- respect_downstream_limits);
- if (ret) {
- if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- !connector->base.ycbcr_420_allowed ||
- !drm_mode_is_420_also(info, adjusted_mode))
- return ret;
-
- crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- crtc_state->output_format = intel_dp_output_format(connector,
- crtc_state->sink_format);
- ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
- respect_downstream_limits);
+ return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
+ respect_downstream_limits);
+}
+
+static int
+intel_dp_compute_formats(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state,
+ bool respect_downstream_limits)
+{
+ struct intel_display *display = to_intel_display(encoder);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_connector *connector = intel_dp->attached_connector;
+ const struct drm_display_info *info = &connector->base.display_info;
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ int ret;
+
+ if (drm_mode_is_420_only(info, adjusted_mode)) {
+ ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+
+ if (ret) {
+ drm_dbg_kms(display->drm,
+ "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
+
+ ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_RGB);
+ }
+ } else {
+ ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_RGB);
+
+ if (ret && drm_mode_is_420_also(info, adjusted_mode))
+ ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
+ respect_downstream_limits,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
}
return ret;
@@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
* Try to respect downstream TMDS clock limits first, if
* that fails assume the user might know something we don't.
*/
- ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
+ ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
if (ret)
- ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
+ ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
if (ret)
return ret;
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (3 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 8:45 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
` (5 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we only validate "4:2:0 also" modes as RGB. But
if that fails we could perhaps still use the mode in with
4:2:0 output. All we have to do is retry the validation with
the different sink format.
So far we did the double validation only so far as it affects
PCON TMDS clock limits. But validating everything twice seems
a bit more sane.
Note that intel_dp_output_format() might still end up picking
RGB for the actual output format (and letting PCON deal with
the YCbCr conversion). So I suppose we could still fail the
validation due to that, and forcing even the output format
to 4:2:0 might solve it on a third try. But we'd need the
same fallback logic in intel_dp_compute_config(). For now
this seems sufficient.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 114 +++++++++++++-----------
1 file changed, 61 insertions(+), 53 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 230b45acde29..86319bf09a19 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1320,12 +1320,10 @@ intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
static enum drm_mode_status
intel_dp_mode_valid_downstream(struct intel_connector *connector,
const struct drm_display_mode *mode,
- int target_clock)
+ int target_clock,
+ enum intel_output_format sink_format)
{
struct intel_dp *intel_dp = intel_attached_dp(connector);
- const struct drm_display_info *info = &connector->base.display_info;
- enum drm_mode_status status;
- enum intel_output_format sink_format;
/* If PCON supports FRL MODE, check FRL bandwidth constraints */
if (intel_dp->dfp.pcon_max_frl_bw) {
@@ -1350,25 +1348,9 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
target_clock > intel_dp->dfp.max_dotclock)
return MODE_CLOCK_HIGH;
- sink_format = intel_dp_sink_format(connector, mode);
-
/* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
- status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
- 8, sink_format, true);
-
- if (status != MODE_OK) {
- if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
- !connector->base.ycbcr_420_allowed ||
- !drm_mode_is_420_also(info, mode))
- return status;
- sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
- status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
- 8, sink_format, true);
- if (status != MODE_OK)
- return status;
- }
-
- return MODE_OK;
+ return intel_dp_tmds_clock_valid(intel_dp, target_clock,
+ 8, sink_format, true);
}
static enum drm_mode_status
@@ -1464,15 +1446,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
}
static enum drm_mode_status
-intel_dp_mode_valid(struct drm_connector *_connector,
- const struct drm_display_mode *mode)
+intel_dp_mode_valid_format(struct intel_connector *connector,
+ const struct drm_display_mode *mode,
+ int target_clock,
+ enum intel_output_format sink_format)
{
- struct intel_display *display = to_intel_display(_connector->dev);
- struct intel_connector *connector = to_intel_connector(_connector);
+ struct intel_display *display = to_intel_display(connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
- enum intel_output_format sink_format, output_format;
- const struct drm_display_mode *fixed_mode;
- int target_clock = mode->clock;
+ enum intel_output_format output_format;
int max_rate, mode_rate, max_lanes, max_link_clock;
u16 dsc_max_compressed_bpp = 0;
enum drm_mode_status status;
@@ -1480,29 +1461,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
int num_joined_pipes;
int link_bpp_x16;
- status = intel_cpu_transcoder_mode_valid(display, mode);
- if (status != MODE_OK)
- return status;
-
- if (mode->flags & DRM_MODE_FLAG_DBLCLK)
- return MODE_H_ILLEGAL;
-
- if (mode->clock < 10000)
- return MODE_CLOCK_LOW;
-
- if (intel_dp_hdisplay_bad(display, mode->hdisplay))
- return MODE_H_ILLEGAL;
-
- fixed_mode = intel_panel_fixed_mode(connector, mode);
- if (intel_dp_is_edp(intel_dp) && fixed_mode) {
- status = intel_panel_mode_valid(connector, mode);
- if (status != MODE_OK)
- return status;
-
- target_clock = fixed_mode->clock;
- }
-
- sink_format = intel_dp_sink_format(connector, mode);
output_format = intel_dp_output_format(connector, sink_format);
max_link_clock = intel_dp_max_link_rate(intel_dp);
@@ -1600,7 +1558,57 @@ intel_dp_mode_valid(struct drm_connector *_connector,
if (status != MODE_OK)
return status;
- return intel_dp_mode_valid_downstream(connector, mode, target_clock);
+ return intel_dp_mode_valid_downstream(connector, mode,
+ target_clock, sink_format);
+}
+
+static enum drm_mode_status
+intel_dp_mode_valid(struct drm_connector *_connector,
+ const struct drm_display_mode *mode)
+{
+ struct intel_display *display = to_intel_display(_connector->dev);
+ struct intel_connector *connector = to_intel_connector(_connector);
+ const struct drm_display_info *info = &connector->base.display_info;
+ struct intel_dp *intel_dp = intel_attached_dp(connector);
+ const struct drm_display_mode *fixed_mode;
+ int target_clock = mode->clock;
+ enum drm_mode_status status;
+
+ status = intel_cpu_transcoder_mode_valid(display, mode);
+ if (status != MODE_OK)
+ return status;
+
+ if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+ return MODE_H_ILLEGAL;
+
+ if (mode->clock < 10000)
+ return MODE_CLOCK_LOW;
+
+ if (intel_dp_hdisplay_bad(display, mode->hdisplay))
+ return MODE_H_ILLEGAL;
+
+ fixed_mode = intel_panel_fixed_mode(connector, mode);
+ if (intel_dp_is_edp(intel_dp) && fixed_mode) {
+ status = intel_panel_mode_valid(connector, mode);
+ if (status != MODE_OK)
+ return status;
+
+ target_clock = fixed_mode->clock;
+ }
+
+ if (drm_mode_is_420_only(info, mode)) {
+ status = intel_dp_mode_valid_format(connector, mode, target_clock,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+ } else {
+ status = intel_dp_mode_valid_format(connector, mode, target_clock,
+ INTEL_OUTPUT_FORMAT_RGB);
+
+ if (status != MODE_OK && drm_mode_is_420_also(info, mode))
+ status = intel_dp_mode_valid_format(connector, mode, target_clock,
+ INTEL_OUTPUT_FORMAT_YCBCR420);
+ }
+
+ return status;
}
bool intel_dp_source_supports_tps3(struct intel_display *display)
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (4 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 8:46 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
` (4 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
DVI sinks can't deal with YCbCr. Make sure we have a HDMI sink connected
after the PCON before doing YCbCr 4:2:0 output.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 86319bf09a19..ce40d38557e1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1358,10 +1358,15 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
const struct drm_display_mode *mode,
enum intel_output_format sink_format)
{
+ struct intel_dp *intel_dp = intel_attached_dp(connector);
const struct drm_display_info *info = &connector->base.display_info;
switch (sink_format) {
case INTEL_OUTPUT_FORMAT_YCBCR420:
+ if (intel_dp->dfp.min_tmds_clock &&
+ !intel_dp_has_hdmi_sink(intel_dp))
+ return MODE_NO_420;
+
if (!connector->base.ycbcr_420_allowed ||
!drm_mode_is_420(info, mode))
return MODE_NO_420;
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid()
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (5 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 8:51 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
` (3 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make sure the sink supports out chosen sink format. I suppose it
might be at least possible that some PCONs might not snoop the EDID
hard enough and filter out all the modes that they should.
Also if we ever want to add a similar "force DVI" knob to DP
outputs that we have for native HDMI, we'd need to manually
get rid of anything DVI sinks can't handle.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ce40d38557e1..ed89fbcdd549 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1466,6 +1466,10 @@ intel_dp_mode_valid_format(struct intel_connector *connector,
int num_joined_pipes;
int link_bpp_x16;
+ status = intel_dp_sink_format_valid(connector, mode, sink_format);
+ if (status != MODE_OK)
+ return status;
+
output_format = intel_dp_output_format(connector, sink_format);
max_link_clock = intel_dp_max_link_rate(intel_dp);
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (6 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 8:52 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 9/9] drm/i915/dp: " Ville Syrjala
` (2 subsequent siblings)
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 95bd38c620d1..6bc1689cbf93 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2314,7 +2314,7 @@ static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_YCBCR420);
- if (ret) {
+ if (ret && !respect_downstream_limits) {
drm_dbg_kms(display->drm,
"YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 9/9] drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (7 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
@ 2026-03-30 23:53 ` Ville Syrjala
2026-04-06 8:52 ` Nautiyal, Ankit K
2026-03-31 0:50 ` ✓ i915.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Patchwork
2026-03-31 7:46 ` ✗ i915.CI.Full: failure " Patchwork
10 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjala @ 2026-03-30 23:53 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
already during the first pass when respect_downstream_limits==true.
It seems better to try everything else first (like ignoring TMDS
clock limits) while still preferring 4:2:0, and only if everything
else has failed fall back to RGB.
Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ed89fbcdd549..e23162fc3f8b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3405,7 +3405,7 @@ intel_dp_compute_formats(struct intel_encoder *encoder,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_YCBCR420);
- if (ret) {
+ if (ret && !respect_downstream_limits) {
drm_dbg_kms(display->drm,
"YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
--
2.52.0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (8 preceding siblings ...)
2026-03-30 23:53 ` [PATCH 9/9] drm/i915/dp: " Ville Syrjala
@ 2026-03-31 0:50 ` Patchwork
2026-03-31 7:46 ` ✗ i915.CI.Full: failure " Patchwork
10 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2026-03-31 0:50 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6144 bytes --]
== Series Details ==
Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
URL : https://patchwork.freedesktop.org/series/164124/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_18252 -> Patchwork_164124v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/index.html
Participating hosts (41 -> 40)
------------------------------
Additional (1): bat-adls-6
Missing (2): bat-dg2-13 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_164124v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adls-6: NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic@basic:
- bat-adls-6: NOTRUN -> [SKIP][2] ([i915#15656])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@gem_tiled_pread_basic@basic.html
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][3] -> [DMESG-FAIL][4] ([i915#12061]) +1 other test dmesg-fail
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/bat-mtlp-8/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-mtlp-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- bat-dg2-14: [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/bat-dg2-14/igt@i915_selftest@live@workarounds.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-dg2-14/igt@i915_selftest@live@workarounds.html
- bat-mtlp-9: [PASS][7] -> [DMESG-FAIL][8] ([i915#12061]) +1 other test dmesg-fail
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
* igt@intel_hwmon@hwmon-read:
- bat-adls-6: NOTRUN -> [SKIP][9] ([i915#7707]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@intel_hwmon@hwmon-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adls-6: NOTRUN -> [SKIP][10] ([i915#4103]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-adls-6: NOTRUN -> [SKIP][11] ([i915#3555] / [i915#3840])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adls-6: NOTRUN -> [SKIP][12]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pm_backlight@basic-brightness:
- bat-adls-6: NOTRUN -> [SKIP][13] ([i915#5354])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-mmap-gtt:
- bat-adls-6: NOTRUN -> [SKIP][14] ([i915#1072] / [i915#9732]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adls-6: NOTRUN -> [SKIP][15] ([i915#3555])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adls-6: NOTRUN -> [SKIP][16] ([i915#3291]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-adls-6/igt@prime_vgem@basic-fence-read.html
#### Possible fixes ####
* igt@i915_selftest@live:
- bat-arlh-3: [INCOMPLETE][17] ([i915#15622]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/bat-arlh-3/igt@i915_selftest@live.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-arlh-3/igt@i915_selftest@live.html
* igt@i915_selftest@live@perf:
- bat-arlh-3: [INCOMPLETE][19] -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/bat-arlh-3/igt@i915_selftest@live@perf.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/bat-arlh-3/igt@i915_selftest@live@perf.html
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#15622]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15622
[i915#15656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15656
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_18252 -> Patchwork_164124v1
CI-20190529: 20190529
CI_DRM_18252: 247b271f2f09fedf9c4cc85fcc338217fc396a9a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8836: 8836
Patchwork_164124v1: 247b271f2f09fedf9c4cc85fcc338217fc396a9a @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/index.html
[-- Attachment #2: Type: text/html, Size: 7328 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* ✗ i915.CI.Full: failure for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
` (9 preceding siblings ...)
2026-03-31 0:50 ` ✓ i915.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Patchwork
@ 2026-03-31 7:46 ` Patchwork
10 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2026-03-31 7:46 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 90837 bytes --]
== Series Details ==
Series: drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling
URL : https://patchwork.freedesktop.org/series/164124/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_18252_full -> Patchwork_164124v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_164124v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_164124v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_164124v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_dirtyfb@default-dirtyfb-ioctl:
- shard-dg1: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-16/igt@kms_dirtyfb@default-dirtyfb-ioctl.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-18/igt@kms_dirtyfb@default-dirtyfb-ioctl.html
Known issues
------------
Here are the changes found in Patchwork_164124v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@drm_buddy@drm_buddy:
- shard-tglu-1: NOTRUN -> [SKIP][3] ([i915#15678])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@drm_buddy@drm_buddy.html
* igt@gem_ccs@block-copy-compressed:
- shard-tglu-1: NOTRUN -> [SKIP][4] ([i915#3555] / [i915#9323])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-tglu-1: NOTRUN -> [SKIP][5] ([i915#9323])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-tglu-1: NOTRUN -> [SKIP][6] ([i915#7697])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-rkl: NOTRUN -> [SKIP][7] ([i915#6335])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process:
- shard-mtlp: [PASS][8] -> [DMESG-WARN][9] ([i915#13363]) +1 other test dmesg-warn
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-mtlp-6/igt@gem_ctx_persistence@legacy-engines-mixed-process.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-7/igt@gem_ctx_persistence@legacy-engines-mixed-process.html
* igt@gem_eio@in-flight-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][10] ([i915#13390])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk3/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@parallel:
- shard-tglu-1: NOTRUN -> [SKIP][11] ([i915#4525]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-rkl: NOTRUN -> [SKIP][12] ([i915#3281]) +3 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- shard-dg2: NOTRUN -> [SKIP][13] ([i915#3281]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@gem_exec_reloc@basic-write-wc-noreloc.html
* igt@gem_exec_suspend@basic-s3-devices:
- shard-rkl: [PASS][14] -> [ABORT][15] ([i915#15131])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-8/igt@gem_exec_suspend@basic-s3-devices.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-1/igt@gem_exec_suspend@basic-s3-devices.html
* igt@gem_exec_suspend@basic-s3-devices@smem:
- shard-rkl: [PASS][16] -> [ABORT][17] ([i915#15542])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-8/igt@gem_exec_suspend@basic-s3-devices@smem.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-1/igt@gem_exec_suspend@basic-s3-devices@smem.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-tglu-1: NOTRUN -> [SKIP][18] ([i915#4613]) +3 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@massive-random:
- shard-glk: NOTRUN -> [SKIP][19] ([i915#4613])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@random:
- shard-rkl: NOTRUN -> [SKIP][20] ([i915#4613])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gem_lmem_swapping@random.html
* igt@gem_mmap_gtt@cpuset-medium-copy-xy:
- shard-dg1: NOTRUN -> [SKIP][21] ([i915#4077]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
- shard-mtlp: NOTRUN -> [SKIP][22] ([i915#4077]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@gem_mmap_gtt@cpuset-medium-copy-xy.html
* igt@gem_partial_pwrite_pread@write-snoop:
- shard-dg1: NOTRUN -> [SKIP][23] ([i915#3282])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@gem_partial_pwrite_pread@write-snoop.html
- shard-mtlp: NOTRUN -> [SKIP][24] ([i915#3282])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@gem_partial_pwrite_pread@write-snoop.html
* igt@gem_partial_pwrite_pread@write-uncached:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#3282])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gem_partial_pwrite_pread@write-uncached.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglu: NOTRUN -> [WARN][26] ([i915#2658])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@reject-modify-context-protection-off-3:
- shard-dg1: NOTRUN -> [SKIP][27] ([i915#4270])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@gem_pxp@reject-modify-context-protection-off-3.html
* igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
- shard-mtlp: NOTRUN -> [SKIP][28] ([i915#8428])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-tglu-1: NOTRUN -> [SKIP][29] ([i915#3297]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync:
- shard-tglu: NOTRUN -> [SKIP][30] ([i915#3297]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#3297])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gem_userptr_blits@unsync-unmap.html
* igt@gen3_render_tiledy_blits:
- shard-dg2: NOTRUN -> [SKIP][32] +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@gen3_render_tiledy_blits.html
* igt@gen9_exec_parse@allowed-all:
- shard-tglu: NOTRUN -> [SKIP][33] ([i915#2527] / [i915#2856])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@bb-oversize:
- shard-rkl: NOTRUN -> [SKIP][34] ([i915#2527])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@gen9_exec_parse@bb-oversize.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglu-1: NOTRUN -> [SKIP][35] ([i915#2527] / [i915#2856])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@gen9_exec_parse@bb-start-cmd.html
* igt@i915_drm_fdinfo@busy-hang@vcs0:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#14073]) +7 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@i915_drm_fdinfo@busy-hang@vcs0.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-tglu-1: NOTRUN -> [SKIP][37] ([i915#8399]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_suspend@forcewake:
- shard-glk: NOTRUN -> [INCOMPLETE][38] ([i915#4817])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk6/igt@i915_suspend@forcewake.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- shard-dg2: NOTRUN -> [SKIP][39] ([i915#4212])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-rkl: [PASS][40] -> [INCOMPLETE][41] ([i915#12761]) +1 other test incomplete
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_async_flips@async-flip-suspend-resume.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-tglu-1: NOTRUN -> [SKIP][42] ([i915#9531])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-tglu-1: NOTRUN -> [SKIP][43] ([i915#1769] / [i915#3555])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-dg2: [PASS][44] -> [FAIL][45] ([i915#5956]) +1 other test fail
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg2-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-4/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
- shard-dg2: NOTRUN -> [FAIL][46] ([i915#5956]) +1 other test fail
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-4/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-mtlp: NOTRUN -> [SKIP][47]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-tglu-1: NOTRUN -> [SKIP][48] ([i915#5286]) +4 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
- shard-tglu: NOTRUN -> [SKIP][49] ([i915#5286]) +2 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#5190])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-dg2: NOTRUN -> [SKIP][51] ([i915#4538] / [i915#5190])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-rkl: NOTRUN -> [SKIP][52] +1 other test skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#6095]) +9 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_ccs@bad-aux-stride-y-tiled-ccs@pipe-d-edp-1.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
- shard-glk11: NOTRUN -> [SKIP][54] +67 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk11/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#6095]) +16 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][56] ([i915#6095]) +81 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][57] ([i915#12313])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-dg1: NOTRUN -> [SKIP][58] ([i915#12313])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
- shard-mtlp: NOTRUN -> [SKIP][59] ([i915#12313])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1:
- shard-glk10: NOTRUN -> [SKIP][61] +131 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk10/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][62] ([i915#12805])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][63] ([i915#6095]) +29 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-glk: NOTRUN -> [SKIP][64] +125 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [INCOMPLETE][65] ([i915#15582]) +1 other test incomplete
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][66] ([i915#14098] / [i915#6095]) +43 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][67] ([i915#10307] / [i915#6095]) +65 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1:
- shard-dg1: NOTRUN -> [SKIP][68] ([i915#6095]) +147 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#12313])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-tglu-1: NOTRUN -> [SKIP][70] ([i915#6095]) +49 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_cdclk@mode-transition:
- shard-tglu-1: NOTRUN -> [SKIP][71] ([i915#3742])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu: NOTRUN -> [SKIP][72] ([i915#3742])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-dg2: NOTRUN -> [SKIP][73] ([i915#11151] / [i915#7828])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-tglu: NOTRUN -> [SKIP][74] ([i915#11151] / [i915#7828]) +1 other test skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@dp-hpd-storm-disable:
- shard-tglu-1: NOTRUN -> [SKIP][75] ([i915#11151] / [i915#7828]) +5 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-dg1: NOTRUN -> [SKIP][76] ([i915#11151] / [i915#7828])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
- shard-mtlp: NOTRUN -> [SKIP][77] ([i915#11151] / [i915#7828])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_content_protection@atomic-dpms:
- shard-tglu: NOTRUN -> [SKIP][78] ([i915#15865]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-tglu-1: NOTRUN -> [SKIP][79] ([i915#15865]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#15330] / [i915#3299])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-tglu-1: NOTRUN -> [SKIP][81] ([i915#15330])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-tglu-1: NOTRUN -> [FAIL][82] ([i915#13566]) +1 other test fail
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-tglu-1: NOTRUN -> [SKIP][83] ([i915#3555])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][84] ([i915#13566]) +1 other test fail
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-8/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-tglu: NOTRUN -> [SKIP][85] ([i915#3555]) +3 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#3555])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#13049])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-glk: NOTRUN -> [INCOMPLETE][88] ([i915#12358] / [i915#14152] / [i915#7882])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk8/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [INCOMPLETE][89] ([i915#12358] / [i915#14152])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk8/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-tglu-1: NOTRUN -> [SKIP][90] ([i915#4103])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-mtlp: NOTRUN -> [SKIP][91] ([i915#9809]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2: NOTRUN -> [SKIP][92] ([i915#13749])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-mtlp: NOTRUN -> [SKIP][93] ([i915#13749])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-8/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-tglu-1: NOTRUN -> [SKIP][94] ([i915#13707])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-tglu-1: NOTRUN -> [SKIP][95] ([i915#3840])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][96] ([i915#3955])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-tglu: NOTRUN -> [SKIP][97] ([i915#1839])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-tglu: NOTRUN -> [SKIP][98] ([i915#9337])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr2:
- shard-rkl: NOTRUN -> [SKIP][99] ([i915#658])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-dpms:
- shard-tglu: NOTRUN -> [SKIP][100] ([i915#3637] / [i915#9934]) +3 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_flip@2x-flip-vs-dpms.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-dg2: NOTRUN -> [SKIP][101] ([i915#9934])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-plain-flip:
- shard-tglu-1: NOTRUN -> [SKIP][102] ([i915#3637] / [i915#9934]) +4 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@bo-too-big:
- shard-dg1: [PASS][103] -> [DMESG-WARN][104] ([i915#4423])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-19/igt@kms_flip@bo-too-big.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_flip@bo-too-big.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-glk10: NOTRUN -> [INCOMPLETE][105] ([i915#12745] / [i915#4839])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk10/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
- shard-glk10: NOTRUN -> [INCOMPLETE][106] ([i915#12745])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk10/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check:
- shard-tglu: [PASS][107] -> [FAIL][108] ([i915#14600]) +1 other test fail
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-tglu-3/igt@kms_flip@plain-flip-ts-check.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-7/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][109] ([i915#15643]) +2 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][110] ([i915#15643]) +3 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#5354]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-tglu-1: NOTRUN -> [SKIP][112] +47 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][113] +28 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][114] ([i915#8708])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][115] ([i915#15102] / [i915#3458]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render:
- shard-rkl: NOTRUN -> [SKIP][116] ([i915#1825]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
- shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#15102]) +14 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-rkl: NOTRUN -> [SKIP][118] ([i915#15102]) +1 other test skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][119] ([i915#15102]) +9 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt:
- shard-dg1: NOTRUN -> [SKIP][120] +2 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
- shard-mtlp: NOTRUN -> [SKIP][121] ([i915#1825]) +2 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render:
- shard-rkl: NOTRUN -> [SKIP][122] ([i915#15102] / [i915#3023]) +2 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render.html
* igt@kms_hdmi_inject@inject-4k:
- shard-mtlp: [PASS][123] -> [SKIP][124] ([i915#15725])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-mtlp-8/igt@kms_hdmi_inject@inject-4k.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-1/igt@kms_hdmi_inject@inject-4k.html
* igt@kms_hdr@static-toggle:
- shard-tglu-1: NOTRUN -> [SKIP][125] ([i915#3555] / [i915#8228]) +2 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_hdr@static-toggle.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-tglu-1: NOTRUN -> [SKIP][126] ([i915#6301])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_pipe_stress@stress-xrgb8888-4tiled:
- shard-tglu-1: NOTRUN -> [SKIP][127] ([i915#14712])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-tglu-1: NOTRUN -> [SKIP][128] ([i915#15709]) +2 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier:
- shard-tglu: NOTRUN -> [SKIP][129] ([i915#15709]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
- shard-rkl: NOTRUN -> [SKIP][130] ([i915#15709])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-b-plane-7:
- shard-tglu-1: NOTRUN -> [SKIP][131] ([i915#15608]) +3 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier@pipe-b-plane-7.html
* igt@kms_plane@pixel-format-yf-tiled-modifier:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#15709])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_plane@pixel-format-yf-tiled-modifier.html
* igt@kms_plane@plane-panning-bottom-right-suspend:
- shard-glk11: NOTRUN -> [INCOMPLETE][133] ([i915#13026]) +1 other test incomplete
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk11/igt@kms_plane@plane-panning-bottom-right-suspend.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-tglu-1: NOTRUN -> [SKIP][134] ([i915#13958])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
- shard-tglu-1: NOTRUN -> [SKIP][135] ([i915#15329]) +14 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][136] ([i915#12343])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#5354])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-tglu-1: NOTRUN -> [SKIP][138] ([i915#9812])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][139] ([i915#15739])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#15073])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@fences-dpms:
- shard-dg2: NOTRUN -> [SKIP][141] ([i915#4077]) +3 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_pm_rpm@fences-dpms.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-dg1: NOTRUN -> [SKIP][142] ([i915#15073]) +1 other test skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-tglu-1: NOTRUN -> [SKIP][143] ([i915#15073])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_prime@d3hot:
- shard-tglu: NOTRUN -> [SKIP][144] ([i915#6524])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-tglu: NOTRUN -> [SKIP][145] ([i915#11520]) +2 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
- shard-glk: NOTRUN -> [SKIP][146] ([i915#11520]) +4 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#11520])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][148] ([i915#9808])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][149] ([i915#12316]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-glk11: NOTRUN -> [SKIP][150] ([i915#11520])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk11/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
- shard-glk10: NOTRUN -> [SKIP][151] ([i915#11520]) +4 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-tglu-1: NOTRUN -> [SKIP][152] ([i915#11520]) +3 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-tglu: NOTRUN -> [SKIP][153] ([i915#9683])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr-cursor-blt:
- shard-dg2: NOTRUN -> [SKIP][154] ([i915#1072] / [i915#9732]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_psr@fbc-psr-cursor-blt.html
* igt@kms_psr@fbc-psr-cursor-plane-onoff:
- shard-mtlp: NOTRUN -> [SKIP][155] ([i915#9688]) +2 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
* igt@kms_psr@pr-dpms:
- shard-tglu: NOTRUN -> [SKIP][156] ([i915#9732]) +8 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@kms_psr@pr-dpms.html
* igt@kms_psr@psr2-basic:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#1072] / [i915#9732]) +2 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_psr@psr2-basic.html
* igt@kms_psr@psr2-primary-mmap-gtt:
- shard-tglu-1: NOTRUN -> [SKIP][158] ([i915#9732]) +15 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_psr@psr2-primary-mmap-gtt.html
* igt@kms_psr@psr2-sprite-mmap-cpu:
- shard-dg1: NOTRUN -> [SKIP][159] ([i915#1072] / [i915#9732]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_psr@psr2-sprite-mmap-cpu.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: NOTRUN -> [SKIP][160] ([i915#9685])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-dg1: NOTRUN -> [SKIP][161] ([i915#5289])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
- shard-mtlp: NOTRUN -> [SKIP][162] ([i915#5289])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-tglu-1: NOTRUN -> [SKIP][163] ([i915#5289]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#12755] / [i915#15867])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-dg2: NOTRUN -> [SKIP][165] ([i915#3555])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_setmode@basic:
- shard-dg2: [PASS][166] -> [FAIL][167] ([i915#15106]) +1 other test fail
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg2-8/igt@kms_setmode@basic.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-3/igt@kms_setmode@basic.html
- shard-rkl: [PASS][168] -> [FAIL][169] ([i915#15106])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-3/igt@kms_setmode@basic.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][170] ([i915#15106]) +1 other test fail
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu-1: NOTRUN -> [SKIP][171] ([i915#8623])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@kms_tiled_display@basic-test-pattern.html
- shard-glk: NOTRUN -> [FAIL][172] ([i915#10959])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@flip-basic:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#15243] / [i915#3555])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@kms_vrr@flip-basic.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#9906])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@perf_pmu@module-unload:
- shard-tglu: NOTRUN -> [ABORT][175] ([i915#15778])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@perf_pmu@module-unload.html
- shard-glk10: NOTRUN -> [ABORT][176] ([i915#15778])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk10/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6-all-gts:
- shard-tglu-1: NOTRUN -> [SKIP][177] ([i915#8516])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@perf_pmu@rc6-all-gts.html
* igt@perf_pmu@rc6@other-idle-gt0:
- shard-tglu: NOTRUN -> [SKIP][178] ([i915#8516])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-10/igt@perf_pmu@rc6@other-idle-gt0.html
* igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
- shard-dg1: NOTRUN -> [SKIP][179] ([i915#14121]) +1 other test skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
- shard-mtlp: NOTRUN -> [SKIP][180] ([i915#14121]) +1 other test skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-3/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
* igt@prime_vgem@fence-flip-hang:
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#3708])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@prime_vgem@fence-flip-hang.html
* igt@sriov_basic@bind-unbind-vf@vf-1:
- shard-tglu-1: NOTRUN -> [FAIL][182] ([i915#12910]) +9 other tests fail
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-1/igt@sriov_basic@bind-unbind-vf@vf-1.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [INCOMPLETE][183] ([i915#13356]) -> [PASS][184] +1 other test pass
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg2-3/igt@gem_exec_suspend@basic-s0.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-8/igt@gem_exec_suspend@basic-s0.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-tglu: [WARN][185] ([i915#13790] / [i915#2681]) -> [PASS][186] +1 other test pass
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-tglu-5/igt@i915_pm_rc6_residency@rc6-fence.html
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rpm@system-suspend-execbuf:
- shard-mtlp: [INCOMPLETE][187] ([i915#13356]) -> [PASS][188]
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-mtlp-1/igt@i915_pm_rpm@system-suspend-execbuf.html
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-8/igt@i915_pm_rpm@system-suspend-execbuf.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-dg1: [DMESG-WARN][189] ([i915#4391] / [i915#4423]) -> [PASS][190]
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-12/igt@i915_suspend@basic-s3-without-i915.html
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@i915_suspend@basic-s3-without-i915.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-glk: [INCOMPLETE][191] ([i915#4817]) -> [PASS][192]
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-glk8/igt@i915_suspend@fence-restore-tiled2untiled.html
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk4/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@i915_suspend@forcewake:
- shard-rkl: [ABORT][193] ([i915#15140]) -> [PASS][194]
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-1/igt@i915_suspend@forcewake.html
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-5/igt@i915_suspend@forcewake.html
* igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
- shard-tglu: [FAIL][195] ([i915#13566]) -> [PASS][196] +1 other test pass
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-tglu-4/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
* igt@kms_cursor_edge_walk@128x128-top-edge:
- shard-dg1: [DMESG-WARN][197] ([i915#4423]) -> [PASS][198] +2 other tests pass
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-17/igt@kms_cursor_edge_walk@128x128-top-edge.html
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_cursor_edge_walk@128x128-top-edge.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [SKIP][199] ([i915#15073]) -> [PASS][200] +3 other tests pass
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_setmode@basic:
- shard-dg1: [FAIL][201] ([i915#15106]) -> [PASS][202]
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-14/igt@kms_setmode@basic.html
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_setmode@basic.html
- shard-tglu: [FAIL][203] ([i915#15106]) -> [PASS][204] +1 other test pass
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-tglu-2/igt@kms_setmode@basic.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-tglu-8/igt@kms_setmode@basic.html
#### Warnings ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-rkl: [SKIP][205] ([i915#8411]) -> [SKIP][206] ([i915#14544] / [i915#8411])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@api_intel_bb@blit-reloc-keep-cache.html
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@gem_ccs@suspend-resume:
- shard-rkl: [SKIP][207] ([i915#14544] / [i915#9323]) -> [SKIP][208] ([i915#9323])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@gem_ccs@suspend-resume.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@gem_ccs@suspend-resume.html
* igt@gem_ctx_sseu@engines:
- shard-rkl: [SKIP][209] ([i915#14544] / [i915#280]) -> [SKIP][210] ([i915#280])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@gem_ctx_sseu@engines.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@gem_ctx_sseu@engines.html
* igt@gem_exec_capture@capture-recoverable:
- shard-rkl: [SKIP][211] ([i915#6344]) -> [SKIP][212] ([i915#14544] / [i915#6344])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@gem_exec_capture@capture-recoverable.html
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_reloc@basic-gtt-wc:
- shard-rkl: [SKIP][213] ([i915#14544] / [i915#3281]) -> [SKIP][214] ([i915#3281]) +2 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-wc.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@gem_exec_reloc@basic-gtt-wc.html
* igt@gem_exec_reloc@basic-softpin:
- shard-rkl: [SKIP][215] ([i915#3281]) -> [SKIP][216] ([i915#14544] / [i915#3281]) +3 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@gem_exec_reloc@basic-softpin.html
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@gem_exec_reloc@basic-softpin.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-rkl: [SKIP][217] ([i915#14544] / [i915#4613]) -> [SKIP][218] ([i915#4613])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@random-engines:
- shard-rkl: [SKIP][219] ([i915#4613]) -> [SKIP][220] ([i915#14544] / [i915#4613]) +1 other test skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@gem_lmem_swapping@random-engines.html
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@gem_lmem_swapping@random-engines.html
* igt@gem_partial_pwrite_pread@writes-after-reads-display:
- shard-rkl: [SKIP][221] ([i915#14544] / [i915#3282]) -> [SKIP][222] ([i915#3282])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@gem_partial_pwrite_pread@writes-after-reads-display.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-rkl: [SKIP][223] ([i915#3297]) -> [SKIP][224] ([i915#14544] / [i915#3297])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@gem_userptr_blits@coherency-unsync.html
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@gem_userptr_blits@coherency-unsync.html
* igt@gen9_exec_parse@allowed-single:
- shard-rkl: [SKIP][225] ([i915#2527]) -> [SKIP][226] ([i915#14544] / [i915#2527])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@gen9_exec_parse@allowed-single.html
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-rkl: [SKIP][227] ([i915#14498] / [i915#14544]) -> [SKIP][228] ([i915#14498])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-idle.html
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-rkl: [SKIP][229] ([i915#5286]) -> [SKIP][230] ([i915#14544] / [i915#5286])
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_big_fb@4-tiled-addfb.html
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-rkl: [SKIP][231] ([i915#14544] / [i915#5286]) -> [SKIP][232] ([i915#5286]) +1 other test skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-rkl: [SKIP][233] ([i915#3638]) -> [SKIP][234] ([i915#14544] / [i915#3638])
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-270.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-rkl: [SKIP][235] ([i915#14544] / [i915#3638]) -> [SKIP][236] ([i915#3638])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-rkl: [SKIP][237] -> [SKIP][238] ([i915#14544]) +1 other test skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2:
- shard-rkl: [SKIP][239] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][240] ([i915#14098] / [i915#6095]) +3 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-rkl: [SKIP][241] ([i915#12313] / [i915#14544]) -> [SKIP][242] ([i915#12313])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
- shard-rkl: [SKIP][243] ([i915#14098] / [i915#6095]) -> [SKIP][244] ([i915#14098] / [i915#14544] / [i915#6095]) +3 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][245] ([i915#6095]) -> [SKIP][246] ([i915#14544] / [i915#6095]) +3 other tests skip
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs:
- shard-dg1: [SKIP][247] ([i915#4423] / [i915#6095]) -> [SKIP][248] ([i915#6095])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-13/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-glk: [INCOMPLETE][249] ([i915#15582]) -> [INCOMPLETE][250] ([i915#14694] / [i915#15582]) +1 other test incomplete
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-glk5/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk1/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-rkl: [SKIP][251] ([i915#12313]) -> [SKIP][252] ([i915#12313] / [i915#14544]) +1 other test skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2:
- shard-rkl: [SKIP][253] ([i915#14544] / [i915#6095]) -> [SKIP][254] ([i915#6095]) +3 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html
* igt@kms_chamelium_frames@dp-crc-multiple:
- shard-rkl: [SKIP][255] ([i915#11151] / [i915#7828]) -> [SKIP][256] ([i915#11151] / [i915#14544] / [i915#7828])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_chamelium_frames@dp-crc-multiple.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_chamelium_frames@dp-crc-multiple.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- shard-rkl: [SKIP][257] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][258] ([i915#11151] / [i915#7828]) +1 other test skip
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-fast.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_content_protection@legacy:
- shard-rkl: [SKIP][259] ([i915#15865]) -> [SKIP][260] ([i915#14544] / [i915#15865])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_content_protection@legacy.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@uevent-hdcp14:
- shard-rkl: [SKIP][261] ([i915#14544] / [i915#15865]) -> [SKIP][262] ([i915#15865])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_content_protection@uevent-hdcp14.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_content_protection@uevent-hdcp14.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-rkl: [SKIP][263] ([i915#3555]) -> [SKIP][264] ([i915#14544] / [i915#3555]) +1 other test skip
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-32x10.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-rkl: [SKIP][265] ([i915#14544] / [i915#3555]) -> [SKIP][266] ([i915#3555]) +1 other test skip
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_cursor_crc@cursor-random-max-size.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-dg1: [SKIP][267] ([i915#3555] / [i915#4423]) -> [SKIP][268] ([i915#3555])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-18/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-rkl: [SKIP][269] ([i915#14544]) -> [SKIP][270] +2 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-rkl: [SKIP][271] ([i915#14544] / [i915#3840] / [i915#9053]) -> [SKIP][272] ([i915#3840] / [i915#9053])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@psr:
- shard-rkl: [SKIP][273] ([i915#14544] / [i915#3955]) -> [SKIP][274] ([i915#3955])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_fbcon_fbt@psr.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-rkl: [SKIP][275] ([i915#9934]) -> [SKIP][276] ([i915#14544] / [i915#9934]) +1 other test skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_flip@2x-flip-vs-fences.html
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-glk: [INCOMPLETE][277] ([i915#12745] / [i915#4839] / [i915#6113]) -> [INCOMPLETE][278] ([i915#12314] / [i915#12745] / [i915#4839] / [i915#6113])
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-glk2/igt@kms_flip@2x-flip-vs-suspend.html
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk5/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2:
- shard-glk: [INCOMPLETE][279] ([i915#4839] / [i915#6113]) -> [INCOMPLETE][280] ([i915#12314] / [i915#4839] / [i915#6113])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-glk2/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-glk5/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-rkl: [SKIP][281] ([i915#14544] / [i915#9934]) -> [SKIP][282] ([i915#9934]) +3 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-rkl: [SKIP][283] ([i915#15643]) -> [SKIP][284] ([i915#14544] / [i915#15643])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-rkl: [SKIP][285] ([i915#14544] / [i915#15643]) -> [SKIP][286] ([i915#15643])
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
- shard-rkl: [SKIP][287] ([i915#15102]) -> [SKIP][288] ([i915#14544] / [i915#15102]) +1 other test skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu:
- shard-rkl: [SKIP][289] ([i915#14544] / [i915#15102]) -> [SKIP][290] ([i915#15102]) +1 other test skip
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
- shard-rkl: [SKIP][291] ([i915#15102] / [i915#3023]) -> [SKIP][292] ([i915#14544] / [i915#15102] / [i915#3023]) +4 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
- shard-dg2: [SKIP][293] ([i915#15102] / [i915#3458]) -> [SKIP][294] ([i915#10433] / [i915#15102] / [i915#3458]) +2 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: [SKIP][295] ([i915#1825]) -> [SKIP][296] ([i915#14544] / [i915#1825]) +4 other tests skip
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: [SKIP][297] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][298] ([i915#15102] / [i915#3458]) +3 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-rkl: [SKIP][299] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][300] ([i915#15102] / [i915#3023]) +3 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen:
- shard-dg1: [SKIP][301] ([i915#15102] / [i915#3458] / [i915#4423]) -> [SKIP][302] ([i915#15102] / [i915#3458])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg1: [SKIP][303] ([i915#4423] / [i915#8708]) -> [SKIP][304] ([i915#8708])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen:
- shard-rkl: [SKIP][305] ([i915#14544] / [i915#1825]) -> [SKIP][306] ([i915#1825]) +7 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_hdr@brightness-with-hdr:
- shard-mtlp: [SKIP][307] ([i915#12713]) -> [SKIP][308] ([i915#1187] / [i915#12713])
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-mtlp-5/igt@kms_hdr@brightness-with-hdr.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-mtlp-1/igt@kms_hdr@brightness-with-hdr.html
- shard-rkl: [SKIP][309] ([i915#13331]) -> [SKIP][310] ([i915#12713])
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-1/igt@kms_hdr@brightness-with-hdr.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-2/igt@kms_hdr@brightness-with-hdr.html
- shard-dg1: [SKIP][311] ([i915#1187] / [i915#12713]) -> [SKIP][312] ([i915#12713])
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-12/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-rkl: [SKIP][313] ([i915#13688] / [i915#14544]) -> [SKIP][314] ([i915#13688])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_joiner@basic-max-non-joiner.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier:
- shard-rkl: [SKIP][315] ([i915#15709]) -> [SKIP][316] ([i915#14544] / [i915#15709])
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping:
- shard-rkl: [SKIP][317] ([i915#14544] / [i915#15709]) -> [SKIP][318] ([i915#15709])
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane_multiple@tiling-4:
- shard-rkl: [SKIP][319] ([i915#14259]) -> [SKIP][320] ([i915#14259] / [i915#14544])
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_plane_multiple@tiling-4.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_plane_multiple@tiling-4.html
* igt@kms_plane_multiple@tiling-yf:
- shard-rkl: [SKIP][321] ([i915#14259] / [i915#14544]) -> [SKIP][322] ([i915#14259])
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_plane_multiple@tiling-yf.html
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a:
- shard-dg1: [SKIP][323] ([i915#15329] / [i915#4423]) -> [SKIP][324] ([i915#15329]) +1 other test skip
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-13/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-14/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-rkl: [SKIP][325] ([i915#14544] / [i915#9685]) -> [SKIP][326] ([i915#9685])
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_pm_dc@dc3co-vpb-simulation.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][327] ([i915#3828]) -> [SKIP][328] ([i915#9340])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-4/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf:
- shard-rkl: [SKIP][329] ([i915#11520] / [i915#14544]) -> [SKIP][330] ([i915#11520]) +1 other test skip
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
- shard-rkl: [SKIP][331] ([i915#11520]) -> [SKIP][332] ([i915#11520] / [i915#14544]) +1 other test skip
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
- shard-dg1: [SKIP][333] ([i915#11520] / [i915#4423]) -> [SKIP][334] ([i915#11520])
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-dg1-17/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-dg1-13/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-pr-cursor-render:
- shard-rkl: [SKIP][335] ([i915#1072] / [i915#9732]) -> [SKIP][336] ([i915#1072] / [i915#14544] / [i915#9732]) +2 other tests skip
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_psr@fbc-pr-cursor-render.html
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_psr@fbc-pr-cursor-render.html
* igt@kms_psr@fbc-pr-sprite-plane-move:
- shard-rkl: [SKIP][337] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][338] ([i915#1072] / [i915#9732]) +4 other tests skip
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_psr@fbc-pr-sprite-plane-move.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_psr@fbc-pr-sprite-plane-move.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
- shard-rkl: [SKIP][339] ([i915#5289]) -> [SKIP][340] ([i915#14544] / [i915#5289])
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
* igt@kms_vrr@lobf:
- shard-rkl: [SKIP][341] ([i915#11920] / [i915#14544]) -> [SKIP][342] ([i915#11920])
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@kms_vrr@lobf.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@kms_vrr@lobf.html
* igt@prime_vgem@basic-read:
- shard-rkl: [SKIP][343] ([i915#14544] / [i915#3291] / [i915#3708]) -> [SKIP][344] ([i915#3291] / [i915#3708])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-6/igt@prime_vgem@basic-read.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-3/igt@prime_vgem@basic-read.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-rkl: [SKIP][345] ([i915#9917]) -> [SKIP][346] ([i915#14544] / [i915#9917])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_18252/shard-rkl-4/igt@sriov_basic@enable-vfs-autoprobe-off.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10959]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10959
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13363]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13363
[i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14121
[i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#14498]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14498
[i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
[i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
[i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
[i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
[i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
[i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
[i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
[i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
[i915#15140]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15140
[i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
[i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
[i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
[i915#15542]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15542
[i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
[i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
[i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
[i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
[i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
[i915#15725]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15725
[i915#15739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15739
[i915#15778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15778
[i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
[i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
[i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_18252 -> Patchwork_164124v1
CI-20190529: 20190529
CI_DRM_18252: 247b271f2f09fedf9c4cc85fcc338217fc396a9a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8836: 8836
Patchwork_164124v1: 247b271f2f09fedf9c4cc85fcc338217fc396a9a @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_164124v1/index.html
[-- Attachment #2: Type: text/html, Size: 120186 bytes --]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection
2026-03-30 23:53 ` [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
@ 2026-03-31 12:12 ` Nicolas Frattaroli
2026-04-06 5:26 ` Nautiyal, Ankit K
2026-04-06 5:27 ` Nautiyal, Ankit K
1 sibling, 1 reply; 27+ messages in thread
From: Nicolas Frattaroli @ 2026-03-31 12:12 UTC (permalink / raw)
To: intel-gfx, Ville Syrjala; +Cc: intel-xe
On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> restructure it into a more readable form.
>
> Right now we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
>
> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> but in opposite orders. Let's write that out in a more explicit
> if-else form. And since I'm running out of function names I'll
> rename the function with that high level logic into
> intel_hdmi_compute_formats() and it will call (the new) with
> intel_hdmi_compute_output_format() with an explicit sink_format
> as needed.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
> 1 file changed, 70 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 072b0554cc24..16873fc7bcb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
> return status;
> }
>
> +static enum drm_mode_status
> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + bool has_hdmi_sink,
> + enum intel_output_format sink_format)
> +{
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + switch (sink_format) {
> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> + if (!has_hdmi_sink ||
> + !connector->base.ycbcr_420_allowed ||
> + !drm_mode_is_420(info, mode))
> + return MODE_NO_420;
> +
> + return MODE_OK;
> + case INTEL_OUTPUT_FORMAT_RGB:
> + return MODE_OK;
> + default:
> + MISSING_CASE(sink_format);
> + return MODE_BAD;
> + }
> +}
I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
The following diff adding it for both intel_hdmi_sink_format_valid
and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
way to go, but I'm unsure about the interaction between the two:
---
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 6bc1689cbf93..38b9924ebef0 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1966,6 +1966,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
+ else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
+ return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_36;
else
return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
case 10:
@@ -1974,6 +1976,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
+ else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
+ return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_30;
else
return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
case 8:
@@ -2038,6 +2042,11 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
return MODE_OK;
case INTEL_OUTPUT_FORMAT_RGB:
+ return MODE_OK;
+ case INTEL_OUTPUT_FORMAT_YCBCR444:
+ if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
+ return MODE_BAD;
+
return MODE_OK;
default:
MISSING_CASE(sink_format);
---
It does work for me though at YCBCr 4:4:4 @ 12bpc, 10bpc and 8bpc, so both info
members this relies on are populated correctly.
> +
> static enum drm_mode_status
> intel_hdmi_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode)
> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
> return intel_conn_state->force_audio == HDMI_AUDIO_ON;
> }
>
> -static enum intel_output_format
> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
> - struct intel_connector *connector,
> - bool ycbcr_420_output)
> -{
> - if (!crtc_state->has_hdmi_sink)
> - return INTEL_OUTPUT_FORMAT_RGB;
> -
> - if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
> - return INTEL_OUTPUT_FORMAT_YCBCR420;
> - else
> - return INTEL_OUTPUT_FORMAT_RGB;
> -}
> -
> static enum intel_output_format
> intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
> {
> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>
> static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state,
> - bool respect_downstream_limits)
> + struct intel_connector *connector,
> + bool respect_downstream_limits,
> + enum intel_output_format sink_format)
> {
> - struct intel_display *display = to_intel_display(encoder);
> - struct intel_connector *connector = to_intel_connector(conn_state->connector);
> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> - const struct drm_display_info *info = &connector->base.display_info;
> - bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> - int ret;
>
> - crtc_state->sink_format =
> - intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
> -
> - if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
> - drm_dbg_kms(display->drm,
> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> - }
> + if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
> + crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
> + return -EINVAL;
>
> + crtc_state->sink_format = sink_format;
> crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> - if (ret) {
> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> - !crtc_state->has_hdmi_sink ||
> - !connector->base.ycbcr_420_allowed ||
> - !drm_mode_is_420_also(info, adjusted_mode))
> - return ret;
> -
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +
> + return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +}
> +
> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
> + struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state,
> + bool respect_downstream_limits)
> +{
> + struct intel_display *display = to_intel_display(encoder);
> + struct intel_connector *connector = to_intel_connector(conn_state->connector);
> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + const struct drm_display_info *info = &connector->base.display_info;
> + int ret;
> +
> + if (drm_mode_is_420_only(info, adjusted_mode)) {
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> + if (ret) {
> + drm_dbg_kms(display->drm,
> + "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> + }
> + } else {
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> +
> + if (ret && drm_mode_is_420_also(info, adjusted_mode))
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> }
>
> return ret;
> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
> * Try to respect downstream TMDS clock limits first, if
> * that fails assume the user might know something we don't.
> */
> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
> if (ret)
> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
> if (ret) {
> drm_dbg_kms(display->drm,
> "unsupported HDMI clock (%d kHz), rejecting mode\n",
>
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection
2026-03-30 23:53 ` [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
@ 2026-03-31 13:35 ` Nicolas Frattaroli
2026-04-06 5:32 ` Nautiyal, Ankit K
0 siblings, 1 reply; 27+ messages in thread
From: Nicolas Frattaroli @ 2026-03-31 13:35 UTC (permalink / raw)
To: intel-gfx, Ville Syrjala; +Cc: intel-xe
On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restructure intel_dp_compute_output_format() to resemble the new
> intel_hdmi_compute_output_formats().
>
> Again, we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
>
> Take the exact same approach with the DP code, making the
> format selection much less convoluted.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
> 1 file changed, 69 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4955bd8b11d7..230b45acde29 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> return MODE_OK;
> }
>
> +static enum drm_mode_status
> +intel_dp_sink_format_valid(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + enum intel_output_format sink_format)
> +{
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + switch (sink_format) {
> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> + if (!connector->base.ycbcr_420_allowed ||
> + !drm_mode_is_420(info, mode))
> + return MODE_NO_420;
> +
> + return MODE_OK;
> + case INTEL_OUTPUT_FORMAT_RGB:
> + return MODE_OK;
> + default:
> + MISSING_CASE(sink_format);
> + return MODE_BAD;
> + }
> +}
> +
I think here we'll want another
---
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e23162fc3f8b..a1dc089c54f5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
return MODE_OK;
case INTEL_OUTPUT_FORMAT_RGB:
+ return MODE_OK;
+ case INTEL_OUTPUT_FORMAT_YCBCR444:
+ if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
+ return MODE_BAD;
+
return MODE_OK;
default:
MISSING_CASE(sink_format);
---
though this time, no bpc related changes. With that fixed, I get
YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
to be unrelated userspace reasons, though the KMS property's enum
value is exposed properly.
> int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
> {
> return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> @@ -3330,41 +3352,59 @@ static int
> intel_dp_compute_output_format(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state,
> - bool respect_downstream_limits)
> + bool respect_downstream_limits,
> + enum intel_output_format sink_format)
> {
> - struct intel_display *display = to_intel_display(encoder);
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct intel_connector *connector = intel_dp->attached_connector;
> - const struct drm_display_info *info = &connector->base.display_info;
> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> - bool ycbcr_420_only;
> - int ret;
>
> - ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> -
> - if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> - drm_dbg_kms(display->drm,
> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> - } else {
> - crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> - }
> + if (intel_dp_sink_format_valid(connector, adjusted_mode,
> + sink_format) != MODE_OK)
> + return -EINVAL;
>
> + crtc_state->sink_format = sink_format;
> crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
>
> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> - respect_downstream_limits);
> - if (ret) {
> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> - !connector->base.ycbcr_420_allowed ||
> - !drm_mode_is_420_also(info, adjusted_mode))
> - return ret;
> -
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - crtc_state->output_format = intel_dp_output_format(connector,
> - crtc_state->sink_format);
> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> - respect_downstream_limits);
> + return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> + respect_downstream_limits);
With the removal of intel_dp_sink_format in this function, I wonder
if we can get rid of it entirely now. It's only called in
intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
we're fine in that regard).
Judging by the "min" in the function name, I assume it should be
using INTEL_OUTPUT_FORMAT_YCBCR420 in drm_mode_is_420_also cases,
whereas right now it only gets this from intel_dp_sink_format if
the mode is drm_mode_is_420_only. So I think removing
intel_dp_sink_format entirely as a follow-up, and folding a
corrected minimum bandwidth computation that uses 420 if
drm_mode_is_420 into intel_dp_mode_min_link_bpp_x16 would make
sense, unless I'm totally misunderstanding the code here.
> +}
> +
> +static int
> +intel_dp_compute_formats(struct intel_encoder *encoder,
> + struct intel_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state,
> + bool respect_downstream_limits)
> +{
> + struct intel_display *display = to_intel_display(encoder);
> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> + struct intel_connector *connector = intel_dp->attached_connector;
> + const struct drm_display_info *info = &connector->base.display_info;
> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + int ret;
> +
> + if (drm_mode_is_420_only(info, adjusted_mode)) {
> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> + if (ret) {
> + drm_dbg_kms(display->drm,
> + "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> + }
> + } else {
> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> +
> + if (ret && drm_mode_is_420_also(info, adjusted_mode))
> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> }
>
> return ret;
> @@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> * Try to respect downstream TMDS clock limits first, if
> * that fails assume the user might know something we don't.
> */
> - ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
> + ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
> if (ret)
> - ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
> + ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
> if (ret)
> return ret;
>
>
^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes
2026-03-30 23:53 ` [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
@ 2026-04-06 5:23 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 5:23 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_hdmi_mode_valid() is calling intel_pfit_mode_valid() only
> on the first attempt (4:2:0 for "4:2:0 only" modes, 4:4:4 for
> everything else). Add the call also for the "4:2:0 also" modes case
> so that we actually know the pipe scaler can actually produce the
> 4:2:0 output.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 05e898d10a2b..072b0554cc24 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2079,6 +2079,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
> return status;
>
> sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> +
> + status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> + if (status != MODE_OK)
> + return status;
> +
> status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
> sink_format);
> if (status != MODE_OK)
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection
2026-03-31 12:12 ` Nicolas Frattaroli
@ 2026-04-06 5:26 ` Nautiyal, Ankit K
2026-04-07 7:14 ` Nicolas Frattaroli
0 siblings, 1 reply; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 5:26 UTC (permalink / raw)
To: Nicolas Frattaroli, intel-gfx, Ville Syrjala; +Cc: intel-xe
On 3/31/2026 5:42 PM, Nicolas Frattaroli wrote:
> On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> intel_hdmi_compute_output_format() is a bit of a mess. Try to
>> restructure it into a more readable form.
>>
>> Right now we basically have two main code paths:
>> - YCbCr 4:2:0 only modes
>> - everything else including YCbCr 4:2:0 also modes
>>
>> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
>> but in opposite orders. Let's write that out in a more explicit
>> if-else form. And since I'm running out of function names I'll
>> rename the function with that high level logic into
>> intel_hdmi_compute_formats() and it will call (the new) with
>> intel_hdmi_compute_output_format() with an explicit sink_format
>> as needed.
>>
>> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
>> 1 file changed, 70 insertions(+), 42 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> index 072b0554cc24..16873fc7bcb9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
>> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
>> return status;
>> }
>>
>> +static enum drm_mode_status
>> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
>> + const struct drm_display_mode *mode,
>> + bool has_hdmi_sink,
>> + enum intel_output_format sink_format)
>> +{
>> + const struct drm_display_info *info = &connector->base.display_info;
>> +
>> + switch (sink_format) {
>> + case INTEL_OUTPUT_FORMAT_YCBCR420:
>> + if (!has_hdmi_sink ||
>> + !connector->base.ycbcr_420_allowed ||
>> + !drm_mode_is_420(info, mode))
>> + return MODE_NO_420;
>> +
>> + return MODE_OK;
>> + case INTEL_OUTPUT_FORMAT_RGB:
>> + return MODE_OK;
>> + default:
>> + MISSING_CASE(sink_format);
>> + return MODE_BAD;
>> + }
>> +}
> I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
> The following diff adding it for both intel_hdmi_sink_format_valid
> and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
> way to go, but I'm unsure about the interaction between the two:
Hmm.. Trying YCBCR444 format, is not yet implemented.
We need to have a well defined policy as to when to use YCBCR444, and
that should be in the newly created intel_hdmi_compute_formats(),
perhaps it should be after we have tried and failed with RGB444.
(Although I am not sure in what case compute for RGB 444 will fail and
pass for YCBCR444).
However,this should be a separate patch/series.
Regards,
Ankit
>
> ---
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 6bc1689cbf93..38b9924ebef0 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1966,6 +1966,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
>
> if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
> + else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
> + return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_36;
> else
> return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
> case 10:
> @@ -1974,6 +1976,8 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *_connector,
>
> if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420)
> return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
> + else if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR444)
> + return info->edid_hdmi_ycbcr444_dc_modes & DRM_EDID_HDMI_DC_30;
> else
> return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
> case 8:
> @@ -2038,6 +2042,11 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
>
> return MODE_OK;
> case INTEL_OUTPUT_FORMAT_RGB:
> + return MODE_OK;
> + case INTEL_OUTPUT_FORMAT_YCBCR444:
> + if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> + return MODE_BAD;
> +
> return MODE_OK;
> default:
> MISSING_CASE(sink_format);
> ---
>
> It does work for me though at YCBCr 4:4:4 @ 12bpc, 10bpc and 8bpc, so both info
> members this relies on are populated correctly.
>
>> +
>> static enum drm_mode_status
>> intel_hdmi_mode_valid(struct drm_connector *_connector,
>> const struct drm_display_mode *mode)
>> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
>> return intel_conn_state->force_audio == HDMI_AUDIO_ON;
>> }
>>
>> -static enum intel_output_format
>> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
>> - struct intel_connector *connector,
>> - bool ycbcr_420_output)
>> -{
>> - if (!crtc_state->has_hdmi_sink)
>> - return INTEL_OUTPUT_FORMAT_RGB;
>> -
>> - if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
>> - return INTEL_OUTPUT_FORMAT_YCBCR420;
>> - else
>> - return INTEL_OUTPUT_FORMAT_RGB;
>> -}
>> -
>> static enum intel_output_format
>> intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>> {
>> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>>
>> static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
>> struct intel_crtc_state *crtc_state,
>> - const struct drm_connector_state *conn_state,
>> - bool respect_downstream_limits)
>> + struct intel_connector *connector,
>> + bool respect_downstream_limits,
>> + enum intel_output_format sink_format)
>> {
>> - struct intel_display *display = to_intel_display(encoder);
>> - struct intel_connector *connector = to_intel_connector(conn_state->connector);
>> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> - const struct drm_display_info *info = &connector->base.display_info;
>> - bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
>> - int ret;
>>
>> - crtc_state->sink_format =
>> - intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
>> -
>> - if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
>> - drm_dbg_kms(display->drm,
>> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
>> - }
>> + if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
>> + crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
>> + return -EINVAL;
>>
>> + crtc_state->sink_format = sink_format;
>> crtc_state->output_format = intel_hdmi_output_format(crtc_state);
>> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> - if (ret) {
>> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
>> - !crtc_state->has_hdmi_sink ||
>> - !connector->base.ycbcr_420_allowed ||
>> - !drm_mode_is_420_also(info, adjusted_mode))
>> - return ret;
>> -
>> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>> - crtc_state->output_format = intel_hdmi_output_format(crtc_state);
>> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> +
>> + return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
>> +}
>> +
>> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
>> + struct intel_crtc_state *crtc_state,
>> + const struct drm_connector_state *conn_state,
>> + bool respect_downstream_limits)
>> +{
>> + struct intel_display *display = to_intel_display(encoder);
>> + struct intel_connector *connector = to_intel_connector(conn_state->connector);
>> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> + const struct drm_display_info *info = &connector->base.display_info;
>> + int ret;
>> +
>> + if (drm_mode_is_420_only(info, adjusted_mode)) {
>> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_YCBCR420);
>> +
>> + if (ret) {
>> + drm_dbg_kms(display->drm,
>> + "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> +
>> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_RGB);
>> + }
>> + } else {
>> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_RGB);
>> +
>> + if (ret && drm_mode_is_420_also(info, adjusted_mode))
>> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_YCBCR420);
>> }
>>
>> return ret;
>> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
>> * Try to respect downstream TMDS clock limits first, if
>> * that fails assume the user might know something we don't.
>> */
>> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
>> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
>> if (ret)
>> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
>> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
>> if (ret) {
>> drm_dbg_kms(display->drm,
>> "unsupported HDMI clock (%d kHz), rejecting mode\n",
>>
>
>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection
2026-03-30 23:53 ` [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
2026-03-31 12:12 ` Nicolas Frattaroli
@ 2026-04-06 5:27 ` Nautiyal, Ankit K
1 sibling, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 5:27 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> restructure it into a more readable form.
>
> Right now we basically have two main code paths:
> - YCbCr 4:2:0 only modes
> - everything else including YCbCr 4:2:0 also modes
>
> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> but in opposite orders. Let's write that out in a more explicit
> if-else form. And since I'm running out of function names I'll
> rename the function with that high level logic into
> intel_hdmi_compute_formats() and it will call (the new) with
Nitpick : Extra 'with'.
Apart from above, the change looks good to me.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Regards,
Ankit
> intel_hdmi_compute_output_format() with an explicit sink_format
> as needed.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
> 1 file changed, 70 insertions(+), 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 072b0554cc24..16873fc7bcb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
> return status;
> }
>
> +static enum drm_mode_status
> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + bool has_hdmi_sink,
> + enum intel_output_format sink_format)
> +{
> + const struct drm_display_info *info = &connector->base.display_info;
> +
> + switch (sink_format) {
> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> + if (!has_hdmi_sink ||
> + !connector->base.ycbcr_420_allowed ||
> + !drm_mode_is_420(info, mode))
> + return MODE_NO_420;
> +
> + return MODE_OK;
> + case INTEL_OUTPUT_FORMAT_RGB:
> + return MODE_OK;
> + default:
> + MISSING_CASE(sink_format);
> + return MODE_BAD;
> + }
> +}
> +
> static enum drm_mode_status
> intel_hdmi_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode)
> @@ -2246,20 +2270,6 @@ static bool intel_hdmi_has_audio(struct intel_encoder *encoder,
> return intel_conn_state->force_audio == HDMI_AUDIO_ON;
> }
>
> -static enum intel_output_format
> -intel_hdmi_sink_format(const struct intel_crtc_state *crtc_state,
> - struct intel_connector *connector,
> - bool ycbcr_420_output)
> -{
> - if (!crtc_state->has_hdmi_sink)
> - return INTEL_OUTPUT_FORMAT_RGB;
> -
> - if (connector->base.ycbcr_420_allowed && ycbcr_420_output)
> - return INTEL_OUTPUT_FORMAT_YCBCR420;
> - else
> - return INTEL_OUTPUT_FORMAT_RGB;
> -}
> -
> static enum intel_output_format
> intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
> {
> @@ -2268,37 +2278,55 @@ intel_hdmi_output_format(const struct intel_crtc_state *crtc_state)
>
> static int intel_hdmi_compute_output_format(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> - const struct drm_connector_state *conn_state,
> - bool respect_downstream_limits)
> + struct intel_connector *connector,
> + bool respect_downstream_limits,
> + enum intel_output_format sink_format)
> {
> - struct intel_display *display = to_intel_display(encoder);
> - struct intel_connector *connector = to_intel_connector(conn_state->connector);
> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> - const struct drm_display_info *info = &connector->base.display_info;
> - bool ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> - int ret;
>
> - crtc_state->sink_format =
> - intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only);
> -
> - if (ycbcr_420_only && crtc_state->sink_format != INTEL_OUTPUT_FORMAT_YCBCR420) {
> - drm_dbg_kms(display->drm,
> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> - }
> + if (intel_hdmi_sink_format_valid(connector, adjusted_mode,
> + crtc_state->has_hdmi_sink, sink_format) != MODE_OK)
> + return -EINVAL;
>
> + crtc_state->sink_format = sink_format;
> crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> - if (ret) {
> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> - !crtc_state->has_hdmi_sink ||
> - !connector->base.ycbcr_420_allowed ||
> - !drm_mode_is_420_also(info, adjusted_mode))
> - return ret;
> -
> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - crtc_state->output_format = intel_hdmi_output_format(crtc_state);
> - ret = intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +
> + return intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_limits);
> +}
> +
> +static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
> + struct intel_crtc_state *crtc_state,
> + const struct drm_connector_state *conn_state,
> + bool respect_downstream_limits)
> +{
> + struct intel_display *display = to_intel_display(encoder);
> + struct intel_connector *connector = to_intel_connector(conn_state->connector);
> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + const struct drm_display_info *info = &connector->base.display_info;
> + int ret;
> +
> + if (drm_mode_is_420_only(info, adjusted_mode)) {
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> +
> + if (ret) {
> + drm_dbg_kms(display->drm,
> + "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> +
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> + }
> + } else {
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_RGB);
> +
> + if (ret && drm_mode_is_420_also(info, adjusted_mode))
> + ret = intel_hdmi_compute_output_format(encoder, crtc_state, connector,
> + respect_downstream_limits,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> }
>
> return ret;
> @@ -2375,9 +2403,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
> * Try to respect downstream TMDS clock limits first, if
> * that fails assume the user might know something we don't.
> */
> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, true);
> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, true);
> if (ret)
> - ret = intel_hdmi_compute_output_format(encoder, pipe_config, conn_state, false);
> + ret = intel_hdmi_compute_formats(encoder, pipe_config, conn_state, false);
> if (ret) {
> drm_dbg_kms(display->drm,
> "unsupported HDMI clock (%d kHz), rejecting mode\n",
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation
2026-03-30 23:53 ` [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
@ 2026-04-06 5:28 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 5:28 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restructure the HDMI mode validation to resemble the new
> intel_hdmi_compute_formats(). Keeping the two in sync helps
> to avoid different bugs in each.
>
> The main difference between mode_valid() and
> intel_hdmi_compute_formats() is that we don't want the
> Hail Mary RGB fallback for "4:2:0 only" modes.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 60 ++++++++++++-----------
> 1 file changed, 32 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 16873fc7bcb9..95bd38c620d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2045,6 +2045,27 @@ intel_hdmi_sink_format_valid(struct intel_connector *connector,
> }
> }
>
> +static enum drm_mode_status
> +intel_hdmi_mode_valid_format(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + int clock, bool has_hdmi_sink,
> + enum intel_output_format sink_format)
> +{
> + struct intel_display *display = to_intel_display(connector);
> + enum drm_mode_status status;
> +
> + status = intel_hdmi_sink_format_valid(connector, mode,
> + has_hdmi_sink, sink_format);
> + if (status != MODE_OK)
> + return status;
> +
> + status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> + if (status != MODE_OK)
> + return status;
> +
> + return intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> +}
> +
> static enum drm_mode_status
> intel_hdmi_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode)
> @@ -2052,12 +2073,11 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_display *display = to_intel_display(connector);
> struct intel_hdmi *hdmi = intel_attached_hdmi(connector);
> + const struct drm_display_info *info = &connector->base.display_info;
> enum drm_mode_status status;
> int clock = mode->clock;
> int max_dotclk = display->cdclk.max_dotclk_freq;
> bool has_hdmi_sink = intel_has_hdmi_sink(hdmi, connector->base.state);
> - bool ycbcr_420_only;
> - enum intel_output_format sink_format;
>
> status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> @@ -2084,36 +2104,20 @@ intel_hdmi_mode_valid(struct drm_connector *_connector,
> if (clock > 600000)
> return MODE_CLOCK_HIGH;
>
> - ycbcr_420_only = drm_mode_is_420_only(&connector->base.display_info, mode);
> + if (drm_mode_is_420_only(info, mode)) {
> + status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> + } else {
> + status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> + INTEL_OUTPUT_FORMAT_RGB);
>
> - if (ycbcr_420_only)
> - sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - else
> - sink_format = INTEL_OUTPUT_FORMAT_RGB;
> -
> - status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> + if (status != MODE_OK && drm_mode_is_420_also(info, mode))
> + status = intel_hdmi_mode_valid_format(connector, mode, clock, has_hdmi_sink,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> + }
> if (status != MODE_OK)
> return status;
>
> - status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink, sink_format);
> - if (status != MODE_OK) {
> - if (ycbcr_420_only ||
> - !connector->base.ycbcr_420_allowed ||
> - !drm_mode_is_420_also(&connector->base.display_info, mode))
> - return status;
> -
> - sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> -
> - status = intel_pfit_mode_valid(display, mode, sink_format, 0);
> - if (status != MODE_OK)
> - return status;
> -
> - status = intel_hdmi_mode_clock_valid(&connector->base, clock, has_hdmi_sink,
> - sink_format);
> - if (status != MODE_OK)
> - return status;
> - }
> -
> return intel_mode_valid_max_plane_size(display, mode, 1);
> }
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection
2026-03-31 13:35 ` Nicolas Frattaroli
@ 2026-04-06 5:32 ` Nautiyal, Ankit K
2026-04-07 18:00 ` Ville Syrjälä
0 siblings, 1 reply; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 5:32 UTC (permalink / raw)
To: Nicolas Frattaroli, intel-gfx, Ville Syrjala; +Cc: intel-xe
On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Restructure intel_dp_compute_output_format() to resemble the new
>> intel_hdmi_compute_output_formats().
>>
>> Again, we basically have two main code paths:
>> - YCbCr 4:2:0 only modes
>> - everything else including YCbCr 4:2:0 also modes
>>
>> Take the exact same approach with the DP code, making the
>> format selection much less convoluted.
>>
>> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
>> 1 file changed, 69 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 4955bd8b11d7..230b45acde29 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>> return MODE_OK;
>> }
>>
>> +static enum drm_mode_status
>> +intel_dp_sink_format_valid(struct intel_connector *connector,
>> + const struct drm_display_mode *mode,
>> + enum intel_output_format sink_format)
>> +{
>> + const struct drm_display_info *info = &connector->base.display_info;
>> +
>> + switch (sink_format) {
>> + case INTEL_OUTPUT_FORMAT_YCBCR420:
>> + if (!connector->base.ycbcr_420_allowed ||
>> + !drm_mode_is_420(info, mode))
>> + return MODE_NO_420;
>> +
>> + return MODE_OK;
>> + case INTEL_OUTPUT_FORMAT_RGB:
>> + return MODE_OK;
>> + default:
>> + MISSING_CASE(sink_format);
>> + return MODE_BAD;
>> + }
>> +}
>> +
> I think here we'll want another
> ---
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index e23162fc3f8b..a1dc089c54f5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
>
> return MODE_OK;
> case INTEL_OUTPUT_FORMAT_RGB:
> + return MODE_OK;
> + case INTEL_OUTPUT_FORMAT_YCBCR444:
> + if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> + return MODE_BAD;
> +
> return MODE_OK;
> default:
> MISSING_CASE(sink_format);
> ---
>
> though this time, no bpc related changes. With that fixed, I get
> YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> to be unrelated userspace reasons, though the KMS property's enum
> value is exposed properly.
Hmm... this alone should not be sufficient till we actually have code to
try with YCBCR444 in intel_dp_compute_formats().
>
>> int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>> {
>> return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
>> @@ -3330,41 +3352,59 @@ static int
>> intel_dp_compute_output_format(struct intel_encoder *encoder,
>> struct intel_crtc_state *crtc_state,
>> struct drm_connector_state *conn_state,
>> - bool respect_downstream_limits)
>> + bool respect_downstream_limits,
>> + enum intel_output_format sink_format)
>> {
>> - struct intel_display *display = to_intel_display(encoder);
>> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> struct intel_connector *connector = intel_dp->attached_connector;
>> - const struct drm_display_info *info = &connector->base.display_info;
>> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> - bool ycbcr_420_only;
>> - int ret;
>>
>> - ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
>> -
>> - if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
>> - drm_dbg_kms(display->drm,
>> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
>> - } else {
>> - crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
>> - }
>> + if (intel_dp_sink_format_valid(connector, adjusted_mode,
>> + sink_format) != MODE_OK)
>> + return -EINVAL;
>>
>> + crtc_state->sink_format = sink_format;
>> crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
>>
>> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> - respect_downstream_limits);
>> - if (ret) {
>> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
>> - !connector->base.ycbcr_420_allowed ||
>> - !drm_mode_is_420_also(info, adjusted_mode))
>> - return ret;
>> -
>> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
>> - crtc_state->output_format = intel_dp_output_format(connector,
>> - crtc_state->sink_format);
>> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> - respect_downstream_limits);
>> + return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
>> + respect_downstream_limits);
> With the removal of intel_dp_sink_format in this function, I wonder
> if we can get rid of it entirely now. It's only called in
> intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> we're fine in that regard).
I agree we can remove intel_dp_sink_format() but IMO it should be after
patch#7 where we are validating sink format for mode valid.
I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be
passed the sink_format directly since we have already validated that.
Regards,
Ankit
>
> Judging by the "min" in the function name, I assume it should be
> using INTEL_OUTPUT_FORMAT_YCBCR420 in drm_mode_is_420_also cases,
> whereas right now it only gets this from intel_dp_sink_format if
> the mode is drm_mode_is_420_only. So I think removing
> intel_dp_sink_format entirely as a follow-up, and folding a
> corrected minimum bandwidth computation that uses 420 if
> drm_mode_is_420 into intel_dp_mode_min_link_bpp_x16 would make
> sense, unless I'm totally misunderstanding the code here.
>
>> +}
>> +
>> +static int
>> +intel_dp_compute_formats(struct intel_encoder *encoder,
>> + struct intel_crtc_state *crtc_state,
>> + struct drm_connector_state *conn_state,
>> + bool respect_downstream_limits)
>> +{
>> + struct intel_display *display = to_intel_display(encoder);
>> + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> + struct intel_connector *connector = intel_dp->attached_connector;
>> + const struct drm_display_info *info = &connector->base.display_info;
>> + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> + int ret;
>> +
>> + if (drm_mode_is_420_only(info, adjusted_mode)) {
>> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_YCBCR420);
>> +
>> + if (ret) {
>> + drm_dbg_kms(display->drm,
>> + "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>> +
>> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_RGB);
>> + }
>> + } else {
>> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_RGB);
>> +
>> + if (ret && drm_mode_is_420_also(info, adjusted_mode))
>> + ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
>> + respect_downstream_limits,
>> + INTEL_OUTPUT_FORMAT_YCBCR420);
>> }
>>
>> return ret;
>> @@ -3539,9 +3579,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>> * Try to respect downstream TMDS clock limits first, if
>> * that fails assume the user might know something we don't.
>> */
>> - ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
>> + ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
>> if (ret)
>> - ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
>> + ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
>> if (ret)
>> return ret;
>>
>>
>
>
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice
2026-03-30 23:53 ` [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
@ 2026-04-06 8:45 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 8:45 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we only validate "4:2:0 also" modes as RGB. But
> if that fails we could perhaps still use the mode in with
> 4:2:0 output. All we have to do is retry the validation with
> the different sink format.
>
> So far we did the double validation only so far as it affects
> PCON TMDS clock limits. But validating everything twice seems
> a bit more sane.
>
> Note that intel_dp_output_format() might still end up picking
> RGB for the actual output format (and letting PCON deal with
> the YCbCr conversion). So I suppose we could still fail the
> validation due to that, and forcing even the output format
> to 4:2:0 might solve it on a third try. But we'd need the
> same fallback logic in intel_dp_compute_config(). For now
> this seems sufficient.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 114 +++++++++++++-----------
> 1 file changed, 61 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 230b45acde29..86319bf09a19 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1320,12 +1320,10 @@ intel_dp_tmds_clock_valid(struct intel_dp *intel_dp,
> static enum drm_mode_status
> intel_dp_mode_valid_downstream(struct intel_connector *connector,
> const struct drm_display_mode *mode,
> - int target_clock)
> + int target_clock,
> + enum intel_output_format sink_format)
> {
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> - const struct drm_display_info *info = &connector->base.display_info;
> - enum drm_mode_status status;
> - enum intel_output_format sink_format;
>
> /* If PCON supports FRL MODE, check FRL bandwidth constraints */
> if (intel_dp->dfp.pcon_max_frl_bw) {
> @@ -1350,25 +1348,9 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> target_clock > intel_dp->dfp.max_dotclock)
> return MODE_CLOCK_HIGH;
>
> - sink_format = intel_dp_sink_format(connector, mode);
> -
> /* Assume 8bpc for the DP++/HDMI/DVI TMDS clock check */
> - status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> - 8, sink_format, true);
> -
> - if (status != MODE_OK) {
> - if (sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> - !connector->base.ycbcr_420_allowed ||
> - !drm_mode_is_420_also(info, mode))
> - return status;
> - sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> - status = intel_dp_tmds_clock_valid(intel_dp, target_clock,
> - 8, sink_format, true);
> - if (status != MODE_OK)
> - return status;
> - }
> -
> - return MODE_OK;
> + return intel_dp_tmds_clock_valid(intel_dp, target_clock,
> + 8, sink_format, true);
> }
>
> static enum drm_mode_status
> @@ -1464,15 +1446,14 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
> }
>
> static enum drm_mode_status
> -intel_dp_mode_valid(struct drm_connector *_connector,
> - const struct drm_display_mode *mode)
> +intel_dp_mode_valid_format(struct intel_connector *connector,
> + const struct drm_display_mode *mode,
> + int target_clock,
> + enum intel_output_format sink_format)
> {
> - struct intel_display *display = to_intel_display(_connector->dev);
> - struct intel_connector *connector = to_intel_connector(_connector);
> + struct intel_display *display = to_intel_display(connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> - enum intel_output_format sink_format, output_format;
> - const struct drm_display_mode *fixed_mode;
> - int target_clock = mode->clock;
> + enum intel_output_format output_format;
> int max_rate, mode_rate, max_lanes, max_link_clock;
> u16 dsc_max_compressed_bpp = 0;
> enum drm_mode_status status;
> @@ -1480,29 +1461,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> int num_joined_pipes;
> int link_bpp_x16;
>
> - status = intel_cpu_transcoder_mode_valid(display, mode);
> - if (status != MODE_OK)
> - return status;
> -
> - if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> - return MODE_H_ILLEGAL;
> -
> - if (mode->clock < 10000)
> - return MODE_CLOCK_LOW;
> -
> - if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> - return MODE_H_ILLEGAL;
> -
> - fixed_mode = intel_panel_fixed_mode(connector, mode);
> - if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> - status = intel_panel_mode_valid(connector, mode);
> - if (status != MODE_OK)
> - return status;
> -
> - target_clock = fixed_mode->clock;
> - }
> -
> - sink_format = intel_dp_sink_format(connector, mode);
> output_format = intel_dp_output_format(connector, sink_format);
>
> max_link_clock = intel_dp_max_link_rate(intel_dp);
> @@ -1600,7 +1558,57 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> if (status != MODE_OK)
> return status;
>
> - return intel_dp_mode_valid_downstream(connector, mode, target_clock);
> + return intel_dp_mode_valid_downstream(connector, mode,
> + target_clock, sink_format);
> +}
> +
> +static enum drm_mode_status
> +intel_dp_mode_valid(struct drm_connector *_connector,
> + const struct drm_display_mode *mode)
> +{
> + struct intel_display *display = to_intel_display(_connector->dev);
> + struct intel_connector *connector = to_intel_connector(_connector);
> + const struct drm_display_info *info = &connector->base.display_info;
> + struct intel_dp *intel_dp = intel_attached_dp(connector);
> + const struct drm_display_mode *fixed_mode;
> + int target_clock = mode->clock;
> + enum drm_mode_status status;
> +
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> + if (status != MODE_OK)
> + return status;
> +
> + if (mode->flags & DRM_MODE_FLAG_DBLCLK)
> + return MODE_H_ILLEGAL;
> +
> + if (mode->clock < 10000)
> + return MODE_CLOCK_LOW;
> +
> + if (intel_dp_hdisplay_bad(display, mode->hdisplay))
> + return MODE_H_ILLEGAL;
> +
> + fixed_mode = intel_panel_fixed_mode(connector, mode);
> + if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> + status = intel_panel_mode_valid(connector, mode);
> + if (status != MODE_OK)
> + return status;
> +
> + target_clock = fixed_mode->clock;
> + }
> +
> + if (drm_mode_is_420_only(info, mode)) {
> + status = intel_dp_mode_valid_format(connector, mode, target_clock,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> + } else {
> + status = intel_dp_mode_valid_format(connector, mode, target_clock,
> + INTEL_OUTPUT_FORMAT_RGB);
> +
Perhaps we can write a comment or TODO here about the PCON special case
which you mentioned:
that even though we are trying 420 sink output format, with PCON it is
possible that RGB output format gets picked up (if Pcon supports color
conversion).
In which case the rest of the mode validation will be wrt to RGB. Unless
we handle fallback in intel_dp_output_format().
In any case, the patch LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> + if (status != MODE_OK && drm_mode_is_420_also(info, mode))
> + status = intel_dp_mode_valid_format(connector, mode, target_clock,
> + INTEL_OUTPUT_FORMAT_YCBCR420);
> + }
> +
> + return status;
> }
>
> bool intel_dp_source_supports_tps3(struct intel_display *display)
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON
2026-03-30 23:53 ` [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
@ 2026-04-06 8:46 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 8:46 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> DVI sinks can't deal with YCbCr. Make sure we have a HDMI sink connected
> after the PCON before doing YCbCr 4:2:0 output.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
LGTM.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 86319bf09a19..ce40d38557e1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1358,10 +1358,15 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
> const struct drm_display_mode *mode,
> enum intel_output_format sink_format)
> {
> + struct intel_dp *intel_dp = intel_attached_dp(connector);
> const struct drm_display_info *info = &connector->base.display_info;
>
> switch (sink_format) {
> case INTEL_OUTPUT_FORMAT_YCBCR420:
> + if (intel_dp->dfp.min_tmds_clock &&
> + !intel_dp_has_hdmi_sink(intel_dp))
> + return MODE_NO_420;
> +
> if (!connector->base.ycbcr_420_allowed ||
> !drm_mode_is_420(info, mode))
> return MODE_NO_420;
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid()
2026-03-30 23:53 ` [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
@ 2026-04-06 8:51 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 8:51 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Make sure the sink supports out chosen sink format. I suppose it
s/out/our
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> might be at least possible that some PCONs might not snoop the EDID
> hard enough and filter out all the modes that they should.
>
> Also if we ever want to add a similar "force DVI" knob to DP
> outputs that we have for native HDMI, we'd need to manually
> get rid of anything DVI sinks can't handle.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ce40d38557e1..ed89fbcdd549 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1466,6 +1466,10 @@ intel_dp_mode_valid_format(struct intel_connector *connector,
> int num_joined_pipes;
> int link_bpp_x16;
>
> + status = intel_dp_sink_format_valid(connector, mode, sink_format);
> + if (status != MODE_OK)
> + return status;
> +
> output_format = intel_dp_output_format(connector, sink_format);
>
> max_link_clock = intel_dp_max_link_rate(intel_dp);
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort
2026-03-30 23:53 ` [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
@ 2026-04-06 8:52 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 8:52 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
> already during the first pass when respect_downstream_limits==true.
> It seems better to try everything else first (like ignoring TMDS
> clock limits) while still preferring 4:2:0, and only if everything
> else has failed fall back to RGB.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 95bd38c620d1..6bc1689cbf93 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2314,7 +2314,7 @@ static int intel_hdmi_compute_formats(struct intel_encoder *encoder,
> respect_downstream_limits,
> INTEL_OUTPUT_FORMAT_YCBCR420);
>
> - if (ret) {
> + if (ret && !respect_downstream_limits) {
Makes sense.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> drm_dbg_kms(display->drm,
> "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 9/9] drm/i915/dp: Make the RGB fallback for "4:2:0 only" modes the last resort
2026-03-30 23:53 ` [PATCH 9/9] drm/i915/dp: " Ville Syrjala
@ 2026-04-06 8:52 ` Nautiyal, Ankit K
0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-04-06 8:52 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nicolas Frattaroli
On 3/31/2026 5:23 AM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently we take the Hail Mary RGB fallback for "4:2:0 only" modes
> already during the first pass when respect_downstream_limits==true.
> It seems better to try everything else first (like ignoring TMDS
> clock limits) while still preferring 4:2:0, and only if everything
> else has failed fall back to RGB.
>
> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ed89fbcdd549..e23162fc3f8b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3405,7 +3405,7 @@ intel_dp_compute_formats(struct intel_encoder *encoder,
> respect_downstream_limits,
> INTEL_OUTPUT_FORMAT_YCBCR420);
>
> - if (ret) {
> + if (ret && !respect_downstream_limits) {
> drm_dbg_kms(display->drm,
> "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
>
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection
2026-04-06 5:26 ` Nautiyal, Ankit K
@ 2026-04-07 7:14 ` Nicolas Frattaroli
0 siblings, 0 replies; 27+ messages in thread
From: Nicolas Frattaroli @ 2026-04-07 7:14 UTC (permalink / raw)
To: intel-gfx, Ville Syrjala, Nautiyal, Ankit K; +Cc: intel-xe
On Monday, 6 April 2026 07:26:04 Central European Summer Time Nautiyal, Ankit K wrote:
> On 3/31/2026 5:42 PM, Nicolas Frattaroli wrote:
> > On Tuesday, 31 March 2026 01:53:32 Central European Summer Time Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> intel_hdmi_compute_output_format() is a bit of a mess. Try to
> >> restructure it into a more readable form.
> >>
> >> Right now we basically have two main code paths:
> >> - YCbCr 4:2:0 only modes
> >> - everything else including YCbCr 4:2:0 also modes
> >>
> >> Those two basically do the same two steps (try 4:2:0 and try 4:4:4)
> >> but in opposite orders. Let's write that out in a more explicit
> >> if-else form. And since I'm running out of function names I'll
> >> rename the function with that high level logic into
> >> intel_hdmi_compute_formats() and it will call (the new) with
> >> intel_hdmi_compute_output_format() with an explicit sink_format
> >> as needed.
> >>
> >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_hdmi.c | 112 ++++++++++++++--------
> >> 1 file changed, 70 insertions(+), 42 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> index 072b0554cc24..16873fc7bcb9 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> >> @@ -2021,6 +2021,30 @@ intel_hdmi_mode_clock_valid(struct drm_connector *_connector, int clock,
> >> return status;
> >> }
> >>
> >> +static enum drm_mode_status
> >> +intel_hdmi_sink_format_valid(struct intel_connector *connector,
> >> + const struct drm_display_mode *mode,
> >> + bool has_hdmi_sink,
> >> + enum intel_output_format sink_format)
> >> +{
> >> + const struct drm_display_info *info = &connector->base.display_info;
> >> +
> >> + switch (sink_format) {
> >> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> >> + if (!has_hdmi_sink ||
> >> + !connector->base.ycbcr_420_allowed ||
> >> + !drm_mode_is_420(info, mode))
> >> + return MODE_NO_420;
> >> +
> >> + return MODE_OK;
> >> + case INTEL_OUTPUT_FORMAT_RGB:
> >> + return MODE_OK;
> >> + default:
> >> + MISSING_CASE(sink_format);
> >> + return MODE_BAD;
> >> + }
> >> +}
> > I think this here is missing INTEL_OUTPUT_FORMAT_YCBCR444 as a case.
> > The following diff adding it for both intel_hdmi_sink_format_valid
> > and intel_hdmi_sink_bpc_possible that I quickly whipped up may be the
> > way to go, but I'm unsure about the interaction between the two:
>
> Hmm.. Trying YCBCR444 format, is not yet implemented.
>
> We need to have a well defined policy as to when to use YCBCR444, and
> that should be in the newly created intel_hdmi_compute_formats(),
> perhaps it should be after we have tried and failed with RGB444.
>
> (Although I am not sure in what case compute for RGB 444 will fail and
> pass for YCBCR444).
>
> However,this should be a separate patch/series.
Makes sense. Instead of defining this policy for automatic selection,
I'll add the necessary code to handle it in my color format series,
where such an output format can be explicitly requested through a DRM
property. I don't think using it as a fallback in automatic selection
makes any sense: it saves no bandwidth over RGB444 and I'm pretty sure
HDMI mandates that anything supported in YCBCR444 is also supported in
RGB444.
Kind regards,
Nicolas Frattaroli
>
>
> Regards,
>
> Ankit
>
>
> > [... snip ...]
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection
2026-04-06 5:32 ` Nautiyal, Ankit K
@ 2026-04-07 18:00 ` Ville Syrjälä
2026-04-07 18:20 ` Ville Syrjälä
0 siblings, 1 reply; 27+ messages in thread
From: Ville Syrjälä @ 2026-04-07 18:00 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: Nicolas Frattaroli, intel-gfx, intel-xe
On Mon, Apr 06, 2026 at 11:02:03AM +0530, Nautiyal, Ankit K wrote:
>
> On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> > On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Restructure intel_dp_compute_output_format() to resemble the new
> >> intel_hdmi_compute_output_formats().
> >>
> >> Again, we basically have two main code paths:
> >> - YCbCr 4:2:0 only modes
> >> - everything else including YCbCr 4:2:0 also modes
> >>
> >> Take the exact same approach with the DP code, making the
> >> format selection much less convoluted.
> >>
> >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
> >> 1 file changed, 69 insertions(+), 29 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 4955bd8b11d7..230b45acde29 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> >> return MODE_OK;
> >> }
> >>
> >> +static enum drm_mode_status
> >> +intel_dp_sink_format_valid(struct intel_connector *connector,
> >> + const struct drm_display_mode *mode,
> >> + enum intel_output_format sink_format)
> >> +{
> >> + const struct drm_display_info *info = &connector->base.display_info;
> >> +
> >> + switch (sink_format) {
> >> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> >> + if (!connector->base.ycbcr_420_allowed ||
> >> + !drm_mode_is_420(info, mode))
> >> + return MODE_NO_420;
> >> +
> >> + return MODE_OK;
> >> + case INTEL_OUTPUT_FORMAT_RGB:
> >> + return MODE_OK;
> >> + default:
> >> + MISSING_CASE(sink_format);
> >> + return MODE_BAD;
> >> + }
> >> +}
> >> +
> > I think here we'll want another
> > ---
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index e23162fc3f8b..a1dc089c54f5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
> >
> > return MODE_OK;
> > case INTEL_OUTPUT_FORMAT_RGB:
> > + return MODE_OK;
> > + case INTEL_OUTPUT_FORMAT_YCBCR444:
> > + if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> > + return MODE_BAD;
> > +
> > return MODE_OK;
> > default:
> > MISSING_CASE(sink_format);
> > ---
> >
> > though this time, no bpc related changes. With that fixed, I get
> > YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> > to be unrelated userspace reasons, though the KMS property's enum
> > value is exposed properly.
>
>
> Hmm... this alone should not be sufficient till we actually have code to
> try with YCBCR444 in intel_dp_compute_formats().
>
>
> >
> >> int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
> >> {
> >> return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> >> @@ -3330,41 +3352,59 @@ static int
> >> intel_dp_compute_output_format(struct intel_encoder *encoder,
> >> struct intel_crtc_state *crtc_state,
> >> struct drm_connector_state *conn_state,
> >> - bool respect_downstream_limits)
> >> + bool respect_downstream_limits,
> >> + enum intel_output_format sink_format)
> >> {
> >> - struct intel_display *display = to_intel_display(encoder);
> >> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >> struct intel_connector *connector = intel_dp->attached_connector;
> >> - const struct drm_display_info *info = &connector->base.display_info;
> >> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> >> - bool ycbcr_420_only;
> >> - int ret;
> >>
> >> - ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> >> -
> >> - if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> >> - drm_dbg_kms(display->drm,
> >> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> >> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> >> - } else {
> >> - crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> >> - }
> >> + if (intel_dp_sink_format_valid(connector, adjusted_mode,
> >> + sink_format) != MODE_OK)
> >> + return -EINVAL;
> >>
> >> + crtc_state->sink_format = sink_format;
> >> crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
> >>
> >> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> - respect_downstream_limits);
> >> - if (ret) {
> >> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> >> - !connector->base.ycbcr_420_allowed ||
> >> - !drm_mode_is_420_also(info, adjusted_mode))
> >> - return ret;
> >> -
> >> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> >> - crtc_state->output_format = intel_dp_output_format(connector,
> >> - crtc_state->sink_format);
> >> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> - respect_downstream_limits);
> >> + return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> >> + respect_downstream_limits);
> > With the removal of intel_dp_sink_format in this function, I wonder
> > if we can get rid of it entirely now. It's only called in
> > intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> > limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> > we're fine in that regard).
>
> I agree we can remove intel_dp_sink_format() but IMO it should be after
> patch#7 where we are validating sink format for mode valid.
>
> I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be
> passed the sink_format directly since we have already validated that.
Aye. I think that really should have been part of patch 5
https://lore.kernel.org/intel-gfx/20260330235339.29479-6-ville.syrjala@linux.intel.com/
where I explicitly pass in the desired sink format.
I'll fix that up.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection
2026-04-07 18:00 ` Ville Syrjälä
@ 2026-04-07 18:20 ` Ville Syrjälä
0 siblings, 0 replies; 27+ messages in thread
From: Ville Syrjälä @ 2026-04-07 18:20 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: Nicolas Frattaroli, intel-gfx, intel-xe
On Tue, Apr 07, 2026 at 09:00:30PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 06, 2026 at 11:02:03AM +0530, Nautiyal, Ankit K wrote:
> >
> > On 3/31/2026 7:05 PM, Nicolas Frattaroli wrote:
> > > On Tuesday, 31 March 2026 01:53:34 Central European Summer Time Ville Syrjala wrote:
> > >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >>
> > >> Restructure intel_dp_compute_output_format() to resemble the new
> > >> intel_hdmi_compute_output_formats().
> > >>
> > >> Again, we basically have two main code paths:
> > >> - YCbCr 4:2:0 only modes
> > >> - everything else including YCbCr 4:2:0 also modes
> > >>
> > >> Take the exact same approach with the DP code, making the
> > >> format selection much less convoluted.
> > >>
> > >> Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
> > >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >> ---
> > >> drivers/gpu/drm/i915/display/intel_dp.c | 98 +++++++++++++++++--------
> > >> 1 file changed, 69 insertions(+), 29 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> index 4955bd8b11d7..230b45acde29 100644
> > >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > >> @@ -1371,6 +1371,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> > >> return MODE_OK;
> > >> }
> > >>
> > >> +static enum drm_mode_status
> > >> +intel_dp_sink_format_valid(struct intel_connector *connector,
> > >> + const struct drm_display_mode *mode,
> > >> + enum intel_output_format sink_format)
> > >> +{
> > >> + const struct drm_display_info *info = &connector->base.display_info;
> > >> +
> > >> + switch (sink_format) {
> > >> + case INTEL_OUTPUT_FORMAT_YCBCR420:
> > >> + if (!connector->base.ycbcr_420_allowed ||
> > >> + !drm_mode_is_420(info, mode))
> > >> + return MODE_NO_420;
> > >> +
> > >> + return MODE_OK;
> > >> + case INTEL_OUTPUT_FORMAT_RGB:
> > >> + return MODE_OK;
> > >> + default:
> > >> + MISSING_CASE(sink_format);
> > >> + return MODE_BAD;
> > >> + }
> > >> +}
> > >> +
> > > I think here we'll want another
> > > ---
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index e23162fc3f8b..a1dc089c54f5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -1373,6 +1373,11 @@ intel_dp_sink_format_valid(struct intel_connector *connector,
> > >
> > > return MODE_OK;
> > > case INTEL_OUTPUT_FORMAT_RGB:
> > > + return MODE_OK;
> > > + case INTEL_OUTPUT_FORMAT_YCBCR444:
> > > + if (!(info->color_formats & BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444)))
> > > + return MODE_BAD;
> > > +
> > > return MODE_OK;
> > > default:
> > > MISSING_CASE(sink_format);
> > > ---
> > >
> > > though this time, no bpc related changes. With that fixed, I get
> > > YCbCr444 at 10bpc as well as 8bpc. Can't test 4:2:0 for what appears
> > > to be unrelated userspace reasons, though the KMS property's enum
> > > value is exposed properly.
> >
> >
> > Hmm... this alone should not be sufficient till we actually have code to
> > try with YCBCR444 in intel_dp_compute_formats().
> >
> >
> > >
> > >> int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
> > >> {
> > >> return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> > >> @@ -3330,41 +3352,59 @@ static int
> > >> intel_dp_compute_output_format(struct intel_encoder *encoder,
> > >> struct intel_crtc_state *crtc_state,
> > >> struct drm_connector_state *conn_state,
> > >> - bool respect_downstream_limits)
> > >> + bool respect_downstream_limits,
> > >> + enum intel_output_format sink_format)
> > >> {
> > >> - struct intel_display *display = to_intel_display(encoder);
> > >> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > >> struct intel_connector *connector = intel_dp->attached_connector;
> > >> - const struct drm_display_info *info = &connector->base.display_info;
> > >> const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> > >> - bool ycbcr_420_only;
> > >> - int ret;
> > >>
> > >> - ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
> > >> -
> > >> - if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
> > >> - drm_dbg_kms(display->drm,
> > >> - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
> > >> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> > >> - } else {
> > >> - crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
> > >> - }
> > >> + if (intel_dp_sink_format_valid(connector, adjusted_mode,
> > >> + sink_format) != MODE_OK)
> > >> + return -EINVAL;
> > >>
> > >> + crtc_state->sink_format = sink_format;
> > >> crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
> > >>
> > >> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> - respect_downstream_limits);
> > >> - if (ret) {
> > >> - if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
> > >> - !connector->base.ycbcr_420_allowed ||
> > >> - !drm_mode_is_420_also(info, adjusted_mode))
> > >> - return ret;
> > >> -
> > >> - crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
> > >> - crtc_state->output_format = intel_dp_output_format(connector,
> > >> - crtc_state->sink_format);
> > >> - ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> - respect_downstream_limits);
> > >> + return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
> > >> + respect_downstream_limits);
> > > With the removal of intel_dp_sink_format in this function, I wonder
> > > if we can get rid of it entirely now. It's only called in
> > > intel_dp_mode_min_link_bpp_x16, which seems to be used for bandwidth
> > > limitation calculations (where YCbCr444 vs RGB444 doesn't matter, so
> > > we're fine in that regard).
> >
> > I agree we can remove intel_dp_sink_format() but IMO it should be after
> > patch#7 where we are validating sink format for mode valid.
> >
> > I guess, with that change, intel_dp_mode_min_link_bpp_x16() can be
> > passed the sink_format directly since we have already validated that.
>
> Aye. I think that really should have been part of patch 5
> https://lore.kernel.org/intel-gfx/20260330235339.29479-6-ville.syrjala@linux.intel.com/
> where I explicitly pass in the desired sink format.
>
> I'll fix that up.
The use of intel_dp_mode_min_link_bpp_x16() for the FRL bandwidth seems
completely incorrect. We are trying to check for bandwidth on the HDMI
link after the PCON, not the DP link before the PCON. I'll just send
a separate fix for that...
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2026-04-07 18:20 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-30 23:53 [PATCH 0/9] drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Ville Syrjala
2026-03-30 23:53 ` [PATCH 1/9] drm/i915/hdmi: Add missing intel_pfit_mode_valid() for 4:2:0 also modes Ville Syrjala
2026-04-06 5:23 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 2/9] drm/i915/hdmi: Restructure the sink/output format selection Ville Syrjala
2026-03-31 12:12 ` Nicolas Frattaroli
2026-04-06 5:26 ` Nautiyal, Ankit K
2026-04-07 7:14 ` Nicolas Frattaroli
2026-04-06 5:27 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 3/9] drm/i915/hdmi: Restructure 4:2:0 vs. 4:4:4 mode validation Ville Syrjala
2026-04-06 5:28 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 4/9] drm/i915/dp: Restructure the sink/output format selection Ville Syrjala
2026-03-31 13:35 ` Nicolas Frattaroli
2026-04-06 5:32 ` Nautiyal, Ankit K
2026-04-07 18:00 ` Ville Syrjälä
2026-04-07 18:20 ` Ville Syrjälä
2026-03-30 23:53 ` [PATCH 5/9] drm/i915/dp: Validate "4:2:0 also" modes twice Ville Syrjala
2026-04-06 8:45 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 6/9] drm/i915/dp: Require a HDMI sink for YCbCr output via PCON Ville Syrjala
2026-04-06 8:46 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 7/9] drm/i915/dp: Validate sink format in .mode_valid() Ville Syrjala
2026-04-06 8:51 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 8/9] drm/i915/hdmi: Make the RGB fallback for "4:2:0 only" modes the last resort Ville Syrjala
2026-04-06 8:52 ` Nautiyal, Ankit K
2026-03-30 23:53 ` [PATCH 9/9] drm/i915/dp: " Ville Syrjala
2026-04-06 8:52 ` Nautiyal, Ankit K
2026-03-31 0:50 ` ✓ i915.CI.BAT: success for drm/i915/{dp, hdmi}: Restructure DP/HDMI sink format handling Patchwork
2026-03-31 7:46 ` ✗ i915.CI.Full: failure " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox