From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 3/3] glamor: Route fillspans and polyfillrects to glamor. Date: Fri, 11 Nov 2011 13:54:36 +0000 Message-ID: References: <1321000281-5097-1-git-send-email-zhigang.gong@linux.intel.com> <1321000281-5097-3-git-send-email-zhigang.gong@linux.intel.com> <056b01cca05f$8478fa80$8d6aef80$@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id E79AE9E7B8 for ; Fri, 11 Nov 2011 05:54:44 -0800 (PST) In-Reply-To: <056b01cca05f$8478fa80$8d6aef80$@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Zhigang Gong , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 11 Nov 2011 18:48:57 +0800, "Zhigang Gong" wrote: > > -----Original Message----- > > From: Chris Wilson [mailto:chris@chris-wilson.co.uk] > > Sent: Friday, November 11, 2011 5:08 PM > > To: Zhigang Gong; intel-gfx@lists.freedesktop.org > > Subject: Re: [Intel-gfx] [PATCH 3/3] glamor: Route fillspans and > polyfillrects > > to glamor. > > > > On Fri, 11 Nov 2011 16:31:21 +0800, Zhigang Gong > > wrote: > > > If GLAMOR is enabled, we route UXA's fillspans and polyfillrects to > > > glamor by default. And if glamor fail to accelerate it, UXA continue > > > to handle it. > > > > How is serialisation handled between the UXA and glamor acceleration > > routines? Don't you need to flush the UXA batch (if the pixmap is active) > > before handing over to glamor and similarly flush the glamor pixmap after > > failure? > Thanks for pointing this issue out. This is something I want to be discussed > here. > > There are three types of access to the pixmap: > 1. UXA batch command buffer. > 2. Glamor through OpenGL > 3. CPU access mapped BO buffer. > > My understanding is that the leading two types has the queue mechanism and > need > to be handled carefully. In general, we can treat glamor 's access as > another batch > buffer. Then in the place where current intel driver need to flush UXA batch > buffer, > we also need to flush the GL operations there. Right? > > And besides above places we need to flush glamor, we also need to flush UXA > batch > buffer before call into glamor and also need to flush glamor after the > glamor rendering > function really touch the pixmap. Right, we want to consider it as another form of pixmap migration, just instead of between different regions of memory we are migrating between different queues. We could envision using fences to coordinate rendering between the different batches, but that is likely to be overkill and not possible with most Intel hardware. -Chris -- Chris Wilson, Intel Open Source Technology Centre