From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/1] drm/i915: allow to select rc6 modes via kernel parameter Date: Sat, 11 Feb 2012 19:57:02 +0000 Message-ID: References: <1328988212-5356-1-git-send-email-eugeni.dodonov@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 587109E8FB for ; Sat, 11 Feb 2012 11:57:10 -0800 (PST) In-Reply-To: <1328988212-5356-1-git-send-email-eugeni.dodonov@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Eugeni Dodonov List-Id: intel-gfx@lists.freedesktop.org On Sat, 11 Feb 2012 17:23:32 -0200, Eugeni Dodonov wrote: > This allows to select which rc6 modes are to be used via kernel parameter, > via a bitmask parameter. E.g.: > > - to enable rc6, i915_enable_rc6=1 > - to enable rc6 and deep rc6, i915_enable_rc6=3 > - to enable rc6 and deepest rc6, use i915_enable_rc6=5 > - to enable rc6, deep and deepest rc6, use i915_enable_rc6=7 > > Please keep in mind that the deepest RC6 state really should NOT be used > by default, as it could potentially worsen the issues with deep RC6. So do > enable it only when you know what you are doing. However, having it around > could help solving possible future rc6-related issues and their debugging > on user machines. > > Note that this changes behavior - previously, value of 1 would enable both > RC6 and deep RC6. Now it should only enable RC6 and deep/deepest RC6 > stages must be enabled manually. > > v2: address Chris Wilson comments and clean up the code. Wow, that comment is superb! Definitely a standard we should try to achieve everywhere. > Signed-off-by: Eugeni Dodonov References: https://bugs.freedesktop.org/show_bug.cgi?id=42579 Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre