From: Peter Antoine <peter.antoine@intel.com>
To: Jeff McGee <jeff.mcgee@intel.com>
Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org,
dave.gordon@intel.com
Subject: Re: [PATCH v2 2/2] drm/i915: resize the GuC WOPCM for rc6
Date: Fri, 22 Jan 2016 09:45:37 +0000 (GMT) [thread overview]
Message-ID: <alpine.DEB.2.10.1601220941360.2994@peterant-linux2> (raw)
In-Reply-To: <20160121214140.GB30883@jeffdesk>
Reply inline.
On Thu, 21 Jan 2016, Jeff McGee wrote:
> On Thu, Jan 21, 2016 at 06:11:01PM +0000, Peter Antoine wrote:
>> This patch resizes the GuC WOPCM to so that the GuC and the RC6 memory
>> spaces do not overlap.
>>
>> Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
>> Signed-off-by: Peter Antoine <peter.antoine@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_guc_reg.h | 3 ++-
>> drivers/gpu/drm/i915/intel_guc_loader.c | 6 +++++-
>> 2 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
>> index 685c799..cb938b0 100644
>> --- a/drivers/gpu/drm/i915/i915_guc_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_guc_reg.h
>> @@ -58,7 +58,8 @@
>> #define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
>>
>> #define GUC_WOPCM_SIZE _MMIO(0xc050)
>> -#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
>> +#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
>> +#define BXT_GUC_WOPCM_SIZE_VALUE (0x70 << 12) /* 448KB */
>>
>> /* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
>> #define GUC_WOPCM_TOP (GUC_WOPCM_SIZE_VALUE)
> Should GUC_WOPCM_TOP be dynamically assigned the proper value, or is it
> sufficient to leave at the max possible WOPCM size? If the later, might be
> worth a comment.
> -Jeff
I'll send a follow up patch to add a comment this.
The whole area needs to be not mapped, as it is still accessed from the
GuC.
-Peter.
>
>> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
>> index 8182d11..69c85d1 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
>> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
>> @@ -304,7 +304,11 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
>> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>>
>> /* init WOPCM */
>> - I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
>> + if (IS_BROXTON(dev))
>> + I915_WRITE(GUC_WOPCM_SIZE, BXT_GUC_WOPCM_SIZE_VALUE);
>> + else
>> + I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
>> +
>> I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE);
>>
>> /* Enable MIA caching. GuC clock gating is disabled. */
>> --
>> 1.9.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
--
Peter Antoine (Android Graphics Driver Software Engineer)
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next prev parent reply other threads:[~2016-01-22 9:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 18:10 [PATCH v2 0/2] Enabling GuC Loading on Broxton Peter Antoine
2016-01-21 18:11 ` [PATCH v2 1/2] drm/i915: Adding Broxton GuC Loader Support Peter Antoine
2016-01-21 18:11 ` [PATCH v2 2/2] drm/i915: resize the GuC WOPCM for rc6 Peter Antoine
2016-01-21 21:41 ` Jeff McGee
2016-01-22 9:45 ` Peter Antoine [this message]
2016-02-03 15:39 ` Dave Gordon
2016-04-05 16:27 ` Rodrigo Vivi
2016-04-06 8:32 ` Peter Antoine
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