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d="scan'208";a="4419742" Received: from alekseim-mobl.ger.corp.intel.com (HELO localhost) ([10.245.244.34]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2026 10:04:35 -0700 Date: Mon, 19 Oct 2026 20:04:32 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Subject: Re: [PATCH 06/15] drm/i915/pfit: Extract i965_pfit_get_config() Message-ID: References: <20261019135309.23578-1-ville.syrjala@linux.intel.com> <20261019135309.23578-7-ville.syrjala@linux.intel.com> <46d5472ad05b1bffc3580dc5cb3194aa0e966446@intel.com> <664fe508a0ee588da0b936660fb1136b61ce2541@intel.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <664fe508a0ee588da0b936660fb1136b61ce2541@intel.com> X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Intel-gfx" X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Mon, Oct 19, 2026 at 07:05:05PM +0300, Jani Nikula wrote: > On Mon, 19 Oct 2026, Jani Nikula wrote: > > On Mon, 19 Oct 2026, Ville Syrjala wrote: > >> From: Ville Syrjälä > >> > >> Split i965_pfit_get_config() out from i9xx_pfit_get_config() to > >> unconfuse things a bit. > >> > >> Signed-off-by: Ville Syrjälä > >> --- > >> drivers/gpu/drm/i915/display/intel_pfit.c | 66 ++++++++++++++--------- > >> 1 file changed, 42 insertions(+), 24 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c > >> index 972218346362..82804159d0a1 100644 > >> --- a/drivers/gpu/drm/i915/display/intel_pfit.c > >> +++ b/drivers/gpu/drm/i915/display/intel_pfit.c > >> @@ -720,39 +720,52 @@ void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) > >> intel_de_write(display, PFIT_CONTROL(display), 0); > >> } > >> > >> -static bool i9xx_has_pfit(struct intel_display *display) > >> -{ > >> - if (display->platform.i830) > >> - return false; > >> - > >> - return DISPLAY_VER(display) >= 4 || > >> - display->platform.pineview || display->platform.mobile; > >> -} > >> - > >> -static void i9xx_pfit_get_config(struct intel_crtc_state *crtc_state) > >> +static void i965_pfit_get_config(struct intel_crtc_state *crtc_state) > >> { > >> struct intel_display *display = to_intel_display(crtc_state); > >> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > >> enum pipe pipe; > >> u32 tmp; > >> > >> - if (!i9xx_has_pfit(display)) > >> - return; > >> - > >> tmp = intel_de_read(display, PFIT_CONTROL(display)); > >> if (!(tmp & PFIT_ENABLE)) > >> return; > >> > >> /* Check whether the pfit is attached to our pipe. */ > >> - if (DISPLAY_VER(display) >= 4) > >> - pipe = REG_FIELD_GET(PFIT_PIPE_MASK, tmp); > >> - else > >> - pipe = PIPE_B; > >> - > >> + pipe = REG_FIELD_GET(PFIT_PIPE_MASK, tmp); > >> if (pipe != crtc->pipe) > >> return; > >> > >> crtc_state->gmch_pfit.control = tmp; > > > > This drops PFIT_PGM_RATIOS read. > > Judging by the next patch, this is intentional. Should be mentioned in > the commit message, and why it's okay we're still writing the register > also for i965. Yeah, we don't use programmed scale factors on i965+ and reading the register just gives back the automagic ratios that the hardware calculated (and some of which is garbage in the letterbox/pillabox modes). -- Ville Syrjälä Intel