From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Summers, Stuart" Subject: Re: [PATCH 4/4] drm/i915: Expand subslice mask Date: Thu, 21 Mar 2019 14:44:31 +0000 Message-ID: References: <20190320184837.16609-1-stuart.summers@intel.com> <20190320184837.16609-5-stuart.summers@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1196212508==" Return-path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7687B6E105 for ; Thu, 21 Mar 2019 14:44:33 +0000 (UTC) In-Reply-To: <20190320184837.16609-5-stuart.summers@intel.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "intel-gfx@lists.freedesktop.org" List-Id: intel-gfx@lists.freedesktop.org --===============1196212508== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-1; protocol="application/x-pkcs7-signature"; boundary="=-6+G60KukzQ7M40edR4gE" --=-6+G60KukzQ7M40edR4gE Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2019-03-20 at 11:48 -0700, Stuart Summers wrote: > Currently, the subslice_mask runtime parameter is stored as an > array of subslices per slice. Expand the subslice mask array to > better match what is presented to userspace through the > I915_QUERY_TOPOLOGY_INFO ioctl. The index into this array is > then calculated: > slice * subslice stride + subslice index / 8 >=20 > Signed-off-by: Stuart Summers > --- > drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++-- > drivers/gpu/drm/i915/i915_drv.c | 7 +++++-- > drivers/gpu/drm/i915/intel_device_info.c | 24 ++++++++++++++++++++ > ---- > drivers/gpu/drm/i915/intel_device_info.h | 11 +++++++++-- > 4 files changed, 39 insertions(+), 10 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index 1b3fd36ce20c..a682755c954b 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4036,7 +4036,8 @@ static void gen10_sseu_device_status(struct > drm_i915_private *dev_priv, > #define SS_MAX 6 > const struct intel_runtime_info *info =3D RUNTIME_INFO(dev_priv); > u32 s_reg[SS_MAX], eu_reg[2 * SS_MAX], eu_mask[2]; > - int s, ss; > + int s, ss, ss_idx; > + u8 ss_stride =3D GEN_SSEU_STRIDE(info->sseu.max_subslices); > =20 > for (s =3D 0; s < info->sseu.max_slices; s++) { > /* > @@ -4066,7 +4067,9 @@ static void gen10_sseu_device_status(struct > drm_i915_private *dev_priv, > continue; > =20 > sseu->slice_mask |=3D BIT(s); > - sseu->subslice_mask[s] =3D info->sseu.subslice_mask[s]; > + ss_idx =3D ss_stride * s; > + memcpy(sseu->subslice_mask + ss_idx, > + info->sseu.subslice_mask + ss_idx, ss_stride); > =20 > for (ss =3D 0; ss < info->sseu.max_subslices; ss++) { > unsigned int eu_cnt; > diff --git a/drivers/gpu/drm/i915/i915_drv.c > b/drivers/gpu/drm/i915/i915_drv.c > index a1eb4f47cb1d..8b0618a87a39 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -313,8 +313,9 @@ static int i915_getparam_ioctl(struct drm_device > *dev, void *data, > struct drm_i915_private *dev_priv =3D to_i915(dev); > struct pci_dev *pdev =3D dev_priv->drm.pdev; > struct sseu_dev_info *sseu =3D &RUNTIME_INFO(dev_priv)->sseu; > + u8 ss_stride =3D GEN_SSEU_STRIDE(sseu->max_subslices); > drm_i915_getparam_t *param =3D data; > - int value; > + int value =3D 0; > =20 > switch (param->param) { > case I915_PARAM_IRQ_ACTIVE: > @@ -443,7 +444,9 @@ static int i915_getparam_ioctl(struct drm_device > *dev, void *data, > return -ENODEV; > break; > case I915_PARAM_SUBSLICE_MASK: > - value =3D sseu->subslice_mask[0]; > + /* Only copy bits from the first subslice */ > + memcpy(&value, sseu->subslice_mask, > + min(ss_stride, (u8)sizeof(value))); > if (!value) > return -ENODEV; > break; > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > b/drivers/gpu/drm/i915/intel_device_info.c > index 2dec370eeac7..36c869c2db49 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -83,17 +83,32 @@ void intel_device_info_dump_flags(const struct > intel_device_info *info, > #undef PRINT_FLAG > } > =20 > +static u8 * > +subslice_per_slice_str(u8 *buf, const struct sseu_dev_info *sseu, u8 > slice) > +{ > + int i; > + u8 ss_stride =3D GEN_SSEU_STRIDE(sseu->max_subslices); > + u8 *temp =3D buf; > + > + for (i =3D slice * ss_stride; i < ss_stride; i++, temp +=3D 2) Sorry for the churn here. This loop is clearly wrong. Please hold off on this review until I have a fix posted. Thanks, Stuart > + sprintf(temp, "%02x", > + sseu->subslice_mask[slice * ss_stride + i]); > + > + return buf; > +} > + > static void sseu_dump(const struct sseu_dev_info *sseu, struct > drm_printer *p) > { > int s; > + u8 buf[256]; > =20 > drm_printf(p, "slice total: %u, mask=3D%04x\n", > hweight8(sseu->slice_mask), sseu->slice_mask); > drm_printf(p, "subslice total: %u\n", > sseu_subslice_total(sseu)); > for (s =3D 0; s < sseu->max_slices; s++) { > - drm_printf(p, "slice%d: %u subslices, mask=3D%04x\n", > + drm_printf(p, "slice%d: %u subslices, mask=3D%s\n", > s, sseu_subslices_per_slice(sseu, s), > - sseu->subslice_mask[s]); > + subslice_per_slice_str(buf, sseu, s)); > } > drm_printf(p, "EU total: %u\n", sseu->eu_total); > drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); > @@ -117,6 +132,7 @@ void intel_device_info_dump_topology(const struct > sseu_dev_info *sseu, > struct drm_printer *p) > { > int s, ss; > + u8 buf[256]; > =20 > if (sseu->max_slices =3D=3D 0) { > drm_printf(p, "Unavailable\n"); > @@ -124,9 +140,9 @@ void intel_device_info_dump_topology(const struct > sseu_dev_info *sseu, > } > =20 > for (s =3D 0; s < sseu->max_slices; s++) { > - drm_printf(p, "slice%d: %u subslice(s) (0x%hhx):\n", > + drm_printf(p, "slice%d: %u subslice(s) (0x%s):\n", > s, sseu_subslices_per_slice(sseu, s), > - sseu->subslice_mask[s]); > + subslice_per_slice_str(buf, sseu, s)); > =20 > for (ss =3D 0; ss < sseu->max_subslices; ss++) { > u16 enabled_eus =3D sseu_get_eus(sseu, s, ss); > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > b/drivers/gpu/drm/i915/intel_device_info.h > index 9a1f13521d9a..29de86bf9236 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -125,10 +125,11 @@ enum intel_ppgtt_type { > #define GEN_MAX_SLICES (6) /* CNL upper bound */ > #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */ > #define GEN_SSEU_STRIDE(bits) DIV_ROUND_UP(bits, BITS_PER_BYTE) > +#define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES) > =20 > struct sseu_dev_info { > u8 slice_mask; > - u8 subslice_mask[GEN_MAX_SLICES]; > + u8 subslice_mask[GEN_MAX_SLICES * GEN_MAX_SUBSLICE_STRIDE]; > u16 eu_total; > u8 eu_per_subslice; > u8 min_eu_in_pool; > @@ -235,7 +236,13 @@ static inline unsigned int > sseu_subslice_total(const struct sseu_dev_info *sseu) > static inline unsigned int > sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice) > { > - return hweight8(sseu->subslice_mask[slice]); > + unsigned int i, total =3D 0; > + u8 ss_stride =3D GEN_SSEU_STRIDE(sseu->max_subslices); > + > + for (i =3D 0; i < ss_stride; i++) > + total +=3D hweight8(sseu->subslice_mask[slice * ss_stride > + i]); > + > + return total; > } > =20 > static inline int sseu_eu_idx(const struct sseu_dev_info *sseu, --=-6+G60KukzQ7M40edR4gE Content-Type: application/x-pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: 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