From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Sanitize the output registers after resume Date: Tue, 12 Apr 2011 19:01:11 +0100 Message-ID: References: <1302628011-16640-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id F2B249E7CB for ; Tue, 12 Apr 2011 11:01:14 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Keith Packard , intel-gfx@lists.freedesktop.org Cc: stable@kernel.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 12 Apr 2011 10:26:36 -0700, Keith Packard wrote: > On Tue, 12 Apr 2011 18:06:51 +0100, Chris Wilson wrote: > > > This patch rearranges the code we already have to clear up the > > conflicting state upon init and calls it from reset (which is called > > after we have lost control of the hardware, i.e. along both the boot and > > resume paths) instead. > > Note that intel_sanitize_modesetting does not do anything on PCH > hardware yet. Otherwise, this looks like a reasonable plan. Yes, at the moment the only scenario we've discovered is where the BIOS sets up a conflicting pipe<->plane mapping, which is only possible before PCH. If we go hunting, we can probably find many more. :| -Chris -- Chris Wilson, Intel Open Source Technology Centre