Re: [PATCH 15/15] drm/i915: Use more atomic state in intel_color.c

Daniel Vetter
2016-08-18T14:02:42Z

On Tue, Aug 09, 2016 at 05:04:14PM +0200, Maarten Lankhorst wrote:
> crtc_state is already passed around, use it instead of crtc->config.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>

> ---
> drivers/gpu/drm/i915/intel_color.c | 24 ++++++++++++++----------
> 1 file changed, 14 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index bc0fef3d3335..95a72771eea6 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -100,13 +100,14 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> int i, pipe = intel_crtc->pipe;
> uint16_t coeffs[9] = { 0, };
> + struct intel_crtc_state *intel_crtc_state = to_intel_crtc_state(crtc_state);
>
> if (crtc_state->ctm) {
> struct drm_color_ctm *ctm =
> (struct drm_color_ctm *)crtc_state->ctm->data;
> uint64_t input[9] = { 0, };
>
> - if (intel_crtc->config->limited_color_range) {
> + if (intel_crtc_state->limited_color_range) {
> ctm_mult_by_limited(input, ctm->matrix);
> } else {
> for (i = 0; i < ARRAY_SIZE(input); i++)
> @@ -158,7 +159,7 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
> * into consideration.
> */
> for (i = 0; i < 3; i++) {
> - if (intel_crtc->config->limited_color_range)
> + if (intel_crtc_state->limited_color_range)
> coeffs[i * 3 + i] =
> I9XX_CSC_COEFF_LIMITED_RANGE;
> else
> @@ -182,7 +183,7 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
> if (INTEL_INFO(dev)->gen > 6) {
> uint16_t postoff = 0;
>
> - if (intel_crtc->config->limited_color_range)
> + if (intel_crtc_state->limited_color_range)
> postoff = (16 * (1 << 12) / 255) & 0x1fff;
>
> I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
> @@ -193,7 +194,7 @@ static void i9xx_load_csc_matrix(struct drm_crtc_state *crtc_state)
> } else {
> uint32_t mode = CSC_MODE_YUV_TO_RGB;
>
> - if (intel_crtc->config->limited_color_range)
> + if (intel_crtc_state->limited_color_range)
> mode |= CSC_BLACK_SCREEN_OFFSET;
>
> I915_WRITE(PIPE_CSC_MODE(pipe), mode);
> @@ -263,7 +264,8 @@ void intel_color_set_csc(struct drm_crtc_state *crtc_state)
>
> /* Loads the legacy palette/gamma unit for the CRTC. */
> static void i9xx_load_luts_internal(struct drm_crtc *crtc,
> - struct drm_property_blob *blob)
> + struct drm_property_blob *blob,
> + struct intel_crtc_state *crtc_state)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -272,7 +274,7 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
> int i;
>
> if (HAS_GMCH_DISPLAY(dev)) {
> - if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI))
> + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> assert_dsi_pll_enabled(dev_priv);
> else
> assert_pll_enabled(dev_priv, pipe);
> @@ -305,7 +307,8 @@ static void i9xx_load_luts_internal(struct drm_crtc *crtc,
>
> static void i9xx_load_luts(struct drm_crtc_state *crtc_state)
> {
> - i9xx_load_luts_internal(crtc_state->crtc, crtc_state->gamma_lut);
> + i9xx_load_luts_internal(crtc_state->crtc, crtc_state->gamma_lut,
> + to_intel_crtc_state(crtc_state));
> }
>
> /* Loads the legacy palette/gamma unit for the CRTC on Haswell. */
> @@ -323,7 +326,7 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
> * Workaround : Do not read or write the pipe palette/gamma data while
> * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
> */
> - if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
> + if (IS_HASWELL(dev) && intel_crtc_state->ips_enabled &&
> (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> hsw_disable_ips(intel_crtc);
> reenable_ips = true;
> @@ -436,7 +439,8 @@ static void cherryview_load_luts(struct drm_crtc_state *state)
> /* Turn off degamma/gamma on CGM block. */
> I915_WRITE(CGM_PIPE_MODE(pipe),
> (state->ctm ? CGM_PIPE_MODE_CSC : 0));
> - i9xx_load_luts_internal(crtc, state->gamma_lut);
> + i9xx_load_luts_internal(crtc, state->gamma_lut,
> + to_intel_crtc_state(state));
> return;
> }
>
> @@ -479,7 +483,7 @@ static void cherryview_load_luts(struct drm_crtc_state *state)
> * Also program a linear LUT in the legacy block (behind the
> * CGM block).
> */
> - i9xx_load_luts_internal(crtc, NULL);
> + i9xx_load_luts_internal(crtc, NULL, to_intel_crtc_state(state));
> }
>
> void intel_color_load_luts(struct drm_crtc_state *crtc_state)
> --
> 2.7.4
>
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> Intel-gfx@lists.freedesktop.org
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--
Daniel Vetter
Software Engineer, Intel Corporation