From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 3/3] drm/i915: don't rewrite the GTT on resume Date: Mon, 15 Oct 2012 09:37:00 +0100 Message-ID: References: <1350267038-3599-1-git-send-email-jbarnes@virtuousgeek.org> <1350267038-3599-3-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 558B59E78F for ; Mon, 15 Oct 2012 01:37:17 -0700 (PDT) In-Reply-To: <1350267038-3599-3-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sun, 14 Oct 2012 19:10:38 -0700, Jesse Barnes wrote: > The BIOS shouldn't be touching this memory across suspend/resume, so > just leave it alone. This saves us ~50ms on resume on my T420. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_drv.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 824e3c8..95e2b8b 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -119,6 +119,10 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600); > MODULE_PARM_DESC(i915_enable_ppgtt, > "Enable PPGTT (default: true)"); > > +int i915_needs_gtt_restore __read_mostly = 0; > +module_param_named(gtt_restore, i915_needs_gtt_restore, int, 0600); > +MODULE_PARM_DESC(gtt_restore, "Rewrite GTT on resume (default: false)"); Wrong way around. This code exists purely because KMS resume was broken on a number of machines without reinitialising the GTT, ergo this is a regression. -Chris -- Chris Wilson, Intel Open Source Technology Centre