From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [bisected] commit 176f28eb breaks my Sandybridge Date: Thu, 04 Nov 2010 23:41:45 +0000 Message-ID: References: <87k4kspu7i.fsf@yoom.home.cworth.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 377EA9E759 for ; Thu, 4 Nov 2010 16:41:48 -0700 (PDT) In-Reply-To: <87k4kspu7i.fsf@yoom.home.cworth.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Carl Worth , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 04 Nov 2010 16:03:45 -0700, Carl Worth wrote: > The commit below causes my Sandybridge system to fail at initial KMS > initialization: > > Aug 27 18:58:04 livid kernel: [ 9.099032] i915 0000:00:02.0: irq 42 for MSI/M > SI-X > Aug 27 18:58:04 livid kernel: [ 9.099086] [drm:init_ring_common] *ERROR* render ring initialization failed ctl 00000000 head 00000000 tail 00000000 start 00000000 > > Chris, what can I do to help debug what the correct solution is here? Find a hw engineer, and ask him nicely why his ringbuffer registers return 0 *most* of the time. You can comment out the check as we have a workaround in place (auto-reporting of the HEAD) and under certain circumstances /sys/kernel/debug/dri/0/i915_*ringbuffer_info do report the correct values. I haven't worked out when they do report the correct values, it appears to be only when the rings themselves are busy (but not always). Having the error there was to make sure people noticed and I could find out just how many SNB revisions failed. I presume you have a rev 8? -Chris -- Chris Wilson, Intel Open Source Technology Centre