From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: make DP training try a little harder Date: Thu, 06 Jan 2011 12:18:46 +0000 Message-ID: References: <1294267524-24062-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 01C9C9E75A for ; Thu, 6 Jan 2011 04:18:51 -0800 (PST) In-Reply-To: <1294267524-24062-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, 5 Jan 2011 14:45:24 -0800, Jesse Barnes wrote: > When trying to do channel equalization, we need to make sure we still > have clock recovery on all lanes while training. We also need to try > clock recovery again if we lose the clock or if channel eq fails 5 > times. We'll try clock recovery up to 5 more times before giving up > entirely. > > Gets suspend/resume working on my Vaio again and brings us back into > compliance with the DP training sequence spec. Applied to the pending -fixes. Will now push to -staging. -Chris -- Chris Wilson, Intel Open Source Technology Centre