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From: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: fix relaxed tiling on gen2 v2
Date: Sat, 26 Mar 2011 20:44:09 +0000	[thread overview]
Message-ID: <b9dded$ieku11@orsmga002.jf.intel.com> (raw)
In-Reply-To: <1301169315-12498-1-git-send-email-daniel.vetter@ffwll.ch>

On Sat, 26 Mar 2011 20:55:15 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows.

Nice patch, marries the code to the documentation (afaict). Should split
it into its two distinct fixes though. Both -next material, perhaps. And
thankfully explains the 2*8 fixup we needed for userspace, but note it is
also wrong for Y-tiling on gen2.

So, afaics, there is no way with the current interface the kernel can stop
userspace from shooting itself in the foot.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

      reply	other threads:[~2011-03-26 20:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-25  9:36 [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row Chris Wilson
2011-03-25 12:16 ` Chris Wilson
2011-03-26  8:52   ` Chris Wilson
2011-03-26  9:20     ` Daniel Vetter
2011-03-26  9:43       ` Chris Wilson
2011-03-26 14:22         ` [PATCH] drm/i915: fix relaxed tiling on gen2 Daniel Vetter
2011-03-26 18:23           ` Chris Wilson
2011-03-26 19:55             ` [PATCH] drm/i915: fix relaxed tiling on gen2 v2 Daniel Vetter
2011-03-26 20:44               ` Chris Wilson [this message]

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