From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: fix relaxed tiling on gen2 v2 Date: Sat, 26 Mar 2011 20:44:09 +0000 Message-ID: References: <1bdc18$k0pvil@fmsmga002.fm.intel.com> <1301169315-12498-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 5C08C9E77C for ; Sat, 26 Mar 2011 13:44:16 -0700 (PDT) In-Reply-To: <1301169315-12498-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sat, 26 Mar 2011 20:55:15 +0100, Daniel Vetter wrote: > A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Nice patch, marries the code to the documentation (afaict). Should split it into its two distinct fixes though. Both -next material, perhaps. And thankfully explains the 2*8 fixup we needed for userspace, but note it is also wrong for Y-tiling on gen2. So, afaics, there is no way with the current interface the kernel can stop userspace from shooting itself in the foot. -Chris -- Chris Wilson, Intel Open Source Technology Centre