From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com
Subject: Re: [PATCH] drm/i915: Don't WARN on BDW when PCH is propperly identified.
Date: 21 Jan 2015 17:24:07 -0800 [thread overview]
Message-ID: <bf3aaa$jg886t@fmsmga001.fm.intel.com> (raw)
In-Reply-To: <1421698435-13617-1-git-send-email-rodrigo.vivi@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5607
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 353/353 353/353
ILK 353/353 353/353
SNB 400/422 400/422
IVB 487/487 487/487
BYT 296/296 296/296
HSW +21 487/508 508/508
BDW 401/402 401/402
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
HSW igt_kms_cursor_crc_cursor-size-change NSPT(1, M19)TIMEOUT(1, M40)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_kms_fence_pin_leak NSPT(1, M19)DMESG_WARN(1, M40)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(1, M19)TIMEOUT(1, M40)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(1, M19)TIMEOUT(1, M40)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_lpsp_non-edp NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_cursor NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_cursor-dpms NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_dpms-mode-unset-non-lpsp NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_dpms-non-lpsp NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_drm-resources-equal NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_fences NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_fences-dpms NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_gem-execbuf NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_gem-mmap-cpu NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_gem-mmap-gtt NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_gem-pread NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_i2c NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_modeset-non-lpsp NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_modeset-non-lpsp-stress-no-wait NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_pci-d3-state NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
HSW igt_pm_rpm_rte NSPT(1, M19)PASS(8, M20M19M40) PASS(1, M40)
Note: You need to pay more attention to line start with '*'
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prev parent reply other threads:[~2015-01-22 1:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-19 20:13 [PATCH] drm/i915: Don't WARN on BDW when PCH is propperly identified Rodrigo Vivi
2015-01-20 8:51 ` Jani Nikula
2015-01-20 18:17 ` Rodrigo Vivi
2015-01-22 1:24 ` shuang.he [this message]
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