From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH 8/8] drm/i915/skl: gen6+ platforms support runtime PM
Date: 02 May 2015 01:20:12 -0700 [thread overview]
Message-ID: <c45ac1$gqv8o8@orsmga003.jf.intel.com> (raw)
In-Reply-To: <1430408363-20905-9-git-send-email-damien.lespiau@intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6301
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 302/302 302/302
SNB 316/316 316/316
IVB 264/264 264/264
BYT -3 227/227 224/227
BDW 318/318 318/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt@gem_dummy_reloc_loop@render FAIL(1)PASS(18) TIMEOUT(1)PASS(1)
BYT igt@gem_pipe_control_store_loop@fresh-buffer FAIL(1)TIMEOUT(10)PASS(9) TIMEOUT(1)PASS(1)
*BYT igt@gem_pwrite_pread@uncached-copy-performance FAIL(1)PASS(2) DMESG_FAIL(1)PASS(1)
(dmesg patch applied)drm:i915_context_is_banned[i915]]*ERROR*gpu_hanging_too_fast,banning@gpu hanging too
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-05-02 8:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-30 15:39 [PATCH 0/8] SKL suspend/resume Damien Lespiau
2015-04-30 15:39 ` [PATCH 1/8] drm/i915/skl: Add the INIT power domain to the MISC I/O power well Damien Lespiau
2015-05-05 18:54 ` Ville Syrjälä
2015-04-30 15:39 ` [PATCH 2/8] drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines Damien Lespiau
2015-04-30 15:39 ` [PATCH 3/8] drm/i915: Re-order the PCU opcodes Damien Lespiau
2015-04-30 15:39 ` [PATCH 4/8] drm/i915: Merge the GEN9 memory latency PCU opcode with its friends Damien Lespiau
2015-05-05 18:54 ` Ville Syrjälä
2015-04-30 15:39 ` [PATCH 5/8] drm/i915/skl: Make the Misc I/O power well part of the PLLS domain Damien Lespiau
2015-05-05 18:55 ` Ville Syrjälä
2015-04-30 15:39 ` [PATCH 6/8] drm/i915/skl: Deinit/init the display at suspend/resume Damien Lespiau
2015-05-05 18:56 ` Ville Syrjälä
2015-05-06 11:10 ` Ville Syrjälä
2015-05-06 10:52 ` Daniel Vetter
2015-04-30 15:39 ` [PATCH 7/8] drm/i915/skl: Change CDCLK behind PCU's back Damien Lespiau
2015-05-06 10:53 ` Daniel Vetter
2015-05-06 10:58 ` Damien Lespiau
2015-04-30 15:39 ` [PATCH 8/8] drm/i915/skl: gen6+ platforms support runtime PM Damien Lespiau
2015-05-02 8:20 ` shuang.he [this message]
2015-05-05 18:56 ` Ville Syrjälä
2015-05-06 10:54 ` Daniel Vetter
2015-05-06 10:55 ` Damien Lespiau
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