From: shuang.he@intel.com
To: shuang.he@intel.com, lei.a.liu@intel.com,
intel-gfx@lists.freedesktop.org, arun.siluvery@linux.intel.com
Subject: Re: [PATCH v2 7/7] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround
Date: 31 May 2015 13:47:32 -0700 [thread overview]
Message-ID: <c45ac1$h8pj27@orsmga003.jf.intel.com> (raw)
In-Reply-To: <1432922605-5893-8-git-send-email-arun.siluvery@linux.intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6506
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 303/303 303/303
SNB -1 315/315 314/315
IVB 343/343 343/343
BYT 287/287 287/287
BDW -1 320/320 319/320
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*SNB igt@pm_rpm@dpms-mode-unset-non-lpsp PASS(1) DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
*BDW igt@gem_flink_race@flink_name PASS(1) DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_display.c:#assert_plane[i915]()@WARNING:.* at .* assert_plane
assertion_failure@assertion failure
WARNING:at_drivers/gpu/drm/drm_irq.c:#drm_wait_one_vblank[drm]()@WARNING:.* at .* drm_wait_one_vblank+0x
Note: You need to pay more attention to line start with '*'
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prev parent reply other threads:[~2015-05-31 20:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 18:03 [PATCH v2 0/7] Add Per-context WA using WA batch buffers Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 1/7] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-05-29 18:16 ` Chris Wilson
2015-06-01 10:01 ` Siluvery, Arun
2015-06-01 10:07 ` Chris Wilson
2015-06-01 10:22 ` Daniel, Thomas
2015-06-02 18:36 ` Siluvery, Arun
2015-06-02 18:47 ` Dave Gordon
2015-06-04 14:30 ` Siluvery, Arun
2015-06-15 10:41 ` Daniel Vetter
2015-06-15 14:14 ` Siluvery, Arun
2015-06-15 10:40 ` Daniel Vetter
2015-05-29 18:03 ` [PATCH v2 2/7] drm/i915/gen8: Re-order init pipe_control in lrc mode Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 3/7] drm/i915/gen8: Enable WA batch buffers during ctx save/restore Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 4/7] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 5/7] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 6/7] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-05-29 18:03 ` [PATCH v2 7/7] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-05-31 20:47 ` shuang.he [this message]
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