From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 3/3] drm/i915: Force sync command ordering Date: Tue, 11 Oct 2011 20:42:44 +0100 Message-ID: References: <1318357916-12661-1-git-send-email-ben@bwidawsk.net> <1318357916-12661-4-git-send-email-ben@bwidawsk.net> <4E949677.9000600@whitecape.org> <20111011123036.5ddb5802@bwidawsk.net> <20111011123305.2eb736da@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CA069E745 for ; Tue, 11 Oct 2011 12:42:47 -0700 (PDT) In-Reply-To: <20111011123305.2eb736da@bwidawsk.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Ben Widawsky Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, 11 Oct 2011 12:33:05 -0700, Ben Widawsky wrote: > On Tue, 11 Oct 2011 12:30:36 -0700 > Ben Widawsky wrote: > > > On Tue, 11 Oct 2011 12:18:15 -0700 > > Kenneth Graunke wrote: > > > > > > I might only enable this on Gen7 for now, unless it actually fixes > > > something on Sandybridge. It's not listed as required for Gen6. > > > > I would prefer to keep for gen6 for two reasons: > > 1 - paranoia > > 2 - user space is going to be toggling a bit which it doesn't mean to > > toggle and that has a who knows what impact on gen6. > > > > Ben > > I'm an idiot. Disregard this comment. Was thinking of the other hunk. > Just 1 reason then, paranoia? Any takers? Does PIPE_CONTROL qualify as a 3D state packet? If so without that bit set, there is no barrier between writing to a register and attempting to make use of it within the batch. Sounds like justifiable paranoia to me. -Chris -- Chris Wilson, Intel Open Source Technology Centre