From: Nirmoy Das <nirmoy.das@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Nirmoy Das" <nirmoy.das@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
"Michał Winiarski" <michal.winiarski@intel.com>
Subject: Re: [PATCH v3 05/16] drm/i915: Disable the "binder"
Date: Fri, 19 Jan 2024 11:47:42 +0100 [thread overview]
Message-ID: <cdbdeae2-041c-43ef-8cba-d57546b50e88@linux.intel.com> (raw)
In-Reply-To: <ZamwS6sLlEdJRv59@intel.com>
[-- Attachment #1: Type: text/plain, Size: 3083 bytes --]
On 1/19/2024 12:12 AM, Ville Syrjälä wrote:
> On Wed, Jan 17, 2024 at 06:46:24PM +0100, Nirmoy Das wrote:
>> On 1/17/2024 3:13 PM, Michał Winiarski wrote:
>>> On Tue, Jan 16, 2024 at 09:56:25AM +0200, Ville Syrjala wrote:
>>>> From: Ville Syrjälä<ville.syrjala@linux.intel.com>
>>>>
>>>> Now that the GGTT PTE updates go straight to GSMBASE (bypassing
>>>> GTTMMADR) there should be no more risk of system hangs? So the
>>>> "binder" (ie. update the PTEs via MI_UPDATE_GTT) is no longer
>>>> necessary, disable it.
>>>>
>>>> My main worry with the MI_UPDATE_GTT are:
>>>> - only used on this one platform so very limited testing coverage
>>>> - async so more opprtunities to screw things up
>>>> - what happens if the engine hangs while we're waiting for MI_UPDATE_GTT
>>>> to finish?
>>>> - requires working command submission, so even getting a working
>>>> display now depends on a lot more extra components working correctly
>>>>
>>>> TODO: MI_UPDATE_GTT might be interesting as an optimization
>>>> though, so perhaps someone should look into always using it
>>>> (assuming the GPU is alive and well)?
>>>>
>>>> v2: Keep using MI_UPDATE_GTT on VM guests
>>>>
>>>> Cc: Paz Zcharya<pazz@chromium.org>
>>>> Cc: Nirmoy Das<nirmoy.das@intel.com>
>>>> Signed-off-by: Ville Syrjälä<ville.syrjala@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++-
>>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
>>>> index 86f73fe558ca..e83dabc56a14 100644
>>>> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
>>>> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
>>>> @@ -24,7 +24,8 @@
>>>> bool i915_ggtt_require_binder(struct drm_i915_private *i915)
>>>> {
>>>> /* Wa_13010847436 & Wa_14019519902 */
>>>> - return MEDIA_VER_FULL(i915) == IP_VER(13, 0);
>>>> + return i915_run_as_guest() &&
>>>> + MEDIA_VER_FULL(i915) == IP_VER(13, 0);
>>> Note that i915_run_as_guest() is not the most reliable way to decide
>>> whether to use MI_UPDATE_GTT or straight to GSMBASE, as it requires the
>>> hypervisor to "opt-in" and set the X86_FEATURE_HYPERVISOR.
>>> If it's not set - the driver will go into GSMBASE, which is not mapped
>>> inside the guest.
>>> Does the system firmware advertise whether GSMBASE is "open" or "closed"
>>> to CPU access in any way?
>> Had a chat with David from IVE team, David suggested to read 0x138914 to
>> determine that. "GOP needs to qualify the WA by reading GFX MMIO offset
>> 0x138914 and verify the value there is 0x1." -> as per the HSD-22018444074
> OK, so we can confirm the firmware is on board. I suppose no real harm
> in doing so even though it would clearly be a rather weird if someone
> would ship some ancient firmware that doesn't handle this.
>
> But that still won't help with the guest side handling because that
> register will read the same in the guest.
We are back to the same question :/ How about
if (boot_cpu_has(X86_FEATURE_HYPERVISOR) && !i915_run_as_guest()
disable binder
Regards,
Nirmoy
>
[-- Attachment #2: Type: text/html, Size: 4503 bytes --]
next prev parent reply other threads:[~2024-01-19 10:47 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-16 7:56 [PATCH v3 00/16] drm/i915: (stolen) memory region related fixes Ville Syrjala
2024-01-16 7:56 ` [PATCH v3 01/16] drm/i915: Use struct resource for memory region IO as well Ville Syrjala
2024-01-16 10:23 ` Nirmoy Das
2024-01-30 23:15 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 02/16] drm/i915: Print memory region info during probe Ville Syrjala
2024-01-16 10:20 ` Nirmoy Das
2024-01-30 23:16 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 03/16] drm/i915: Remove ad-hoc lmem/stolen debugs Ville Syrjala
2024-01-16 10:23 ` Nirmoy Das
2024-01-30 23:17 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 04/16] drm/i915: Bypass LMEMBAR/GTTMMADR for MTL stolen memory access Ville Syrjala
2024-01-16 10:31 ` Nirmoy Das
2024-01-25 10:27 ` [PATCH v4 " Ville Syrjala
2024-01-30 23:19 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 05/16] drm/i915: Disable the "binder" Ville Syrjala
2024-01-16 10:32 ` Nirmoy Das
2024-01-17 14:13 ` Michał Winiarski
2024-01-17 17:46 ` Nirmoy Das
2024-01-18 23:12 ` Ville Syrjälä
2024-01-19 10:47 ` Nirmoy Das [this message]
2024-01-19 10:49 ` Nirmoy Das
2024-01-25 9:08 ` Ville Syrjälä
2024-01-25 14:59 ` Michał Winiarski
2024-01-31 11:33 ` Ville Syrjälä
2024-01-25 10:27 ` [PATCH v4 " Ville Syrjala
2024-01-30 23:20 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 06/16] drm/i915: Rename the DSM/GSM registers Ville Syrjala
2024-01-16 10:45 ` Nirmoy Das
2024-01-25 10:28 ` [PATCH v4 " Ville Syrjala
2024-01-30 23:20 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 07/16] drm/i915: Fix PTE decode during initial plane readout Ville Syrjala
2024-01-16 10:46 ` Nirmoy Das
2024-01-30 23:21 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 08/16] drm/i915: Fix region start " Ville Syrjala
2024-01-22 15:07 ` Shankar, Uma
2024-01-30 23:21 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 09/16] drm/i915: Fix MTL " Ville Syrjala
2024-01-22 15:09 ` Shankar, Uma
2024-01-30 23:22 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 10/16] drm/i915: s/phys_base/dma_addr/ Ville Syrjala
2024-01-30 23:22 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 11/16] drm/i915: Split the smem and lmem plane readout apart Ville Syrjala
2024-01-30 23:23 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 12/16] drm/i915: Simplify intel_initial_plane_config() calling convention Ville Syrjala
2024-01-28 4:18 ` kernel test robot
2024-01-30 23:24 ` Paz Zcharya
2024-02-02 15:14 ` Jani Nikula
2024-02-02 16:12 ` Ville Syrjälä
2024-02-02 16:15 ` Jani Nikula
2024-02-02 23:58 ` kernel test robot
2024-01-16 7:56 ` [PATCH v3 13/16] drm/i915/fbdev: Fix smem_start for LMEMBAR stolen objects Ville Syrjala
2024-01-30 23:25 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 14/16] drm/i915: Tweak BIOS fb reuse check Ville Syrjala
2024-01-30 23:26 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 15/16] drm/i915: Try to relocate the BIOS fb to the start of ggtt Ville Syrjala
2024-01-30 23:27 ` Paz Zcharya
2024-01-16 7:56 ` [PATCH v3 16/16] drm/i915: Annotate more of the BIOS fb takeover failure paths Ville Syrjala
2024-01-22 15:12 ` Shankar, Uma
2024-01-30 23:27 ` Paz Zcharya
2024-01-16 9:02 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: (stolen) memory region related fixes (rev6) Patchwork
2024-01-16 9:02 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-01-16 9:21 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-01-17 16:23 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: (stolen) memory region related fixes (rev7) Patchwork
2024-01-17 16:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-01-17 16:40 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-01-25 12:00 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: (stolen) memory region related fixes (rev10) Patchwork
2024-01-25 12:00 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-01-25 12:02 ` ✓ Fi.CI.BAT: success " Patchwork
2024-01-25 14:39 ` ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cdbdeae2-041c-43ef-8cba-d57546b50e88@linux.intel.com \
--to=nirmoy.das@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michal.winiarski@intel.com \
--cc=nirmoy.das@intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).