From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, yogesh.mohan.marimuthu@intel.com
Subject: [PATCH 00/14] drm/i915: Baytrail MIPI DSI support
Date: Tue, 13 Aug 2013 16:29:39 +0300 [thread overview]
Message-ID: <cover.1376397804.git.jani.nikula@intel.com> (raw)
Hi all -
This series adds rudimentary MIPI DSI support to Baytrail. It's been
built around the idea of panel specific sub-encoders, similar to the DVO
support we have. This work is by no means complete; there are plenty of
rough edges, but it should be a somewhat sane start to build upon.
I'm aware of the Common Display Framework and drm_bridge patches. In the
future, I expect our DSI support to be ported over to whatever
eventually comes out of them. In the mean time, we can't wait for them
to be completed, and I believe it would be helpful for that effort to
have our bits and pieces upstream.
The last patch is provided as an (incomplete) example of a sub-encoder,
or a panel driver. It should *not* be merged. There's no proper
detection or VBT handling yet, so that will cause warnings about
inconsistent crtc/pll states...
BR,
Jani.
Jani Nikula (9):
drm/i915: add more VLV IOSF sideband ports accessors
drm/i915: add VLV pipeconf bit definition for DSI PLL lock
drm/i915: add MIPI DSI register definitions
drm/i915: add MIPI DSI output type and subtypes
drm/i915: add structs for MIPI DSI output
drm/i915: add MIPI DSI command sending routines
drm/i915: add basic MIPI DSI output support
drm/i915: don't enable DPLL for DSI
drm/i915: initialize DSI output on VLV
Shobhit Kumar (4):
drm: add MIPI DSI encoder and connector types
drm/i915: Band Gap WA
drm/i915: Parse the MIPI related VBT Block and store relevant info
drm/i915: add AUO MIPI DSI display sub-encoder
ymohanma (1):
drm/i915: add VLV DSI PLL Calculations
drivers/gpu/drm/drm_crtc.c | 2 +
drivers/gpu/drm/i915/Makefile | 4 +
drivers/gpu/drm/i915/auo_dsi_display.c | 182 ++++++++++
drivers/gpu/drm/i915/i915_drv.h | 13 +
drivers/gpu/drm/i915/i915_reg.h | 424 ++++++++++++++++++++++
drivers/gpu/drm/i915/intel_bios.c | 16 +
drivers/gpu/drm/i915/intel_bios.h | 41 +++
drivers/gpu/drm/i915/intel_display.c | 52 ++-
drivers/gpu/drm/i915/intel_drv.h | 7 +-
drivers/gpu/drm/i915/intel_dsi.c | 606 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dsi.h | 104 ++++++
drivers/gpu/drm/i915/intel_dsi_cmd.c | 442 +++++++++++++++++++++++
drivers/gpu/drm/i915/intel_dsi_cmd.h | 109 ++++++
drivers/gpu/drm/i915/intel_dsi_pll.c | 290 +++++++++++++++
drivers/gpu/drm/i915/intel_sideband.c | 56 +++
include/uapi/drm/drm_mode.h | 2 +
16 files changed, 2330 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/i915/auo_dsi_display.c
create mode 100644 drivers/gpu/drm/i915/intel_dsi.c
create mode 100644 drivers/gpu/drm/i915/intel_dsi.h
create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.c
create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.h
create mode 100644 drivers/gpu/drm/i915/intel_dsi_pll.c
--
1.7.9.5
next reply other threads:[~2013-08-13 13:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-13 13:29 Jani Nikula [this message]
2013-08-13 13:29 ` [PATCH 01/14] drm: add MIPI DSI encoder and connector types Jani Nikula
2013-08-13 13:29 ` [PATCH 02/14] drm/i915: add more VLV IOSF sideband ports accessors Jani Nikula
2013-08-13 13:29 ` [PATCH 03/14] drm/i915: add VLV pipeconf bit definition for DSI PLL lock Jani Nikula
2013-08-13 13:29 ` [PATCH 04/14] drm/i915: add MIPI DSI register definitions Jani Nikula
2013-08-14 13:59 ` Ville Syrjälä
2013-08-15 8:02 ` Jani Nikula
2013-08-15 13:38 ` Damien Lespiau
2013-08-15 14:08 ` Daniel Vetter
2013-08-13 13:29 ` [PATCH 05/14] drm/i915: add MIPI DSI output type and subtypes Jani Nikula
2013-08-13 13:29 ` [PATCH 06/14] drm/i915: add structs for MIPI DSI output Jani Nikula
2013-08-13 13:29 ` [PATCH 07/14] drm/i915: add MIPI DSI command sending routines Jani Nikula
2013-08-13 13:29 ` [PATCH 08/14] drm/i915: add basic MIPI DSI output support Jani Nikula
2013-08-13 22:17 ` Daniel Vetter
2013-08-13 13:29 ` [PATCH 09/14] drm/i915: add VLV DSI PLL Calculations Jani Nikula
2013-08-13 13:29 ` [PATCH 10/14] drm/i915: don't enable DPLL for DSI Jani Nikula
2013-08-13 13:29 ` [PATCH 11/14] drm/i915: Band Gap WA Jani Nikula
2013-08-13 13:29 ` [PATCH 12/14] drm/i915: Parse the MIPI related VBT Block and store relevant info Jani Nikula
2013-08-13 13:29 ` [PATCH 13/14] drm/i915: initialize DSI output on VLV Jani Nikula
2013-08-13 13:29 ` [PATCH 14/14] drm/i915: add AUO MIPI DSI display sub-encoder Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cover.1376397804.git.jani.nikula@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=yogesh.mohan.marimuthu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox