From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: [PATCH 00/14] drm/i915: Baytrail MIPI DSI support Date: Tue, 13 Aug 2013 16:29:39 +0300 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 54B04E5F31 for ; Tue, 13 Aug 2013 06:28:01 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, yogesh.mohan.marimuthu@intel.com List-Id: intel-gfx@lists.freedesktop.org Hi all - This series adds rudimentary MIPI DSI support to Baytrail. It's been built around the idea of panel specific sub-encoders, similar to the DVO support we have. This work is by no means complete; there are plenty of rough edges, but it should be a somewhat sane start to build upon. I'm aware of the Common Display Framework and drm_bridge patches. In the future, I expect our DSI support to be ported over to whatever eventually comes out of them. In the mean time, we can't wait for them to be completed, and I believe it would be helpful for that effort to have our bits and pieces upstream. The last patch is provided as an (incomplete) example of a sub-encoder, or a panel driver. It should *not* be merged. There's no proper detection or VBT handling yet, so that will cause warnings about inconsistent crtc/pll states... BR, Jani. Jani Nikula (9): drm/i915: add more VLV IOSF sideband ports accessors drm/i915: add VLV pipeconf bit definition for DSI PLL lock drm/i915: add MIPI DSI register definitions drm/i915: add MIPI DSI output type and subtypes drm/i915: add structs for MIPI DSI output drm/i915: add MIPI DSI command sending routines drm/i915: add basic MIPI DSI output support drm/i915: don't enable DPLL for DSI drm/i915: initialize DSI output on VLV Shobhit Kumar (4): drm: add MIPI DSI encoder and connector types drm/i915: Band Gap WA drm/i915: Parse the MIPI related VBT Block and store relevant info drm/i915: add AUO MIPI DSI display sub-encoder ymohanma (1): drm/i915: add VLV DSI PLL Calculations drivers/gpu/drm/drm_crtc.c | 2 + drivers/gpu/drm/i915/Makefile | 4 + drivers/gpu/drm/i915/auo_dsi_display.c | 182 ++++++++++ drivers/gpu/drm/i915/i915_drv.h | 13 + drivers/gpu/drm/i915/i915_reg.h | 424 ++++++++++++++++++++++ drivers/gpu/drm/i915/intel_bios.c | 16 + drivers/gpu/drm/i915/intel_bios.h | 41 +++ drivers/gpu/drm/i915/intel_display.c | 52 ++- drivers/gpu/drm/i915/intel_drv.h | 7 +- drivers/gpu/drm/i915/intel_dsi.c | 606 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsi.h | 104 ++++++ drivers/gpu/drm/i915/intel_dsi_cmd.c | 442 +++++++++++++++++++++++ drivers/gpu/drm/i915/intel_dsi_cmd.h | 109 ++++++ drivers/gpu/drm/i915/intel_dsi_pll.c | 290 +++++++++++++++ drivers/gpu/drm/i915/intel_sideband.c | 56 +++ include/uapi/drm/drm_mode.h | 2 + 16 files changed, 2330 insertions(+), 20 deletions(-) create mode 100644 drivers/gpu/drm/i915/auo_dsi_display.c create mode 100644 drivers/gpu/drm/i915/intel_dsi.c create mode 100644 drivers/gpu/drm/i915/intel_dsi.h create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.c create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.h create mode 100644 drivers/gpu/drm/i915/intel_dsi_pll.c -- 1.7.9.5