* [PATCH 1/5] drm: Add new DCS commands in the enum list
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
@ 2016-03-29 15:01 ` Jani Nikula
2016-03-29 15:01 ` [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT Jani Nikula
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2016-03-29 15:01 UTC (permalink / raw)
To: intel-gfx, Deepak M; +Cc: jani.nikula
From: Deepak M <m.deepak@intel.com>
Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.
v2: Sorted the Macro`s by value (Andrzej)
v3 by Jani: sort all of enum, refer to MIPI DCS 1.3
Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
include/video/mipi_display.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
index ddcc8ca7316b..19aa65a35546 100644
--- a/include/video/mipi_display.h
+++ b/include/video/mipi_display.h
@@ -115,6 +115,14 @@ enum {
MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
MIPI_DCS_GET_SCANLINE = 0x45,
+ MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CONTROL_DISPLAY = 0x54, /* MIPI DCS 1.3 */
+ MIPI_DCS_WRITE_POWER_SAVE = 0x55, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_POWER_SAVE = 0x56, /* MIPI DCS 1.3 */
+ MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */
+ MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /* MIPI DCS 1.3 */
MIPI_DCS_READ_DDB_START = 0xA1,
MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
};
--
2.1.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
2016-03-29 15:01 ` [PATCH 1/5] drm: Add new DCS commands in the enum list Jani Nikula
@ 2016-03-29 15:01 ` Jani Nikula
2016-03-29 15:01 ` [PATCH 3/5] drm/i915: Parse LFP brightness control field " Jani Nikula
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2016-03-29 15:01 UTC (permalink / raw)
To: intel-gfx, Deepak M; +Cc: jani.nikula
From: Deepak M <m.deepak@intel.com>
For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.
v2: Moving the comment to intel_dsi.h(Jani)
v3: Renaming the field names (Jani)
v4 by Jani: make this patch only about VBT
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
drivers/gpu/drm/i915/intel_bios.h | 8 +++++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 9c406b0f4173..6985519921b4 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -746,6 +746,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
return;
}
+ /*
+ * These fields are introduced from the VBT version 197 onwards,
+ * so making sure that these bits are set zero in the previous
+ * versions.
+ */
+ if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+ dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
+ dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
+ }
+
/* We have mandatory mipi config blocks. Initialize as generic panel */
dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
}
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index ab0ea315eddb..149c3226e895 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -113,7 +113,13 @@ struct mipi_config {
u16 dual_link:2;
u16 lane_cnt:2;
u16 pixel_overlap:3;
- u16 rsvd3:9;
+ u16 rgb_flip:1;
+#define DL_DCS_PORT_A 0x00
+#define DL_DCS_PORT_C 0x01
+#define DL_DCS_PORT_A_AND_C 0x02
+ u16 dl_dcs_cabc_ports:2;
+ u16 dl_dcs_backlight_ports:2;
+ u16 rsvd3:4;
u16 rsvd4;
--
2.1.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
2016-03-29 15:01 ` [PATCH 1/5] drm: Add new DCS commands in the enum list Jani Nikula
2016-03-29 15:01 ` [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT Jani Nikula
@ 2016-03-29 15:01 ` Jani Nikula
2016-03-29 15:45 ` Deepak, M
2016-03-29 15:01 ` [PATCH 4/5] drm/i915: Add DCS control for Panel PWM Jani Nikula
` (2 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2016-03-29 15:01 UTC (permalink / raw)
To: intel-gfx, Deepak M; +Cc: jani.nikula
From: Deepak M <m.deepak@intel.com>
These fields in VBT indicates the PWM source which
is used and also the controller number.
v2 by Jani: check for out of bounds access, some renames, change default
type, etc.
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
drivers/gpu/drm/i915/intel_bios.h | 8 ++++++++
drivers/gpu/drm/i915/intel_vbt_defs.h | 6 ++++++
4 files changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0906dfd7b1a9..4a76b7b2dbd9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1472,6 +1472,7 @@ struct intel_vbt_data {
bool present;
bool active_low_pwm;
u8 min_brightness; /* min_brightness/255 of max */
+ enum intel_backlight_type type;
} backlight;
/* MIPI DSI */
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 6985519921b4..2f639820aded 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -304,6 +304,15 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
return;
}
+ dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
+ if (bdb->version >= 191 &&
+ get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
+ const struct bdb_lfp_backlight_control_method *method;
+
+ method = &backlight_data->backlight_control[panel_type];
+ dev_priv->vbt.backlight.type = method->type;
+ }
+
dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 149c3226e895..df6ce3e3d26f 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -30,6 +30,14 @@
#ifndef _INTEL_BIOS_H_
#define _INTEL_BIOS_H_
+enum intel_backlight_type {
+ INTEL_BACKLIGHT_PMIC,
+ INTEL_BACKLIGHT_LPSS,
+ INTEL_BACKLIGHT_DISPLAY_DDI,
+ INTEL_BACKLIGHT_CABC,
+ INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
+};
+
struct edp_power_seq {
u16 t1_t3;
u16 t8;
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 749dceab7c02..2191076c3ff6 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -440,10 +440,16 @@ struct bdb_lfp_backlight_data_entry {
u8 obsolete3;
} __packed;
+struct bdb_lfp_backlight_control_method {
+ u8 type:4;
+ u8 controller:4;
+} __packed;
+
struct bdb_lfp_backlight_data {
u8 entry_size;
struct bdb_lfp_backlight_data_entry data[16];
u8 level[16];
+ struct bdb_lfp_backlight_control_method backlight_control[16];
} __packed;
struct aimdb_header {
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
2016-03-29 15:01 ` [PATCH 3/5] drm/i915: Parse LFP brightness control field " Jani Nikula
@ 2016-03-29 15:45 ` Deepak, M
2016-03-30 13:45 ` Jani Nikula
0 siblings, 1 reply; 9+ messages in thread
From: Deepak, M @ 2016-03-29 15:45 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Nikula, Jani
> Sent: Tuesday, March 29, 2016 8:31 PM
> To: intel-gfx@lists.freedesktop.org; Deepak, M <m.deepak@intel.com>
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
>
> From: Deepak M <m.deepak@intel.com>
>
> These fields in VBT indicates the PWM source which is used and also the
> controller number.
>
> v2 by Jani: check for out of bounds access, some renames, change default
> type, etc.
>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
> drivers/gpu/drm/i915/intel_bios.h | 8 ++++++++
> drivers/gpu/drm/i915/intel_vbt_defs.h | 6 ++++++
> 4 files changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 0906dfd7b1a9..4a76b7b2dbd9
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1472,6 +1472,7 @@ struct intel_vbt_data {
> bool present;
> bool active_low_pwm;
> u8 min_brightness; /* min_brightness/255 of max */
> + enum intel_backlight_type type;
> } backlight;
>
> /* MIPI DSI */
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 6985519921b4..2f639820aded 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -304,6 +304,15 @@ parse_lfp_backlight(struct drm_i915_private
> *dev_priv,
> return;
> }
>
> + dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
> + if (bdb->version >= 191 &&
> + get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
> + const struct bdb_lfp_backlight_control_method *method;
> +
> + method = &backlight_data->backlight_control[panel_type];
> + dev_priv->vbt.backlight.type = method->type;
> + }
> +
> dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
> dev_priv->vbt.backlight.active_low_pwm = entry-
> >active_low_pwm;
> dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
> diff --git a/drivers/gpu/drm/i915/intel_bios.h
> b/drivers/gpu/drm/i915/intel_bios.h
> index 149c3226e895..df6ce3e3d26f 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -30,6 +30,14 @@
> #ifndef _INTEL_BIOS_H_
> #define _INTEL_BIOS_H_
>
> +enum intel_backlight_type {
> + INTEL_BACKLIGHT_PMIC,
> + INTEL_BACKLIGHT_LPSS,
> + INTEL_BACKLIGHT_DISPLAY_DDI,
> + INTEL_BACKLIGHT_CABC,
[Deepak, M] Better to rename CABC to PANEL_PWM, because CABC is not the source of the PWM. There may be some panel which have the panel PWM but may not support CABC.
> + INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
> +};
> +
> struct edp_power_seq {
> u16 t1_t3;
> u16 t8;
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h
> b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 749dceab7c02..2191076c3ff6 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -440,10 +440,16 @@ struct bdb_lfp_backlight_data_entry {
> u8 obsolete3;
> } __packed;
>
> +struct bdb_lfp_backlight_control_method {
> + u8 type:4;
> + u8 controller:4;
> +} __packed;
> +
> struct bdb_lfp_backlight_data {
> u8 entry_size;
> struct bdb_lfp_backlight_data_entry data[16];
> u8 level[16];
> + struct bdb_lfp_backlight_control_method backlight_control[16];
> } __packed;
>
> struct aimdb_header {
> --
> 2.1.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
2016-03-29 15:45 ` Deepak, M
@ 2016-03-30 13:45 ` Jani Nikula
0 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2016-03-30 13:45 UTC (permalink / raw)
To: Deepak, M, intel-gfx@lists.freedesktop.org
On Tue, 29 Mar 2016, "Deepak, M" <m.deepak@intel.com> wrote:
>> -----Original Message-----
>> From: Nikula, Jani
>> Sent: Tuesday, March 29, 2016 8:31 PM
>> To: intel-gfx@lists.freedesktop.org; Deepak, M <m.deepak@intel.com>
>> Cc: Nikula, Jani <jani.nikula@intel.com>
>> Subject: [PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT
>>
>> From: Deepak M <m.deepak@intel.com>
>>
>> These fields in VBT indicates the PWM source which is used and also the
>> controller number.
>>
>> v2 by Jani: check for out of bounds access, some renames, change default
>> type, etc.
>>
>> Signed-off-by: Deepak M <m.deepak@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_drv.h | 1 +
>> drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++
>> drivers/gpu/drm/i915/intel_bios.h | 8 ++++++++
>> drivers/gpu/drm/i915/intel_vbt_defs.h | 6 ++++++
>> 4 files changed, 24 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>> b/drivers/gpu/drm/i915/i915_drv.h index 0906dfd7b1a9..4a76b7b2dbd9
>> 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1472,6 +1472,7 @@ struct intel_vbt_data {
>> bool present;
>> bool active_low_pwm;
>> u8 min_brightness; /* min_brightness/255 of max */
>> + enum intel_backlight_type type;
>> } backlight;
>>
>> /* MIPI DSI */
>> diff --git a/drivers/gpu/drm/i915/intel_bios.c
>> b/drivers/gpu/drm/i915/intel_bios.c
>> index 6985519921b4..2f639820aded 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/intel_bios.c
>> @@ -304,6 +304,15 @@ parse_lfp_backlight(struct drm_i915_private
>> *dev_priv,
>> return;
>> }
>>
>> + dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
>> + if (bdb->version >= 191 &&
>> + get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
>> + const struct bdb_lfp_backlight_control_method *method;
>> +
>> + method = &backlight_data->backlight_control[panel_type];
>> + dev_priv->vbt.backlight.type = method->type;
>> + }
>> +
>> dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
>> dev_priv->vbt.backlight.active_low_pwm = entry-
>> >active_low_pwm;
>> dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
>> diff --git a/drivers/gpu/drm/i915/intel_bios.h
>> b/drivers/gpu/drm/i915/intel_bios.h
>> index 149c3226e895..df6ce3e3d26f 100644
>> --- a/drivers/gpu/drm/i915/intel_bios.h
>> +++ b/drivers/gpu/drm/i915/intel_bios.h
>> @@ -30,6 +30,14 @@
>> #ifndef _INTEL_BIOS_H_
>> #define _INTEL_BIOS_H_
>>
>> +enum intel_backlight_type {
>> + INTEL_BACKLIGHT_PMIC,
>> + INTEL_BACKLIGHT_LPSS,
>> + INTEL_BACKLIGHT_DISPLAY_DDI,
>> + INTEL_BACKLIGHT_CABC,
> [Deepak, M] Better to rename CABC to PANEL_PWM, because CABC is not
> the source of the PWM. There may be some panel which have the panel
> PWM but may not support CABC.
How about INTEL_BACKLIGHT_DSI_DCS?
The panel need not have PWM. Really, the panel need not have backlight
either for panel brightness control (see OLED), but in this case I'd
just conflate that into "backlight" as well.
BR,
Jani.
>> + INTEL_BACKLIGHT_PANEL_DRIVER_INTERFACE,
>> +};
>> +
>> struct edp_power_seq {
>> u16 t1_t3;
>> u16 t8;
>> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h
>> b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> index 749dceab7c02..2191076c3ff6 100644
>> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
>> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
>> @@ -440,10 +440,16 @@ struct bdb_lfp_backlight_data_entry {
>> u8 obsolete3;
>> } __packed;
>>
>> +struct bdb_lfp_backlight_control_method {
>> + u8 type:4;
>> + u8 controller:4;
>> +} __packed;
>> +
>> struct bdb_lfp_backlight_data {
>> u8 entry_size;
>> struct bdb_lfp_backlight_data_entry data[16];
>> u8 level[16];
>> + struct bdb_lfp_backlight_control_method backlight_control[16];
>> } __packed;
>>
>> struct aimdb_header {
>> --
>> 2.1.4
>
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/5] drm/i915: Add DCS control for Panel PWM
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
` (2 preceding siblings ...)
2016-03-29 15:01 ` [PATCH 3/5] drm/i915: Parse LFP brightness control field " Jani Nikula
@ 2016-03-29 15:01 ` Jani Nikula
2016-03-29 15:01 ` [PATCH 5/5] CABC support for Panel PWM backlight control Jani Nikula
2016-03-29 16:05 ` ✗ Fi.CI.BAT: failure for drm/i915: dsi dcs & cabc " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2016-03-29 15:01 UTC (permalink / raw)
To: intel-gfx, Deepak M; +Cc: jani.nikula
From: Deepak M <m.deepak@intel.com>
If the source of the backlight PWM is from the
panel then the PWM can be controlled by DCS
command, this patch adds the support to
enable/disbale panel PWM, control backlight level
etc...
v2: Moving the CABC bkl functions to new file.(Jani)
v3: Rebase
v4: Rebase
v5: Use mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani)
Move DCS macro`s to include/video/mipi_display.h (Jani)
v6: Rename the file to intel_dsi_panel_pwm.c
Removing the CABC operations
v7 by Jani: renames, rebases, etc.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/intel_drv.h | 2 +
drivers/gpu/drm/i915/intel_dsi.c | 19 ++-
drivers/gpu/drm/i915/intel_dsi.h | 3 +
drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c | 157 +++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_panel.c | 4 +
6 files changed, 184 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7ffb51b0cbc2..3f6a3cfa6524 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -83,6 +83,7 @@ i915-y += dvo_ch7017.o \
intel_dp_mst.o \
intel_dp.o \
intel_dsi.o \
+ intel_dsi_dcs_backlight.o \
intel_dsi_panel_vbt.o \
intel_dsi_pll.o \
intel_dvo.o \
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c87b4503435d..17593d069819 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1325,6 +1325,8 @@ void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
/* intel_dsi.c */
void intel_dsi_init(struct drm_device *dev);
+/* intel_dsi_dcs_backlight.c */
+int intel_dsi_dcs_backlight_init_funcs(struct intel_connector *intel_connector);
/* intel_dvo.c */
void intel_dvo_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 0de74e1b7ab3..9326e9dcbe50 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1220,10 +1220,25 @@ void intel_dsi_init(struct drm_device *dev)
else
intel_encoder->crtc_mask = BIT(PIPE_B);
- if (dev_priv->vbt.dsi.config->dual_link)
+ if (dev_priv->vbt.dsi.config->dual_link) {
intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
- else
+
+ switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
+ case DL_DCS_PORT_A:
+ intel_dsi->dcs_backlight_ports = BIT(PORT_A);
+ break;
+ case DL_DCS_PORT_C:
+ intel_dsi->dcs_backlight_ports = BIT(PORT_C);
+ break;
+ default:
+ case DL_DCS_PORT_A_AND_C:
+ intel_dsi->dcs_backlight_ports = BIT(PORT_A) | BIT(PORT_C);
+ break;
+ }
+ } else {
intel_dsi->ports = BIT(port);
+ intel_dsi->dcs_backlight_ports = BIT(port);
+ }
/* Create a DSI host (and a device) for each port. */
for_each_dsi_port(port, intel_dsi->ports) {
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index ec58ead9ccd1..efb07f45316f 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -78,6 +78,9 @@ struct intel_dsi {
u8 escape_clk_div;
u8 dual_link;
+
+ u16 dcs_backlight_ports;
+
u8 pixel_overlap;
u32 port_bits;
u32 bw_timer;
diff --git a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
new file mode 100644
index 000000000000..b41efa5cc315
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Deepak M <m.deepak at intel.com>
+ */
+
+#include "intel_drv.h"
+#include "intel_dsi.h"
+#include "i915_drv.h"
+#include <video/mipi_display.h>
+#include <drm/drm_mipi_dsi.h>
+
+#define CONTROL_DISPLAY_BCTRL (1 << 5)
+#define CONTROL_DISPLAY_DD (1 << 3)
+#define CONTROL_DISPLAY_BL (1 << 2)
+
+#define PANEL_PWM_MAX_VALUE 0xFF
+
+static u32 dcs_get_backlight(struct intel_connector *connector)
+{
+ struct intel_encoder *encoder = connector->encoder;
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ struct mipi_dsi_device *dsi_device;
+ u8 data;
+ enum port port;
+
+ /* FIXME: Need to take care of 16 bit brightness level */
+ for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) {
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+ mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
+ &data, sizeof(data));
+ break;
+ }
+
+ return data;
+}
+
+static void dcs_set_backlight(struct intel_connector *connector, u32 level)
+{
+ struct intel_encoder *encoder = connector->encoder;
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ struct mipi_dsi_device *dsi_device;
+ u8 data = level;
+ enum port port;
+
+ /* FIXME: Need to take care of 16 bit brightness level */
+ for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) {
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+ mipi_dsi_dcs_write(dsi_device, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+ &data, sizeof(data));
+ }
+}
+
+static void dcs_disable_backlight(struct intel_connector *connector)
+{
+ struct intel_encoder *encoder = connector->encoder;
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ struct mipi_dsi_device *dsi_device;
+ enum port port;
+
+ dcs_set_backlight(connector, 0);
+
+ for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) {
+ u8 ctrl = 0;
+
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+
+ mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_CONTROL_DISPLAY,
+ &ctrl, sizeof(ctrl));
+
+ ctrl &= ~CONTROL_DISPLAY_BL;
+ ctrl &= ~CONTROL_DISPLAY_DD;
+ ctrl &= ~CONTROL_DISPLAY_BCTRL;
+
+ mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+ &ctrl, sizeof(ctrl));
+ }
+}
+
+static void dcs_enable_backlight(struct intel_connector *connector)
+{
+ struct intel_encoder *encoder = connector->encoder;
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ struct intel_panel *panel = &connector->panel;
+ struct mipi_dsi_device *dsi_device;
+ enum port port;
+
+ for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) {
+ u8 ctrl = 0;
+
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+
+ mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_CONTROL_DISPLAY,
+ &ctrl, sizeof(ctrl));
+
+ ctrl |= CONTROL_DISPLAY_BL;
+ ctrl |= CONTROL_DISPLAY_DD;
+ ctrl |= CONTROL_DISPLAY_BCTRL;
+
+ mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+ &ctrl, sizeof(ctrl));
+ }
+
+ dcs_set_backlight(connector, panel->backlight.level);
+}
+
+static int dcs_setup_backlight(struct intel_connector *connector,
+ enum pipe unused)
+{
+ struct intel_panel *panel = &connector->panel;
+
+ panel->backlight.max = PANEL_PWM_MAX_VALUE;
+ panel->backlight.level = PANEL_PWM_MAX_VALUE;
+
+ return 0;
+}
+
+int intel_dsi_dcs_backlight_init_funcs(struct intel_connector *intel_connector)
+{
+ struct drm_device *dev = intel_connector->base.dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_encoder *encoder = intel_connector->encoder;
+ struct intel_panel *panel = &intel_connector->panel;
+
+ if (dev_priv->vbt.backlight.type != INTEL_BACKLIGHT_CABC)
+ return -ENODEV;
+
+ if (WARN_ON(encoder->type != INTEL_OUTPUT_DSI))
+ return -EINVAL;
+
+ panel->backlight.setup = dcs_setup_backlight;
+ panel->backlight.enable = dcs_enable_backlight;
+ panel->backlight.disable = dcs_disable_backlight;
+ panel->backlight.set = dcs_set_backlight;
+ panel->backlight.get = dcs_get_backlight;
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 8c8996fcbaf5..f0533b273611 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
container_of(panel, struct intel_connector, panel);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
+ intel_dsi_dcs_backlight_init_funcs(connector) == 0)
+ return;
+
if (IS_BROXTON(dev_priv)) {
panel->backlight.setup = bxt_setup_backlight;
panel->backlight.enable = bxt_enable_backlight;
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/5] CABC support for Panel PWM backlight control
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
` (3 preceding siblings ...)
2016-03-29 15:01 ` [PATCH 4/5] drm/i915: Add DCS control for Panel PWM Jani Nikula
@ 2016-03-29 15:01 ` Jani Nikula
2016-03-29 16:05 ` ✗ Fi.CI.BAT: failure for drm/i915: dsi dcs & cabc " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2016-03-29 15:01 UTC (permalink / raw)
To: intel-gfx, Deepak M; +Cc: jani.nikula
From: Deepak M <m.deepak@intel.com>
In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.
The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion here assumes that the
panels use standard SW register for control.
CABC is supported only when the PWM source for backlight is
from the panel.
v2 by Jani: rebase, renames, check cabc support earlier, etc.
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_dsi.c | 17 +++++++++++++++++
drivers/gpu/drm/i915/intel_dsi.h | 1 +
drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c | 22 ++++++++++++++++++++++
3 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 9326e9dcbe50..dc9c30ae9651 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1235,11 +1235,28 @@ void intel_dsi_init(struct drm_device *dev)
intel_dsi->dcs_backlight_ports = BIT(PORT_A) | BIT(PORT_C);
break;
}
+
+ switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
+ case DL_DCS_PORT_A:
+ intel_dsi->dcs_cabc_ports = BIT(PORT_A);
+ break;
+ case DL_DCS_PORT_C:
+ intel_dsi->dcs_cabc_ports = BIT(PORT_C);
+ break;
+ default:
+ case DL_DCS_PORT_A_AND_C:
+ intel_dsi->dcs_cabc_ports = BIT(PORT_A) | BIT(PORT_C);
+ break;
+ }
} else {
intel_dsi->ports = BIT(port);
intel_dsi->dcs_backlight_ports = BIT(port);
+ intel_dsi->dcs_cabc_ports = BIT(port);
}
+ if (!dev_priv->vbt.dsi.config->cabc_supported)
+ intel_dsi->dcs_cabc_ports = 0;
+
/* Create a DSI host (and a device) for each port. */
for_each_dsi_port(port, intel_dsi->ports) {
struct intel_dsi_host *host;
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index efb07f45316f..6d84de30f289 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -80,6 +80,7 @@ struct intel_dsi {
u8 dual_link;
u16 dcs_backlight_ports;
+ u16 dcs_cabc_ports;
u8 pixel_overlap;
u32 port_bits;
diff --git a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
index b41efa5cc315..850e1690f47c 100644
--- a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
+++ b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
@@ -33,6 +33,12 @@
#define CONTROL_DISPLAY_DD (1 << 3)
#define CONTROL_DISPLAY_BL (1 << 2)
+#define POWER_SAVE_OFF (0 << 0)
+#define POWER_SAVE_LOW (1 << 0)
+#define POWER_SAVE_MEDIUM (2 << 0)
+#define POWER_SAVE_HIGH (3 << 0)
+#define POWER_SAVE_OUTDOOR_MODE (4 << 0)
+
#define PANEL_PWM_MAX_VALUE 0xFF
static u32 dcs_get_backlight(struct intel_connector *connector)
@@ -79,6 +85,14 @@ static void dcs_disable_backlight(struct intel_connector *connector)
dcs_set_backlight(connector, 0);
+ for_each_dsi_port(port, intel_dsi->dcs_cabc_ports) {
+ u8 cabc = POWER_SAVE_OFF;
+
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+ mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE,
+ &cabc, sizeof(cabc));
+ }
+
for_each_dsi_port(port, intel_dsi->dcs_backlight_ports) {
u8 ctrl = 0;
@@ -120,6 +134,14 @@ static void dcs_enable_backlight(struct intel_connector *connector)
&ctrl, sizeof(ctrl));
}
+ for_each_dsi_port(port, intel_dsi->dcs_cabc_ports) {
+ u8 cabc = POWER_SAVE_MEDIUM;
+
+ dsi_device = intel_dsi->dsi_hosts[port]->device;
+ mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE,
+ &cabc, sizeof(cabc));
+ }
+
dcs_set_backlight(connector, panel->backlight.level);
}
--
2.1.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915: dsi dcs & cabc backlight control
2016-03-29 15:01 [PATCH 0/5] drm/i915: dsi dcs & cabc backlight control Jani Nikula
` (4 preceding siblings ...)
2016-03-29 15:01 ` [PATCH 5/5] CABC support for Panel PWM backlight control Jani Nikula
@ 2016-03-29 16:05 ` Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2016-03-29 16:05 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: dsi dcs & cabc backlight control
URL : https://patchwork.freedesktop.org/series/4995/
State : failure
== Summary ==
Series 4995v1 drm/i915: dsi dcs & cabc backlight control
http://patchwork.freedesktop.org/api/1.0/series/4995/revisions/1/mbox/
Test drv_module_reload_basic:
dmesg-warn -> DMESG-FAIL (snb-x220t)
Test gem_ctx_switch:
Subgroup basic-default:
pass -> FAIL (bdw-ultra)
Test gem_exec_nop:
Subgroup basic:
fail -> PASS (snb-x220t)
pass -> FAIL (bdw-ultra)
Test gem_exec_suspend:
Subgroup basic-s4:
skip -> FAIL (bdw-ultra)
Test gem_exec_whisper:
Subgroup basic:
pass -> FAIL (bdw-ultra)
Test gem_mmap_gtt:
Subgroup basic-read-write-distinct:
incomplete -> PASS (snb-x220t)
Test gem_sync:
Subgroup basic-all:
fail -> PASS (snb-x220t)
pass -> FAIL (bdw-ultra)
Subgroup basic-blt:
pass -> FAIL (bdw-ultra)
Subgroup basic-bsd:
pass -> FAIL (bdw-ultra)
Subgroup basic-default:
pass -> FAIL (bdw-ultra)
Subgroup basic-render:
pass -> FAIL (bdw-ultra) UNSTABLE
Subgroup basic-vebox:
pass -> FAIL (bdw-ultra)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-c:
dmesg-fail -> SKIP (snb-x220t)
pass -> DMESG-WARN (bsw-nuc-2)
Test pm_rpm:
Subgroup basic-pci-d3-state:
pass -> DMESG-WARN (bsw-nuc-2)
Subgroup basic-rte:
dmesg-warn -> PASS (byt-nuc) UNSTABLE
Test prime_self_import:
Subgroup basic-with_fd_dup:
incomplete -> PASS (snb-x220t)
bdw-nuci7 total:195 pass:181 dwarn:1 dfail:0 fail:1 skip:12
bdw-ultra total:195 pass:162 dwarn:1 dfail:0 fail:12 skip:20
bsw-nuc-2 total:195 pass:154 dwarn:3 dfail:0 fail:1 skip:37
byt-nuc total:195 pass:158 dwarn:1 dfail:0 fail:1 skip:35
hsw-brixbox total:195 pass:171 dwarn:1 dfail:0 fail:1 skip:22
hsw-gt2 total:195 pass:176 dwarn:1 dfail:0 fail:1 skip:17
ilk-hp8440p total:195 pass:129 dwarn:1 dfail:0 fail:1 skip:64
ivb-t430s total:195 pass:168 dwarn:1 dfail:0 fail:1 skip:25
skl-i7k-2 total:195 pass:170 dwarn:1 dfail:0 fail:1 skip:23
skl-nuci5 total:195 pass:182 dwarn:1 dfail:0 fail:1 skip:11
snb-dellxps total:195 pass:159 dwarn:1 dfail:0 fail:1 skip:34
snb-x220t total:195 pass:159 dwarn:0 dfail:1 fail:2 skip:33
Results at /archive/results/CI_IGT_test/Patchwork_1735/
2702045fbd4188c1c26bd890bc43976fd10937ad drm-intel-nightly: 2016y-03m-29d-12h-21m-19s UTC integration manifest
b979121f83d794574fe1aa4d19d61797df079452 CABC support for Panel PWM backlight control
1c907f7a436342c7bb039e5e93f676af6960f7aa drm/i915: Add DCS control for Panel PWM
d39bc57a4f3b6f47fd634943d3e8c5ba547f4fad drm/i915: Parse LFP brightness control field in VBT
53f7df6b96d4e336ef1a1e00b065e71d438d2228 drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT
60f1c9e152a72576c4bac30161ab44e69dac1039 drm: Add new DCS commands in the enum list
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread