[PATCH v4 0/4] drm/i915/dsi: improved gpio element support for vlv/chv/bxt

[PATCH v4 0/4] drm/i915/dsi: improved gpio element support for vlv/chv/bxt

[Jani Nikula]

Series v4 after [1].

BR,
Jani.

[1] http://mid.gmane.org/cover.1459884518.git.jani.nikula@intel.com

Jani Nikula (4):
  drm/i915/dsi: don't pretend we support SC GPIOs
  drm/i915/dsi: add support for sequence block v3 gpio for VLV
  drm/i915/dsi: add support for gpio elements on CHV
  drm/i915/bxt: add bxt dsi gpio element support

 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 100 +++++++++++++++++++++++++++--
 1 file changed, 96 insertions(+), 4 deletions(-)

-- 
2.1.4

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[PATCH v4 1/4] drm/i915/dsi: don't pretend we support SC GPIOs

[Jani Nikula]

False ideas introduced in

commit 1d96a4a8ace6c1b08c7d203d9533b14e59f2200b
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Fri Mar 18 13:11:10 2016 +0200

    drm/i915/dsi: add support for DSI sequence block v2 gpio element

Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 9cfc62765f6e..9c7b98c58e85 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -209,7 +209,8 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 		if (gpio_source == 0) {
 			port = IOSF_PORT_GPIO_NC;
 		} else if (gpio_source == 1) {
-			port = IOSF_PORT_GPIO_SC;
+			DRM_DEBUG_KMS("SC gpio not supported\n");
+			return;
 		} else {
 			DRM_DEBUG_KMS("unknown gpio source %u\n", gpio_source);
 			return;
-- 
2.1.4

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Re: [PATCH v4 1/4] drm/i915/dsi: don't pretend we support SC GPIOs

[Jani Nikula]

On Thu, 07 Apr 2016, Jani Nikula <jani.nikula@intel.com> wrote:
> False ideas introduced in
>
> commit 1d96a4a8ace6c1b08c7d203d9533b14e59f2200b
> Author: Jani Nikula <jani.nikula@intel.com>
> Date:   Fri Mar 18 13:11:10 2016 +0200
>
>     drm/i915/dsi: add support for DSI sequence block v2 gpio element
>
> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed this one to dinq.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 9cfc62765f6e..9c7b98c58e85 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -209,7 +209,8 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
>  		if (gpio_source == 0) {
>  			port = IOSF_PORT_GPIO_NC;
>  		} else if (gpio_source == 1) {
> -			port = IOSF_PORT_GPIO_SC;
> +			DRM_DEBUG_KMS("SC gpio not supported\n");
> +			return;
>  		} else {
>  			DRM_DEBUG_KMS("unknown gpio source %u\n", gpio_source);
>  			return;

-- 
Jani Nikula, Intel Open Source Technology Center
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[PATCH v4 2/4] drm/i915/dsi: add support for sequence block v3 gpio for VLV

[Jani Nikula]

Only support NC GPIOs for now, and assume the vlv gpio table only has NC
GPIOs for now.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 9c7b98c58e85..448d57e0bebf 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -203,8 +203,8 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 	map = &vlv_gpio_table[gpio_index];
 
 	if (dev_priv->vbt.dsi.seq_version >= 3) {
-		DRM_DEBUG_KMS("GPIO element v3 not supported\n");
-		return;
+		/* FIXME: this assumes vlv_gpio_table only has NC GPIOs. */
+		port = IOSF_PORT_GPIO_NC;
 	} else {
 		if (gpio_source == 0) {
 			port = IOSF_PORT_GPIO_NC;
-- 
2.1.4

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[PATCH v4 3/4] drm/i915/dsi: add support for gpio elements on CHV

[Jani Nikula]

Add support for CHV gpio programming in DSI gpio elements.

v2: Overhaul macros according to Ville's review.

v3: Address Ville's review:
 - swap E and SE gpio ranges
 - add a note about max SE index
 - use GPO, not HIZ
 - swap cfg0 and cfg1

[Rewritten by Jani, based on earlier work by Yogesh and Deepak.]

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 65 ++++++++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 448d57e0bebf..b7772ff892e7 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -95,6 +95,24 @@ static struct gpio_map vlv_gpio_table[] = {
 	{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
 };
 
+#define CHV_GPIO_IDX_START_N		0
+#define CHV_GPIO_IDX_START_E		73
+#define CHV_GPIO_IDX_START_SW		100
+#define CHV_GPIO_IDX_START_SE		198
+
+#define CHV_VBT_MAX_PINS_PER_FMLY	15
+
+#define CHV_GPIO_PAD_CFG0(f, i)		(0x4400 + (f) * 0x400 + (i) * 8)
+#define  CHV_GPIO_GPIOEN		(1 << 15)
+#define  CHV_GPIO_GPIOCFG_GPIO		(0 << 8)
+#define  CHV_GPIO_GPIOCFG_GPO		(1 << 8)
+#define  CHV_GPIO_GPIOCFG_GPI		(2 << 8)
+#define  CHV_GPIO_GPIOCFG_HIZ		(3 << 8)
+#define  CHV_GPIO_GPIOTXSTATE(state)	((!!(state)) << 1)
+
+#define CHV_GPIO_PAD_CFG1(f, i)		(0x4400 + (f) * 0x400 + (i) * 8 + 4)
+#define  CHV_GPIO_CFGLOCK		(1 << 31)
+
 static inline enum port intel_dsi_seq_port_to_port(u8 port)
 {
 	return port ? PORT_C : PORT_A;
@@ -232,6 +250,51 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 	mutex_unlock(&dev_priv->sb_lock);
 }
 
+static void chv_exec_gpio(struct drm_i915_private *dev_priv,
+			  u8 gpio_source, u8 gpio_index, bool value)
+{
+	u16 cfg0, cfg1;
+	u16 family_num;
+	u8 port;
+
+	if (dev_priv->vbt.dsi.seq_version >= 3) {
+		if (gpio_index >= CHV_GPIO_IDX_START_SE) {
+			/* XXX: it's unclear whether 255->57 is part of SE. */
+			gpio_index -= CHV_GPIO_IDX_START_SE;
+			port = CHV_IOSF_PORT_GPIO_SE;
+		} else if (gpio_index >= CHV_GPIO_IDX_START_SW) {
+			gpio_index -= CHV_GPIO_IDX_START_SW;
+			port = CHV_IOSF_PORT_GPIO_SW;
+		} else if (gpio_index >= CHV_GPIO_IDX_START_E) {
+			gpio_index -= CHV_GPIO_IDX_START_E;
+			port = CHV_IOSF_PORT_GPIO_E;
+		} else {
+			port = CHV_IOSF_PORT_GPIO_N;
+		}
+	} else {
+		if (gpio_source == 0) {
+			port = IOSF_PORT_GPIO_NC;
+		} else if (gpio_source == 1) {
+			port = IOSF_PORT_GPIO_SC;
+		} else {
+			DRM_DEBUG_KMS("unknown gpio source %u\n", gpio_source);
+			return;
+		}
+	}
+
+	family_num = gpio_index / CHV_VBT_MAX_PINS_PER_FMLY;
+	gpio_index = gpio_index % CHV_VBT_MAX_PINS_PER_FMLY;
+
+	cfg0 = CHV_GPIO_PAD_CFG0(family_num, gpio_index);
+	cfg1 = CHV_GPIO_PAD_CFG1(family_num, gpio_index);
+
+	mutex_lock(&dev_priv->sb_lock);
+	vlv_iosf_sb_write(dev_priv, port, cfg1, 0);
+	vlv_iosf_sb_write(dev_priv, port, cfg0,
+			  CHV_GPIO_GPIOCFG_GPO | CHV_GPIO_GPIOTXSTATE(value));
+	mutex_unlock(&dev_priv->sb_lock);
+}
+
 static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
@@ -255,6 +318,8 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 
 	if (IS_VALLEYVIEW(dev_priv))
 		vlv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
+	else if (IS_CHERRYVIEW(dev_priv))
+		chv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
 	else
 		DRM_DEBUG_KMS("GPIO element not supported on this platform\n");
 
-- 
2.1.4

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Re: [PATCH v4 3/4] drm/i915/dsi: add support for gpio elements on CHV

[Ville Syrjälä]

On Thu, Apr 07, 2016 at 05:26:20PM +0300, Jani Nikula wrote:
> Add support for CHV gpio programming in DSI gpio elements.
> 
> v2: Overhaul macros according to Ville's review.
> 
> v3: Address Ville's review:
>  - swap E and SE gpio ranges
>  - add a note about max SE index
>  - use GPO, not HIZ
>  - swap cfg0 and cfg1
> 
> [Rewritten by Jani, based on earlier work by Yogesh and Deepak.]
> 
> Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 65 ++++++++++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> index 448d57e0bebf..b7772ff892e7 100644
> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
> @@ -95,6 +95,24 @@ static struct gpio_map vlv_gpio_table[] = {
>  	{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
>  };
>  
> +#define CHV_GPIO_IDX_START_N		0
> +#define CHV_GPIO_IDX_START_E		73
> +#define CHV_GPIO_IDX_START_SW		100
> +#define CHV_GPIO_IDX_START_SE		198
> +
> +#define CHV_VBT_MAX_PINS_PER_FMLY	15
> +
> +#define CHV_GPIO_PAD_CFG0(f, i)		(0x4400 + (f) * 0x400 + (i) * 8)
> +#define  CHV_GPIO_GPIOEN		(1 << 15)
> +#define  CHV_GPIO_GPIOCFG_GPIO		(0 << 8)
> +#define  CHV_GPIO_GPIOCFG_GPO		(1 << 8)
> +#define  CHV_GPIO_GPIOCFG_GPI		(2 << 8)
> +#define  CHV_GPIO_GPIOCFG_HIZ		(3 << 8)
> +#define  CHV_GPIO_GPIOTXSTATE(state)	((!!(state)) << 1)
> +
> +#define CHV_GPIO_PAD_CFG1(f, i)		(0x4400 + (f) * 0x400 + (i) * 8 + 4)
> +#define  CHV_GPIO_CFGLOCK		(1 << 31)
> +
>  static inline enum port intel_dsi_seq_port_to_port(u8 port)
>  {
>  	return port ? PORT_C : PORT_A;
> @@ -232,6 +250,51 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
>  	mutex_unlock(&dev_priv->sb_lock);
>  }
>  
> +static void chv_exec_gpio(struct drm_i915_private *dev_priv,
> +			  u8 gpio_source, u8 gpio_index, bool value)
> +{
> +	u16 cfg0, cfg1;
> +	u16 family_num;
> +	u8 port;
> +
> +	if (dev_priv->vbt.dsi.seq_version >= 3) {
> +		if (gpio_index >= CHV_GPIO_IDX_START_SE) {
> +			/* XXX: it's unclear whether 255->57 is part of SE. */
> +			gpio_index -= CHV_GPIO_IDX_START_SE;
> +			port = CHV_IOSF_PORT_GPIO_SE;
> +		} else if (gpio_index >= CHV_GPIO_IDX_START_SW) {
> +			gpio_index -= CHV_GPIO_IDX_START_SW;
> +			port = CHV_IOSF_PORT_GPIO_SW;
> +		} else if (gpio_index >= CHV_GPIO_IDX_START_E) {
> +			gpio_index -= CHV_GPIO_IDX_START_E;
> +			port = CHV_IOSF_PORT_GPIO_E;
> +		} else {
> +			port = CHV_IOSF_PORT_GPIO_N;
> +		}
> +	} else {
> +		if (gpio_source == 0) {
> +			port = IOSF_PORT_GPIO_NC;
> +		} else if (gpio_source == 1) {
> +			port = IOSF_PORT_GPIO_SC;
> +		} else {
> +			DRM_DEBUG_KMS("unknown gpio source %u\n", gpio_source);
> +			return;
> +		}

This part doesn't make sense since CHV doesn't have NC/SC.

Otherwise the patch looks fine.

> +	}
> +
> +	family_num = gpio_index / CHV_VBT_MAX_PINS_PER_FMLY;
> +	gpio_index = gpio_index % CHV_VBT_MAX_PINS_PER_FMLY;
> +
> +	cfg0 = CHV_GPIO_PAD_CFG0(family_num, gpio_index);
> +	cfg1 = CHV_GPIO_PAD_CFG1(family_num, gpio_index);
> +
> +	mutex_lock(&dev_priv->sb_lock);
> +	vlv_iosf_sb_write(dev_priv, port, cfg1, 0);
> +	vlv_iosf_sb_write(dev_priv, port, cfg0,
> +			  CHV_GPIO_GPIOCFG_GPO | CHV_GPIO_GPIOTXSTATE(value));
> +	mutex_unlock(&dev_priv->sb_lock);
> +}
> +
>  static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
>  {
>  	struct drm_device *dev = intel_dsi->base.base.dev;
> @@ -255,6 +318,8 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
>  
>  	if (IS_VALLEYVIEW(dev_priv))
>  		vlv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
> +	else if (IS_CHERRYVIEW(dev_priv))
> +		chv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
>  	else
>  		DRM_DEBUG_KMS("GPIO element not supported on this platform\n");
>  
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC
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[PATCH v4 4/4] drm/i915/bxt: add bxt dsi gpio element support

[Jani Nikula]

Request the GPIO by index through the consumer API. For now, use a quick
hack to store the already requested ones, simply because I have no idea
whether this actually works or not, and I have no way to test it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index b7772ff892e7..3ec8005ef84f 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -29,6 +29,7 @@
 #include <drm/drm_edid.h>
 #include <drm/i915_drm.h>
 #include <drm/drm_panel.h>
+#include <linux/gpio.h>
 #include <linux/slab.h>
 #include <video/mipi_display.h>
 #include <asm/intel-mid.h>
@@ -295,6 +296,31 @@ static void chv_exec_gpio(struct drm_i915_private *dev_priv,
 	mutex_unlock(&dev_priv->sb_lock);
 }
 
+static void bxt_exec_gpio(struct drm_i915_private *dev_priv,
+			  u8 gpio_source, u8 gpio_index, bool value)
+{
+	/* XXX: this table is a quick ugly hack. */
+	static struct gpio_desc *bxt_gpio_table[U8_MAX + 1];
+	struct gpio_desc *gpio_desc = bxt_gpio_table[gpio_index];
+
+	if (!gpio_desc) {
+		gpio_desc = devm_gpiod_get_index(dev_priv->dev->dev,
+						 NULL, gpio_index,
+						 value ? GPIOD_OUT_LOW :
+						 GPIOD_OUT_HIGH);
+
+		if (IS_ERR_OR_NULL(gpio_desc)) {
+			DRM_ERROR("GPIO index %u request failed (%ld)\n",
+				  gpio_index, PTR_ERR(gpio_desc));
+			return;
+		}
+
+		bxt_gpio_table[gpio_index] = gpio_desc;
+	}
+
+	gpiod_set_value(gpio_desc, value);
+}
+
 static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
@@ -321,7 +347,7 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 	else if (IS_CHERRYVIEW(dev_priv))
 		chv_exec_gpio(dev_priv, gpio_source, gpio_index, value);
 	else
-		DRM_DEBUG_KMS("GPIO element not supported on this platform\n");
+		bxt_exec_gpio(dev_priv, gpio_source, gpio_index, value);
 
 	return data;
 }
-- 
2.1.4

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Re: [PATCH v4 4/4] drm/i915/bxt: add bxt dsi gpio element support

[kbuild test robot]

[-- Attachment #1: Type: text/plain, Size: 2652 bytes --]

Hi Jani,

[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to v4.6-rc2 next-20160407]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Jani-Nikula/drm-i915-dsi-improved-gpio-element-support-for-vlv-chv-bxt/20160407-223107
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a0-04072115 (attached as .config)
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/gpu/drm/i915/intel_dsi_panel_vbt.c: In function 'bxt_exec_gpio':
>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:307:15: error: implicit declaration of function 'devm_gpiod_get_index' [-Werror=implicit-function-declaration]
      gpio_desc = devm_gpiod_get_index(dev_priv->dev->dev,
                  ^
>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:309:16: error: 'GPIOD_OUT_LOW' undeclared (first use in this function)
           value ? GPIOD_OUT_LOW :
                   ^
   drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:309:16: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:310:8: error: 'GPIOD_OUT_HIGH' undeclared (first use in this function)
           GPIOD_OUT_HIGH);
           ^
>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:321:2: error: implicit declaration of function 'gpiod_set_value' [-Werror=implicit-function-declaration]
     gpiod_set_value(gpio_desc, value);
     ^
   cc1: some warnings being treated as errors

vim +/devm_gpiod_get_index +307 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c

   301	{
   302		/* XXX: this table is a quick ugly hack. */
   303		static struct gpio_desc *bxt_gpio_table[U8_MAX + 1];
   304		struct gpio_desc *gpio_desc = bxt_gpio_table[gpio_index];
   305	
   306		if (!gpio_desc) {
 > 307			gpio_desc = devm_gpiod_get_index(dev_priv->dev->dev,
   308							 NULL, gpio_index,
 > 309							 value ? GPIOD_OUT_LOW :
 > 310							 GPIOD_OUT_HIGH);
   311	
   312			if (IS_ERR_OR_NULL(gpio_desc)) {
   313				DRM_ERROR("GPIO index %u request failed (%ld)\n",
   314					  gpio_index, PTR_ERR(gpio_desc));
   315				return;
   316			}
   317	
   318			bxt_gpio_table[gpio_index] = gpio_desc;
   319		}
   320	
 > 321		gpiod_set_value(gpio_desc, value);
   322	}
   323	
   324	static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)

---
0-DAY kernel test infrastructure                Open Source Technology Center
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Re: [PATCH v4 4/4] drm/i915/bxt: add bxt dsi gpio element support

[Jani Nikula]

On Thu, 07 Apr 2016, kbuild test robot <lkp@intel.com> wrote:
> Hi Jani,
>
> [auto build test ERROR on drm-intel/for-linux-next]
> [cannot apply to v4.6-rc2 next-20160407]
> [if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
>
> url:    https://github.com/0day-ci/linux/commits/Jani-Nikula/drm-i915-dsi-improved-gpio-element-support-for-vlv-chv-bxt/20160407-223107
> base:   git://anongit.freedesktop.org/drm-intel for-linux-next
> config: x86_64-randconfig-a0-04072115 (attached as .config)

Meh, including linux/gpio.h works for CONFIG_GPIOLIB=y, but it fails to
include the consumer function stubs for CONFIG_GPIOLIB=n. The fix is to
include linux/gpio/consumer.h instead.

BR,
Jani.


> reproduce:
>         # save the attached .config to linux build tree
>         make ARCH=x86_64 
>
> All errors (new ones prefixed by >>):
>
>    drivers/gpu/drm/i915/intel_dsi_panel_vbt.c: In function 'bxt_exec_gpio':
>>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:307:15: error: implicit declaration of function 'devm_gpiod_get_index' [-Werror=implicit-function-declaration]
>       gpio_desc = devm_gpiod_get_index(dev_priv->dev->dev,
>                   ^
>>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:309:16: error: 'GPIOD_OUT_LOW' undeclared (first use in this function)
>            value ? GPIOD_OUT_LOW :
>                    ^
>    drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:309:16: note: each undeclared identifier is reported only once for each function it appears in
>>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:310:8: error: 'GPIOD_OUT_HIGH' undeclared (first use in this function)
>            GPIOD_OUT_HIGH);
>            ^
>>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c:321:2: error: implicit declaration of function 'gpiod_set_value' [-Werror=implicit-function-declaration]
>      gpiod_set_value(gpio_desc, value);
>      ^
>    cc1: some warnings being treated as errors
>
> vim +/devm_gpiod_get_index +307 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>
>    301	{
>    302		/* XXX: this table is a quick ugly hack. */
>    303		static struct gpio_desc *bxt_gpio_table[U8_MAX + 1];
>    304		struct gpio_desc *gpio_desc = bxt_gpio_table[gpio_index];
>    305	
>    306		if (!gpio_desc) {
>  > 307			gpio_desc = devm_gpiod_get_index(dev_priv->dev->dev,
>    308							 NULL, gpio_index,
>  > 309							 value ? GPIOD_OUT_LOW :
>  > 310							 GPIOD_OUT_HIGH);
>    311	
>    312			if (IS_ERR_OR_NULL(gpio_desc)) {
>    313				DRM_ERROR("GPIO index %u request failed (%ld)\n",
>    314					  gpio_index, PTR_ERR(gpio_desc));
>    315				return;
>    316			}
>    317	
>    318			bxt_gpio_table[gpio_index] = gpio_desc;
>    319		}
>    320	
>  > 321		gpiod_set_value(gpio_desc, value);
>    322	}
>    323	
>    324	static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
>
> ---
> 0-DAY kernel test infrastructure                Open Source Technology Center
> https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

-- 
Jani Nikula, Intel Open Source Technology Center
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✗ Fi.CI.BAT: failure for drm/i915/dsi: improved gpio element support for vlv/chv/bxt (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: improved gpio element support for vlv/chv/bxt (rev4)
URL   : https://patchwork.freedesktop.org/series/4625/
State : failure

== Summary ==

Series 4625v4 drm/i915/dsi: improved gpio element support for vlv/chv/bxt
http://patchwork.freedesktop.org/api/1.0/series/4625/revisions/4/mbox/

Test drv_module_reload_basic:
                incomplete -> PASS       (bsw-nuc-2)
Test gem_basic:
        Subgroup bad-close:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup create-fd-close:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test gem_ctx_param_basic:
        Subgroup invalid-ctx-set:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup invalid-param-get:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup invalid-param-set:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test gem_exec_basic:
        Subgroup basic-blt:
                skip       -> PASS       (bsw-nuc-2)
        Subgroup gtt-bsd:
                skip       -> PASS       (bsw-nuc-2)
        Subgroup readonly-vebox:
                skip       -> PASS       (bsw-nuc-2)
Test gem_exec_nop:
        Subgroup basic:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_exec_store:
        Subgroup basic-bsd:
                skip       -> PASS       (bsw-nuc-2)
        Subgroup basic-default:
                skip       -> PASS       (bsw-nuc-2)
Test gem_exec_whisper:
        Subgroup basic:
                skip       -> PASS       (bsw-nuc-2)
Test gem_mmap:
        Subgroup basic-small-bo:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test gem_mmap_gtt:
        Subgroup basic-write-no-prefault:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test gem_ringfill:
        Subgroup basic-default-interruptible:
                pass       -> SKIP       (bsw-nuc-2)
Test gem_storedw_loop:
        Subgroup basic-render:
                pass       -> DMESG-FAIL (bsw-nuc-2)
Test gem_sync:
        Subgroup basic-each:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup basic-vebox:
                skip       -> PASS       (bsw-nuc-2)
Test gem_tiled_pread_basic:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test kms_addfb_basic:
        Subgroup addfb25-modifier-no-flag:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup addfb25-y-tiled:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup bad-pitch-256:
                pass       -> DMESG-WARN (bsw-nuc-2)
        Subgroup framebuffer-vs-set-tiling:
                dmesg-warn -> PASS       (bsw-nuc-2)
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                pass       -> INCOMPLETE (bsw-nuc-2)
        Subgroup basic-flip-vs-wf_vblank:
                dmesg-fail -> PASS       (bsw-nuc-2)
Test kms_force_connector_basic:
        Subgroup force-edid:
                skip       -> PASS       (ivb-t430s)
Test kms_pipe_crc_basic:
        Subgroup read-crc-pipe-a-frame-sequence:
                pass       -> SKIP       (hsw-brixbox)
        Subgroup read-crc-pipe-c-frame-sequence:
                dmesg-fail -> PASS       (bsw-nuc-2)
        Subgroup suspend-read-crc-pipe-a:
                pass       -> INCOMPLETE (hsw-gt2)
Test prime_self_import:
        Subgroup basic-with_fd_dup:
                dmesg-warn -> PASS       (bsw-nuc-2)
        Subgroup basic-with_one_bo_two_files:
                dmesg-warn -> PASS       (bsw-nuc-2)

bdw-nuci7        total:196  pass:184  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:196  pass:175  dwarn:0   dfail:0   fail:0   skip:21 
bsw-nuc-2        total:151  pass:91   dwarn:18  dfail:3   fail:0   skip:38 
byt-nuc          total:196  pass:161  dwarn:0   dfail:0   fail:0   skip:35 
hsw-brixbox      total:196  pass:173  dwarn:0   dfail:0   fail:0   skip:23 
hsw-gt2          total:160  pass:143  dwarn:0   dfail:0   fail:0   skip:16 
ilk-hp8440p      total:196  pass:132  dwarn:0   dfail:0   fail:0   skip:64 
ivb-t430s        total:196  pass:171  dwarn:0   dfail:0   fail:0   skip:25 
skl-i7k-2        total:196  pass:173  dwarn:0   dfail:0   fail:0   skip:23 
skl-nuci5        total:196  pass:185  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:196  pass:162  dwarn:0   dfail:0   fail:0   skip:34 

Results at /archive/results/CI_IGT_test/Patchwork_1832/

851708c7e97537ed618fadbe5d342eaf8fa5146d drm-intel-nightly: 2016y-04m-07d-13h-56m-00s UTC integration manifest
724ddf0b3e897e2d05c33e207f8ceec20d2fc880 drm/i915/bxt: add bxt dsi gpio element support
0b7e76df21573ad794667cc2824e7fc950339d75 drm/i915/dsi: add support for gpio elements on CHV
79d47a90c51cfa2ad60b286b2fd6bbd85e58b08c drm/i915/dsi: add support for sequence block v3 gpio for VLV
7bd175b196ce1026cc444fa22de0766dca7e79ed drm/i915/dsi: don't pretend we support SC GPIOs

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