From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, dhinakaran.pandiyan@intel.com
Subject: [PATCH v2 00/13] drm/i915/dp: link rate and lane count refactoring
Date: Fri, 3 Feb 2017 16:19:23 +0200 [thread overview]
Message-ID: <cover.1486131408.git.jani.nikula@intel.com> (raw)
v2 of [1], rebased and review addressed.
BR,
Jani.
[1] http://mid.mail-archive.com/cover.1485459621.git.jani.nikula@intel.com
Jani Nikula (13):
drm/i915/dp: use known correct array size in rate_to_index
drm/i915/dp: return errors from rate_to_index()
drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse
drm/i915/dp: cache source rates at init
drm/i915/dp: generate and cache sink rate array for all DP, not just
eDP 1.4
drm/i915/dp: use the sink rates array for max sink rates
drm/i915/dp: cache common rates with sink rates
drm/i915/dp: do not limit rate seek when not needed
drm/i915/dp: don't call the link parameters sink parameters
drm/i915/dp: add functions for max common link rate and lane count
drm/i915/mst: use max link not sink lane count
drm/i915/dp: localize link rate index variable more
drm/i915/dp: use readb and writeb calls for single byte DPCD access
drivers/gpu/drm/i915/intel_dp.c | 284 ++++++++++++++------------
drivers/gpu/drm/i915/intel_dp_link_training.c | 3 +-
drivers/gpu/drm/i915/intel_dp_mst.c | 4 +-
drivers/gpu/drm/i915/intel_drv.h | 20 +-
4 files changed, 173 insertions(+), 138 deletions(-)
--
2.1.4
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next reply other threads:[~2017-02-03 14:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-03 14:19 Jani Nikula [this message]
2017-02-03 14:19 ` [PATCH v2 01/13] drm/i915/dp: use known correct array size in rate_to_index Jani Nikula
2017-02-03 14:19 ` [PATCH v2 02/13] drm/i915/dp: return errors from rate_to_index() Jani Nikula
2017-02-03 14:19 ` [PATCH v2 03/13] drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse Jani Nikula
2017-02-03 14:19 ` [PATCH v2 04/13] drm/i915/dp: cache source rates at init Jani Nikula
2017-02-03 14:19 ` [PATCH v2 05/13] drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4 Jani Nikula
2017-02-03 17:16 ` Ville Syrjälä
2017-02-04 9:10 ` Jani Nikula
2017-02-03 14:19 ` [PATCH v2 06/13] drm/i915/dp: use the sink rates array for max sink rates Jani Nikula
2017-02-03 14:19 ` [PATCH v2 07/13] drm/i915/dp: cache common rates with " Jani Nikula
2017-02-03 14:19 ` [PATCH v2 08/13] drm/i915/dp: do not limit rate seek when not needed Jani Nikula
2017-02-03 14:19 ` [PATCH v2 09/13] drm/i915/dp: don't call the link parameters sink parameters Jani Nikula
2017-02-03 14:19 ` [PATCH v2 10/13] drm/i915/dp: add functions for max common link rate and lane count Jani Nikula
2017-02-03 14:19 ` [PATCH v2 11/13] drm/i915/mst: use max link not sink " Jani Nikula
2017-02-03 14:19 ` [PATCH v2 12/13] drm/i915/dp: localize link rate index variable more Jani Nikula
2017-02-07 20:17 ` Manasi Navare
2017-02-03 14:19 ` [PATCH v2 13/13] drm/i915/dp: use readb and writeb calls for single byte DPCD access Jani Nikula
2017-02-03 17:25 ` Ville Syrjälä
2017-02-03 16:56 ` ✗ Fi.CI.BAT: failure for drm/i915/dp: link rate and lane count refactoring (rev2) Patchwork
2017-02-07 20:15 ` [PATCH v2 00/13] drm/i915/dp: link rate and lane count refactoring Manasi Navare
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