[PATCH v3 00/15] drm/i915/display: platform identification with display->platform.<platform>

[PATCH v3 00/15] drm/i915/display: platform identification with display->platform.<platform>

[Jani Nikula]

v3 of https://lore.kernel.org/r/cover.1724092799.git.jani.nikula@intel.com

Rename display->is to display->platform. Make platform member names
lowercase. Add the concept of platform and subplatform groups to handle
g4x and hsw/bdw ult/ulx. Add more conversion patches at the end. Minor
tweaks here and there.

I've dropped the previous R-b's because there have been so many changes.

I like the end result better, and I feel more comfortable merging this.

BR,
Jani.


Jani Nikula (15):
  drm/i915/display: reindent subplatform initialization
  drm/i915/display: use a macro to initialize subplatforms
  drm/i915/display: use a macro to define platform enumerations
  drm/i915/display: join the platform and subplatform enums
  drm/i915/display: convert display platforms to lower case
  drm/i915/display: add display platforms structure with platform
    members
  drm/i915/display: add platform member to struct intel_display
  drm/i915/display: remove the display platform enum as unnecessary
  drm/i915/display: add platform group for g4x
  drm/i915/display: add subplatform group for HSW/BDW ULT
  drm/i915/bios: use display->platform.<platform> instead of
    IS_<PLATFORM>()
  drm/i915/pps: use display->platform.<platform> instead of
    IS_<PLATFORM>()
  drm/i915/tv: use display->platform.<platform> instead of
    IS_<PLATFORM>()
  drm/i915/vga: use display->platform.<platform> instead of
    IS_<PLATFORM>()
  drm/i915/vblank: use display->platform.<platform> instead of
    IS_<PLATFORM>()

 drivers/gpu/drm/i915/display/intel_bios.c     |  40 +--
 .../gpu/drm/i915/display/intel_display_core.h |   3 +
 .../drm/i915/display/intel_display_device.c   | 267 +++++++++++++-----
 .../drm/i915/display/intel_display_device.h   | 181 ++++++------
 drivers/gpu/drm/i915/display/intel_pps.c      |  47 ++-
 drivers/gpu/drm/i915/display/intel_tv.c       |  10 +-
 drivers/gpu/drm/i915/display/intel_vblank.c   |  11 +-
 drivers/gpu/drm/i915/display/intel_vga.c      |   4 +-
 8 files changed, 337 insertions(+), 226 deletions(-)

-- 
2.39.5

[PATCH v3 01/15] drm/i915/display: reindent subplatform initialization

[Jani Nikula]

Make the subplatform initialization less cramped, and follow the coding
style more closely. Initialize .pciidlist using designated initializers.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   | 116 +++++++++++++-----
 1 file changed, 88 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index f33062322c66..93c751fde1a9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -497,8 +497,14 @@ static const u16 hsw_ulx_ids[] = {
 static const struct platform_desc hsw_desc = {
 	PLATFORM(HASWELL),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_HASWELL_ULT, "ULT", hsw_ult_ids },
-		{ INTEL_DISPLAY_HASWELL_ULX, "ULX", hsw_ulx_ids },
+		{
+			INTEL_DISPLAY_HASWELL_ULT, "ULT",
+			.pciidlist = hsw_ult_ids,
+		},
+		{
+			INTEL_DISPLAY_HASWELL_ULX, "ULX",
+			.pciidlist = hsw_ulx_ids,
+		},
 		{},
 	},
 	.info = &(const struct intel_display_device_info) {
@@ -541,8 +547,14 @@ static const u16 bdw_ulx_ids[] = {
 static const struct platform_desc bdw_desc = {
 	PLATFORM(BROADWELL),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_BROADWELL_ULT, "ULT", bdw_ult_ids },
-		{ INTEL_DISPLAY_BROADWELL_ULX, "ULX", bdw_ulx_ids },
+		{
+			INTEL_DISPLAY_BROADWELL_ULT, "ULT",
+			.pciidlist = bdw_ult_ids,
+		},
+		{
+			INTEL_DISPLAY_BROADWELL_ULX, "ULX",
+			.pciidlist = bdw_ulx_ids,
+		},
 		{},
 	},
 	.info = &(const struct intel_display_device_info) {
@@ -632,8 +644,14 @@ static const enum intel_step skl_steppings[] = {
 static const struct platform_desc skl_desc = {
 	PLATFORM(SKYLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_SKYLAKE_ULT, "ULT", skl_ult_ids },
-		{ INTEL_DISPLAY_SKYLAKE_ULX, "ULX", skl_ulx_ids },
+		{
+			INTEL_DISPLAY_SKYLAKE_ULT, "ULT",
+			.pciidlist = skl_ult_ids,
+		},
+		{
+			INTEL_DISPLAY_SKYLAKE_ULX, "ULX",
+			.pciidlist = skl_ulx_ids,
+		},
 		{},
 	},
 	.info = &skl_display,
@@ -667,8 +685,14 @@ static const enum intel_step kbl_steppings[] = {
 static const struct platform_desc kbl_desc = {
 	PLATFORM(KABYLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_KABYLAKE_ULT, "ULT", kbl_ult_ids },
-		{ INTEL_DISPLAY_KABYLAKE_ULX, "ULX", kbl_ulx_ids },
+		{
+			INTEL_DISPLAY_KABYLAKE_ULT, "ULT",
+			.pciidlist = kbl_ult_ids,
+		},
+		{
+			INTEL_DISPLAY_KABYLAKE_ULX, "ULX",
+			.pciidlist = kbl_ulx_ids,
+		},
 		{},
 	},
 	.info = &skl_display,
@@ -692,8 +716,14 @@ static const u16 cfl_ulx_ids[] = {
 static const struct platform_desc cfl_desc = {
 	PLATFORM(COFFEELAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_COFFEELAKE_ULT, "ULT", cfl_ult_ids },
-		{ INTEL_DISPLAY_COFFEELAKE_ULX, "ULX", cfl_ulx_ids },
+		{
+			INTEL_DISPLAY_COFFEELAKE_ULT, "ULT",
+			.pciidlist = cfl_ult_ids,
+		},
+		{
+			INTEL_DISPLAY_COFFEELAKE_ULX, "ULX",
+			.pciidlist = cfl_ulx_ids,
+		},
 		{},
 	},
 	.info = &skl_display,
@@ -708,7 +738,10 @@ static const u16 cml_ult_ids[] = {
 static const struct platform_desc cml_desc = {
 	PLATFORM(COMETLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_COMETLAKE_ULT, "ULT", cml_ult_ids },
+		{
+			INTEL_DISPLAY_COMETLAKE_ULT, "ULT",
+			.pciidlist = cml_ult_ids,
+		},
 		{},
 	},
 	.info = &skl_display,
@@ -824,7 +857,10 @@ static const enum intel_step icl_steppings[] = {
 static const struct platform_desc icl_desc = {
 	PLATFORM(ICELAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_ICELAKE_PORT_F, "Port F", icl_port_f_ids },
+		{
+			INTEL_DISPLAY_ICELAKE_PORT_F, "Port F",
+			.pciidlist = icl_port_f_ids,
+		},
 		{},
 	},
 	.info = &(const struct intel_display_device_info) {
@@ -921,8 +957,11 @@ static const enum intel_step tgl_uy_steppings[] = {
 static const struct platform_desc tgl_desc = {
 	PLATFORM(TIGERLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_TIGERLAKE_UY, "UY", tgl_uy_ids,
-		  STEP_INFO(tgl_uy_steppings) },
+		{
+			INTEL_DISPLAY_TIGERLAKE_UY, "UY",
+			.pciidlist = tgl_uy_ids,
+			STEP_INFO(tgl_uy_steppings),
+		},
 		{},
 	},
 	.info = &(const struct intel_display_device_info) {
@@ -998,8 +1037,11 @@ static const enum intel_step adl_s_rpl_s_steppings[] = {
 static const struct platform_desc adl_s_desc = {
 	PLATFORM(ALDERLAKE_S),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S", adls_rpls_ids,
-		  STEP_INFO(adl_s_rpl_s_steppings) },
+		{
+			INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S",
+			.pciidlist = adls_rpls_ids,
+			STEP_INFO(adl_s_rpl_s_steppings),
+		},
 		{},
 	},
 	.info = &(const struct intel_display_device_info) {
@@ -1102,12 +1144,21 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = {
 static const struct platform_desc adl_p_desc = {
 	PLATFORM(ALDERLAKE_P),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N", adlp_adln_ids,
-		  STEP_INFO(adl_p_adl_n_steppings) },
-		{ INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P", adlp_rplp_ids,
-		  STEP_INFO(adl_p_rpl_pu_steppings) },
-		{ INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U", adlp_rplu_ids,
-		  STEP_INFO(adl_p_rpl_pu_steppings) },
+		{
+			INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N",
+			.pciidlist = adlp_adln_ids,
+			STEP_INFO(adl_p_adl_n_steppings),
+		},
+		{
+			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P",
+			.pciidlist = adlp_rplp_ids,
+			STEP_INFO(adl_p_rpl_pu_steppings),
+		},
+		{
+			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U",
+			.pciidlist = adlp_rplu_ids,
+			STEP_INFO(adl_p_rpl_pu_steppings),
+		},
 		{},
 	},
 	.info = &xe_lpd_display,
@@ -1161,12 +1212,21 @@ static const enum intel_step dg2_g12_steppings[] = {
 static const struct platform_desc dg2_desc = {
 	PLATFORM(DG2),
 	.subplatforms = (const struct subplatform_desc[]) {
-		{ INTEL_DISPLAY_DG2_G10, "G10", dg2_g10_ids,
-		  STEP_INFO(dg2_g10_steppings) },
-		{ INTEL_DISPLAY_DG2_G11, "G11", dg2_g11_ids,
-		  STEP_INFO(dg2_g11_steppings) },
-		{ INTEL_DISPLAY_DG2_G12, "G12", dg2_g12_ids,
-		  STEP_INFO(dg2_g12_steppings) },
+		{
+			INTEL_DISPLAY_DG2_G10, "G10",
+			.pciidlist = dg2_g10_ids,
+			STEP_INFO(dg2_g10_steppings),
+		},
+		{
+			INTEL_DISPLAY_DG2_G11, "G11",
+			.pciidlist = dg2_g11_ids,
+			STEP_INFO(dg2_g11_steppings),
+		},
+		{
+			INTEL_DISPLAY_DG2_G12, "G12",
+			.pciidlist = dg2_g12_ids,
+			STEP_INFO(dg2_g12_steppings),
+		},
 		{},
 	},
 	.info = &xe_hpd_display,
-- 
2.39.5

[PATCH v3 02/15] drm/i915/display: use a macro to initialize subplatforms

[Jani Nikula]

Make it easier to change the underlying structures by using a macro
similar to PLATFORM() for initialization.

The subplatform names in debug logs change slightly as they now reflect
the enum rather than manually entered names. For example, RAPTORLAKE_S
rather than RPL-S.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   | 44 ++++++++++---------
 1 file changed, 24 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 93c751fde1a9..d311edbfc069 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -37,6 +37,10 @@ struct subplatform_desc {
 	struct stepping_desc step_info;
 };
 
+#define SUBPLATFORM(_platform, _subplatform)				\
+	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
+	.name = #_subplatform
+
 struct platform_desc {
 	enum intel_display_platform platform;
 	const char *name;
@@ -498,11 +502,11 @@ static const struct platform_desc hsw_desc = {
 	PLATFORM(HASWELL),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_HASWELL_ULT, "ULT",
+			SUBPLATFORM(HASWELL, ULT),
 			.pciidlist = hsw_ult_ids,
 		},
 		{
-			INTEL_DISPLAY_HASWELL_ULX, "ULX",
+			SUBPLATFORM(HASWELL, ULX),
 			.pciidlist = hsw_ulx_ids,
 		},
 		{},
@@ -548,11 +552,11 @@ static const struct platform_desc bdw_desc = {
 	PLATFORM(BROADWELL),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_BROADWELL_ULT, "ULT",
+			SUBPLATFORM(BROADWELL, ULT),
 			.pciidlist = bdw_ult_ids,
 		},
 		{
-			INTEL_DISPLAY_BROADWELL_ULX, "ULX",
+			SUBPLATFORM(BROADWELL, ULX),
 			.pciidlist = bdw_ulx_ids,
 		},
 		{},
@@ -645,11 +649,11 @@ static const struct platform_desc skl_desc = {
 	PLATFORM(SKYLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_SKYLAKE_ULT, "ULT",
+			SUBPLATFORM(SKYLAKE, ULT),
 			.pciidlist = skl_ult_ids,
 		},
 		{
-			INTEL_DISPLAY_SKYLAKE_ULX, "ULX",
+			SUBPLATFORM(SKYLAKE, ULX),
 			.pciidlist = skl_ulx_ids,
 		},
 		{},
@@ -686,11 +690,11 @@ static const struct platform_desc kbl_desc = {
 	PLATFORM(KABYLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_KABYLAKE_ULT, "ULT",
+			SUBPLATFORM(KABYLAKE, ULT),
 			.pciidlist = kbl_ult_ids,
 		},
 		{
-			INTEL_DISPLAY_KABYLAKE_ULX, "ULX",
+			SUBPLATFORM(KABYLAKE, ULX),
 			.pciidlist = kbl_ulx_ids,
 		},
 		{},
@@ -717,11 +721,11 @@ static const struct platform_desc cfl_desc = {
 	PLATFORM(COFFEELAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_COFFEELAKE_ULT, "ULT",
+			SUBPLATFORM(COFFEELAKE, ULT),
 			.pciidlist = cfl_ult_ids,
 		},
 		{
-			INTEL_DISPLAY_COFFEELAKE_ULX, "ULX",
+			SUBPLATFORM(COFFEELAKE, ULX),
 			.pciidlist = cfl_ulx_ids,
 		},
 		{},
@@ -739,7 +743,7 @@ static const struct platform_desc cml_desc = {
 	PLATFORM(COMETLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_COMETLAKE_ULT, "ULT",
+			SUBPLATFORM(COMETLAKE, ULT),
 			.pciidlist = cml_ult_ids,
 		},
 		{},
@@ -858,7 +862,7 @@ static const struct platform_desc icl_desc = {
 	PLATFORM(ICELAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_ICELAKE_PORT_F, "Port F",
+			SUBPLATFORM(ICELAKE, PORT_F),
 			.pciidlist = icl_port_f_ids,
 		},
 		{},
@@ -958,7 +962,7 @@ static const struct platform_desc tgl_desc = {
 	PLATFORM(TIGERLAKE),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_TIGERLAKE_UY, "UY",
+			SUBPLATFORM(TIGERLAKE, UY),
 			.pciidlist = tgl_uy_ids,
 			STEP_INFO(tgl_uy_steppings),
 		},
@@ -1038,7 +1042,7 @@ static const struct platform_desc adl_s_desc = {
 	PLATFORM(ALDERLAKE_S),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S",
+			SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S),
 			.pciidlist = adls_rpls_ids,
 			STEP_INFO(adl_s_rpl_s_steppings),
 		},
@@ -1145,17 +1149,17 @@ static const struct platform_desc adl_p_desc = {
 	PLATFORM(ALDERLAKE_P),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N",
+			SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N),
 			.pciidlist = adlp_adln_ids,
 			STEP_INFO(adl_p_adl_n_steppings),
 		},
 		{
-			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P",
+			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P),
 			.pciidlist = adlp_rplp_ids,
 			STEP_INFO(adl_p_rpl_pu_steppings),
 		},
 		{
-			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U",
+			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U),
 			.pciidlist = adlp_rplu_ids,
 			STEP_INFO(adl_p_rpl_pu_steppings),
 		},
@@ -1213,17 +1217,17 @@ static const struct platform_desc dg2_desc = {
 	PLATFORM(DG2),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			INTEL_DISPLAY_DG2_G10, "G10",
+			SUBPLATFORM(DG2, G10),
 			.pciidlist = dg2_g10_ids,
 			STEP_INFO(dg2_g10_steppings),
 		},
 		{
-			INTEL_DISPLAY_DG2_G11, "G11",
+			SUBPLATFORM(DG2, G11),
 			.pciidlist = dg2_g11_ids,
 			STEP_INFO(dg2_g11_steppings),
 		},
 		{
-			INTEL_DISPLAY_DG2_G12, "G12",
+			SUBPLATFORM(DG2, G12),
 			.pciidlist = dg2_g12_ids,
 			STEP_INFO(dg2_g12_steppings),
 		},
-- 
2.39.5

[PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Jani Nikula]

We'll be needing a macro based list of platforms for more things in the
future. Start by defining the platform enumerations with it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
 1 file changed, 61 insertions(+), 54 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 5306bbd13e59..1cc1a2de9e6a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -15,63 +15,70 @@ struct drm_i915_private;
 struct drm_printer;
 
 /* Keep in gen based order, and chronological order within a gen */
+#define INTEL_DISPLAY_PLATFORMS(func) \
+	func(PLATFORM_UNINITIALIZED) \
+	/* Display ver 2 */ \
+	func(I830) \
+	func(I845G) \
+	func(I85X) \
+	func(I865G) \
+	/* Display ver 3 */ \
+	func(I915G) \
+	func(I915GM) \
+	func(I945G) \
+	func(I945GM) \
+	func(G33) \
+	func(PINEVIEW) \
+	/* Display ver 4 */ \
+	func(I965G) \
+	func(I965GM) \
+	func(G45) \
+	func(GM45) \
+	/* Display ver 5 */ \
+	func(IRONLAKE) \
+	/* Display ver 6 */ \
+	func(SANDYBRIDGE) \
+	/* Display ver 7 */ \
+	func(IVYBRIDGE) \
+	func(VALLEYVIEW) \
+	func(HASWELL) \
+	/* Display ver 8 */ \
+	func(BROADWELL) \
+	func(CHERRYVIEW) \
+	/* Display ver 9 */ \
+	func(SKYLAKE) \
+	func(BROXTON) \
+	func(KABYLAKE) \
+	func(GEMINILAKE) \
+	func(COFFEELAKE) \
+	func(COMETLAKE) \
+	/* Display ver 11 */ \
+	func(ICELAKE) \
+	func(JASPERLAKE) \
+	func(ELKHARTLAKE) \
+	/* Display ver 12 */ \
+	func(TIGERLAKE) \
+	func(ROCKETLAKE) \
+	func(DG1) \
+	func(ALDERLAKE_S) \
+	/* Display ver 13 */ \
+	func(ALDERLAKE_P) \
+	func(DG2) \
+	/* Display ver 14 (based on GMD ID) */ \
+	func(METEORLAKE) \
+	/* Display ver 20 (based on GMD ID) */ \
+	func(LUNARLAKE) \
+	/* Display ver 14.1 (based on GMD ID) */ \
+	func(BATTLEMAGE)
+
+#define __ENUM(x) INTEL_DISPLAY_ ## x,
+
 enum intel_display_platform {
-	INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0,
-	/* Display ver 2 */
-	INTEL_DISPLAY_I830,
-	INTEL_DISPLAY_I845G,
-	INTEL_DISPLAY_I85X,
-	INTEL_DISPLAY_I865G,
-	/* Display ver 3 */
-	INTEL_DISPLAY_I915G,
-	INTEL_DISPLAY_I915GM,
-	INTEL_DISPLAY_I945G,
-	INTEL_DISPLAY_I945GM,
-	INTEL_DISPLAY_G33,
-	INTEL_DISPLAY_PINEVIEW,
-	/* Display ver 4 */
-	INTEL_DISPLAY_I965G,
-	INTEL_DISPLAY_I965GM,
-	INTEL_DISPLAY_G45,
-	INTEL_DISPLAY_GM45,
-	/* Display ver 5 */
-	INTEL_DISPLAY_IRONLAKE,
-	/* Display ver 6 */
-	INTEL_DISPLAY_SANDYBRIDGE,
-	/* Display ver 7 */
-	INTEL_DISPLAY_IVYBRIDGE,
-	INTEL_DISPLAY_VALLEYVIEW,
-	INTEL_DISPLAY_HASWELL,
-	/* Display ver 8 */
-	INTEL_DISPLAY_BROADWELL,
-	INTEL_DISPLAY_CHERRYVIEW,
-	/* Display ver 9 */
-	INTEL_DISPLAY_SKYLAKE,
-	INTEL_DISPLAY_BROXTON,
-	INTEL_DISPLAY_KABYLAKE,
-	INTEL_DISPLAY_GEMINILAKE,
-	INTEL_DISPLAY_COFFEELAKE,
-	INTEL_DISPLAY_COMETLAKE,
-	/* Display ver 11 */
-	INTEL_DISPLAY_ICELAKE,
-	INTEL_DISPLAY_JASPERLAKE,
-	INTEL_DISPLAY_ELKHARTLAKE,
-	/* Display ver 12 */
-	INTEL_DISPLAY_TIGERLAKE,
-	INTEL_DISPLAY_ROCKETLAKE,
-	INTEL_DISPLAY_DG1,
-	INTEL_DISPLAY_ALDERLAKE_S,
-	/* Display ver 13 */
-	INTEL_DISPLAY_ALDERLAKE_P,
-	INTEL_DISPLAY_DG2,
-	/* Display ver 14 (based on GMD ID) */
-	INTEL_DISPLAY_METEORLAKE,
-	/* Display ver 20 (based on GMD ID) */
-	INTEL_DISPLAY_LUNARLAKE,
-	/* Display ver 14.1 (based on GMD ID) */
-	INTEL_DISPLAY_BATTLEMAGE,
+	INTEL_DISPLAY_PLATFORMS(__ENUM)
 };
 
+#undef __ENUM
+
 enum intel_display_subplatform {
 	INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0,
 	INTEL_DISPLAY_HASWELL_ULT,
-- 
2.39.5

[PATCH v3 04/15] drm/i915/display: join the platform and subplatform enums

[Jani Nikula]

We'll want to use the subplatforms similar to platforms. Join the
subplatforms next to their corresponding platforms. Update the comment
while at it.

v2: Put the subplatforms next to the platforms

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   |  2 +-
 .../drm/i915/display/intel_display_device.h   | 54 +++++++++----------
 2 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index d311edbfc069..ab98a69b84a7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -31,7 +31,7 @@ struct stepping_desc {
 	.step_info.size = ARRAY_SIZE(_map)
 
 struct subplatform_desc {
-	enum intel_display_subplatform subplatform;
+	enum intel_display_platform subplatform;
 	const char *name;
 	const u16 *pciidlist;
 	struct stepping_desc step_info;
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 1cc1a2de9e6a..dc425e2661bc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -14,7 +14,11 @@
 struct drm_i915_private;
 struct drm_printer;
 
-/* Keep in gen based order, and chronological order within a gen */
+/*
+ * Display platforms and subplatforms. Keep platforms in display version based
+ * order, chronological order within a version, and subplatforms next to the
+ * platform.
+ */
 #define INTEL_DISPLAY_PLATFORMS(func) \
 	func(PLATFORM_UNINITIALIZED) \
 	/* Display ver 2 */ \
@@ -42,28 +46,49 @@ struct drm_printer;
 	func(IVYBRIDGE) \
 	func(VALLEYVIEW) \
 	func(HASWELL) \
+	func(HASWELL_ULT) \
+	func(HASWELL_ULX) \
 	/* Display ver 8 */ \
 	func(BROADWELL) \
+	func(BROADWELL_ULT) \
+	func(BROADWELL_ULX) \
 	func(CHERRYVIEW) \
 	/* Display ver 9 */ \
 	func(SKYLAKE) \
+	func(SKYLAKE_ULT) \
+	func(SKYLAKE_ULX) \
 	func(BROXTON) \
 	func(KABYLAKE) \
+	func(KABYLAKE_ULT) \
+	func(KABYLAKE_ULX) \
 	func(GEMINILAKE) \
 	func(COFFEELAKE) \
+	func(COFFEELAKE_ULT) \
+	func(COFFEELAKE_ULX) \
 	func(COMETLAKE) \
+	func(COMETLAKE_ULT) \
+	func(COMETLAKE_ULX) \
 	/* Display ver 11 */ \
 	func(ICELAKE) \
+	func(ICELAKE_PORT_F) \
 	func(JASPERLAKE) \
 	func(ELKHARTLAKE) \
 	/* Display ver 12 */ \
 	func(TIGERLAKE) \
+	func(TIGERLAKE_UY) \
 	func(ROCKETLAKE) \
 	func(DG1) \
 	func(ALDERLAKE_S) \
+	func(ALDERLAKE_S_RAPTORLAKE_S) \
 	/* Display ver 13 */ \
 	func(ALDERLAKE_P) \
+	func(ALDERLAKE_P_ALDERLAKE_N) \
+	func(ALDERLAKE_P_RAPTORLAKE_P) \
+	func(ALDERLAKE_P_RAPTORLAKE_U) \
 	func(DG2) \
+	func(DG2_G10) \
+	func(DG2_G11) \
+	func(DG2_G12) \
 	/* Display ver 14 (based on GMD ID) */ \
 	func(METEORLAKE) \
 	/* Display ver 20 (based on GMD ID) */ \
@@ -79,31 +104,6 @@ enum intel_display_platform {
 
 #undef __ENUM
 
-enum intel_display_subplatform {
-	INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0,
-	INTEL_DISPLAY_HASWELL_ULT,
-	INTEL_DISPLAY_HASWELL_ULX,
-	INTEL_DISPLAY_BROADWELL_ULT,
-	INTEL_DISPLAY_BROADWELL_ULX,
-	INTEL_DISPLAY_SKYLAKE_ULT,
-	INTEL_DISPLAY_SKYLAKE_ULX,
-	INTEL_DISPLAY_KABYLAKE_ULT,
-	INTEL_DISPLAY_KABYLAKE_ULX,
-	INTEL_DISPLAY_COFFEELAKE_ULT,
-	INTEL_DISPLAY_COFFEELAKE_ULX,
-	INTEL_DISPLAY_COMETLAKE_ULT,
-	INTEL_DISPLAY_COMETLAKE_ULX,
-	INTEL_DISPLAY_ICELAKE_PORT_F,
-	INTEL_DISPLAY_TIGERLAKE_UY,
-	INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S,
-	INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N,
-	INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P,
-	INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U,
-	INTEL_DISPLAY_DG2_G10,
-	INTEL_DISPLAY_DG2_G11,
-	INTEL_DISPLAY_DG2_G12,
-};
-
 #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
 	/* Keep in alphabetical order */ \
 	func(cursor_needs_physical); \
@@ -211,7 +211,7 @@ enum intel_display_subplatform {
 
 struct intel_display_runtime_info {
 	enum intel_display_platform platform;
-	enum intel_display_subplatform subplatform;
+	enum intel_display_platform subplatform;
 
 	struct intel_display_ip_ver {
 		u16 ver;
-- 
2.39.5

[PATCH v3 05/15] drm/i915/display: convert display platforms to lower case

[Jani Nikula]

This will be helpful for follow-up, where the names here become struct
member names.

This does impact debug logs as well, making everything lower case.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   | 120 +++++++++---------
 .../drm/i915/display/intel_display_device.h   | 120 +++++++++---------
 2 files changed, 120 insertions(+), 120 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index ab98a69b84a7..b2610217f5c5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -236,7 +236,7 @@ static const struct intel_display_device_info no_display = {};
 	.__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A)
 
 static const struct platform_desc i830_desc = {
-	PLATFORM(I830),
+	PLATFORM(i830),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -245,7 +245,7 @@ static const struct platform_desc i830_desc = {
 };
 
 static const struct platform_desc i845_desc = {
-	PLATFORM(I845G),
+	PLATFORM(i845g),
 	.info = &(const struct intel_display_device_info) {
 		I845_DISPLAY,
 
@@ -254,7 +254,7 @@ static const struct platform_desc i845_desc = {
 };
 
 static const struct platform_desc i85x_desc = {
-	PLATFORM(I85X),
+	PLATFORM(i85x),
 	.info = &(const struct intel_display_device_info) {
 		I830_DISPLAY,
 
@@ -264,7 +264,7 @@ static const struct platform_desc i85x_desc = {
 };
 
 static const struct platform_desc i865g_desc = {
-	PLATFORM(I865G),
+	PLATFORM(i865g),
 	.info = &(const struct intel_display_device_info) {
 		I845_DISPLAY,
 
@@ -286,7 +286,7 @@ static const struct platform_desc i865g_desc = {
 	.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) /* SDVO B/C */
 
 static const struct platform_desc i915g_desc = {
-	PLATFORM(I915G),
+	PLATFORM(i915g),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I845_COLORS,
@@ -296,7 +296,7 @@ static const struct platform_desc i915g_desc = {
 };
 
 static const struct platform_desc i915gm_desc = {
-	PLATFORM(I915GM),
+	PLATFORM(i915gm),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -309,7 +309,7 @@ static const struct platform_desc i915gm_desc = {
 };
 
 static const struct platform_desc i945g_desc = {
-	PLATFORM(I945G),
+	PLATFORM(i945g),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I845_COLORS,
@@ -320,7 +320,7 @@ static const struct platform_desc i945g_desc = {
 };
 
 static const struct platform_desc i945gm_desc = {
-	PLATFORM(I915GM),
+	PLATFORM(i915gm),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -334,7 +334,7 @@ static const struct platform_desc i945gm_desc = {
 };
 
 static const struct platform_desc g33_desc = {
-	PLATFORM(G33),
+	PLATFORM(g33),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I845_COLORS,
@@ -343,7 +343,7 @@ static const struct platform_desc g33_desc = {
 };
 
 static const struct platform_desc pnv_desc = {
-	PLATFORM(PINEVIEW),
+	PLATFORM(pineview),
 	.info = &(const struct intel_display_device_info) {
 		GEN3_DISPLAY,
 		I9XX_COLORS,
@@ -364,7 +364,7 @@ static const struct platform_desc pnv_desc = {
 		BIT(TRANSCODER_A) | BIT(TRANSCODER_B)
 
 static const struct platform_desc i965g_desc = {
-	PLATFORM(I965G),
+	PLATFORM(i965g),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.has_overlay = 1,
@@ -374,7 +374,7 @@ static const struct platform_desc i965g_desc = {
 };
 
 static const struct platform_desc i965gm_desc = {
-	PLATFORM(I965GM),
+	PLATFORM(i965gm),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.has_overlay = 1,
@@ -386,7 +386,7 @@ static const struct platform_desc i965gm_desc = {
 };
 
 static const struct platform_desc g45_desc = {
-	PLATFORM(G45),
+	PLATFORM(g45),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 
@@ -395,7 +395,7 @@ static const struct platform_desc g45_desc = {
 };
 
 static const struct platform_desc gm45_desc = {
-	PLATFORM(GM45),
+	PLATFORM(gm45),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.supports_tv = 1,
@@ -418,14 +418,14 @@ static const struct platform_desc gm45_desc = {
 	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
 
 static const struct platform_desc ilk_d_desc = {
-	PLATFORM(IRONLAKE),
+	PLATFORM(ironlake),
 	.info = &(const struct intel_display_device_info) {
 		ILK_DISPLAY,
 	},
 };
 
 static const struct platform_desc ilk_m_desc = {
-	PLATFORM(IRONLAKE),
+	PLATFORM(ironlake),
 	.info = &(const struct intel_display_device_info) {
 		ILK_DISPLAY,
 
@@ -434,7 +434,7 @@ static const struct platform_desc ilk_m_desc = {
 };
 
 static const struct platform_desc snb_desc = {
-	PLATFORM(SANDYBRIDGE),
+	PLATFORM(sandybridge),
 	.info = &(const struct intel_display_device_info) {
 		.has_hotplug = 1,
 		I9XX_PIPE_OFFSETS,
@@ -451,7 +451,7 @@ static const struct platform_desc snb_desc = {
 };
 
 static const struct platform_desc ivb_desc = {
-	PLATFORM(IVYBRIDGE),
+	PLATFORM(ivybridge),
 	.info = &(const struct intel_display_device_info) {
 		.has_hotplug = 1,
 		IVB_PIPE_OFFSETS,
@@ -468,7 +468,7 @@ static const struct platform_desc ivb_desc = {
 };
 
 static const struct platform_desc vlv_desc = {
-	PLATFORM(VALLEYVIEW),
+	PLATFORM(valleyview),
 	.info = &(const struct intel_display_device_info) {
 		.has_gmch = 1,
 		.has_hotplug = 1,
@@ -499,14 +499,14 @@ static const u16 hsw_ulx_ids[] = {
 };
 
 static const struct platform_desc hsw_desc = {
-	PLATFORM(HASWELL),
+	PLATFORM(haswell),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(HASWELL, ULT),
+			SUBPLATFORM(haswell, ult),
 			.pciidlist = hsw_ult_ids,
 		},
 		{
-			SUBPLATFORM(HASWELL, ULX),
+			SUBPLATFORM(haswell, ulx),
 			.pciidlist = hsw_ulx_ids,
 		},
 		{},
@@ -549,14 +549,14 @@ static const u16 bdw_ulx_ids[] = {
 };
 
 static const struct platform_desc bdw_desc = {
-	PLATFORM(BROADWELL),
+	PLATFORM(broadwell),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(BROADWELL, ULT),
+			SUBPLATFORM(broadwell, ult),
 			.pciidlist = bdw_ult_ids,
 		},
 		{
-			SUBPLATFORM(BROADWELL, ULX),
+			SUBPLATFORM(broadwell, ulx),
 			.pciidlist = bdw_ulx_ids,
 		},
 		{},
@@ -583,7 +583,7 @@ static const struct platform_desc bdw_desc = {
 };
 
 static const struct platform_desc chv_desc = {
-	PLATFORM(CHERRYVIEW),
+	PLATFORM(cherryview),
 	.info = &(const struct intel_display_device_info) {
 		.has_hotplug = 1,
 		.has_gmch = 1,
@@ -646,14 +646,14 @@ static const enum intel_step skl_steppings[] = {
 };
 
 static const struct platform_desc skl_desc = {
-	PLATFORM(SKYLAKE),
+	PLATFORM(skylake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(SKYLAKE, ULT),
+			SUBPLATFORM(skylake, ult),
 			.pciidlist = skl_ult_ids,
 		},
 		{
-			SUBPLATFORM(SKYLAKE, ULX),
+			SUBPLATFORM(skylake, ulx),
 			.pciidlist = skl_ulx_ids,
 		},
 		{},
@@ -687,14 +687,14 @@ static const enum intel_step kbl_steppings[] = {
 };
 
 static const struct platform_desc kbl_desc = {
-	PLATFORM(KABYLAKE),
+	PLATFORM(kabylake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(KABYLAKE, ULT),
+			SUBPLATFORM(kabylake, ult),
 			.pciidlist = kbl_ult_ids,
 		},
 		{
-			SUBPLATFORM(KABYLAKE, ULX),
+			SUBPLATFORM(kabylake, ulx),
 			.pciidlist = kbl_ulx_ids,
 		},
 		{},
@@ -718,14 +718,14 @@ static const u16 cfl_ulx_ids[] = {
 };
 
 static const struct platform_desc cfl_desc = {
-	PLATFORM(COFFEELAKE),
+	PLATFORM(coffeelake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(COFFEELAKE, ULT),
+			SUBPLATFORM(coffeelake, ult),
 			.pciidlist = cfl_ult_ids,
 		},
 		{
-			SUBPLATFORM(COFFEELAKE, ULX),
+			SUBPLATFORM(coffeelake, ulx),
 			.pciidlist = cfl_ulx_ids,
 		},
 		{},
@@ -740,10 +740,10 @@ static const u16 cml_ult_ids[] = {
 };
 
 static const struct platform_desc cml_desc = {
-	PLATFORM(COMETLAKE),
+	PLATFORM(cometlake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(COMETLAKE, ULT),
+			SUBPLATFORM(cometlake, ult),
 			.pciidlist = cml_ult_ids,
 		},
 		{},
@@ -782,7 +782,7 @@ static const enum intel_step bxt_steppings[] = {
 };
 
 static const struct platform_desc bxt_desc = {
-	PLATFORM(BROXTON),
+	PLATFORM(broxton),
 	.info = &(const struct intel_display_device_info) {
 		GEN9_LP_DISPLAY,
 		.dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */
@@ -797,7 +797,7 @@ static const enum intel_step glk_steppings[] = {
 };
 
 static const struct platform_desc glk_desc = {
-	PLATFORM(GEMINILAKE),
+	PLATFORM(geminilake),
 	.info = &(const struct intel_display_device_info) {
 		GEN9_LP_DISPLAY,
 		.dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */
@@ -859,10 +859,10 @@ static const enum intel_step icl_steppings[] = {
 };
 
 static const struct platform_desc icl_desc = {
-	PLATFORM(ICELAKE),
+	PLATFORM(icelake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(ICELAKE, PORT_F),
+			SUBPLATFORM(icelake, port_f),
 			.pciidlist = icl_port_f_ids,
 		},
 		{},
@@ -887,13 +887,13 @@ static const enum intel_step jsl_ehl_steppings[] = {
 };
 
 static const struct platform_desc jsl_desc = {
-	PLATFORM(JASPERLAKE),
+	PLATFORM(jasperlake),
 	.info = &jsl_ehl_display,
 	STEP_INFO(jsl_ehl_steppings),
 };
 
 static const struct platform_desc ehl_desc = {
-	PLATFORM(ELKHARTLAKE),
+	PLATFORM(elkhartlake),
 	.info = &jsl_ehl_display,
 	STEP_INFO(jsl_ehl_steppings),
 };
@@ -959,10 +959,10 @@ static const enum intel_step tgl_uy_steppings[] = {
 };
 
 static const struct platform_desc tgl_desc = {
-	PLATFORM(TIGERLAKE),
+	PLATFORM(tigerlake),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(TIGERLAKE, UY),
+			SUBPLATFORM(tigerlake, uy),
 			.pciidlist = tgl_uy_ids,
 			STEP_INFO(tgl_uy_steppings),
 		},
@@ -987,7 +987,7 @@ static const enum intel_step dg1_steppings[] = {
 };
 
 static const struct platform_desc dg1_desc = {
-	PLATFORM(DG1),
+	PLATFORM(dg1),
 	.info = &(const struct intel_display_device_info) {
 		XE_D_DISPLAY,
 
@@ -1004,7 +1004,7 @@ static const enum intel_step rkl_steppings[] = {
 };
 
 static const struct platform_desc rkl_desc = {
-	PLATFORM(ROCKETLAKE),
+	PLATFORM(rocketlake),
 	.info = &(const struct intel_display_device_info) {
 		XE_D_DISPLAY,
 		.abox_mask = BIT(0),
@@ -1039,10 +1039,10 @@ static const enum intel_step adl_s_rpl_s_steppings[] = {
 };
 
 static const struct platform_desc adl_s_desc = {
-	PLATFORM(ALDERLAKE_S),
+	PLATFORM(alderlake_s),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S),
+			SUBPLATFORM(alderlake_s, raptorlake_s),
 			.pciidlist = adls_rpls_ids,
 			STEP_INFO(adl_s_rpl_s_steppings),
 		},
@@ -1146,20 +1146,20 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = {
 };
 
 static const struct platform_desc adl_p_desc = {
-	PLATFORM(ALDERLAKE_P),
+	PLATFORM(alderlake_p),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N),
+			SUBPLATFORM(alderlake_p, alderlake_n),
 			.pciidlist = adlp_adln_ids,
 			STEP_INFO(adl_p_adl_n_steppings),
 		},
 		{
-			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P),
+			SUBPLATFORM(alderlake_p, raptorlake_p),
 			.pciidlist = adlp_rplp_ids,
 			STEP_INFO(adl_p_rpl_pu_steppings),
 		},
 		{
-			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U),
+			SUBPLATFORM(alderlake_p, raptorlake_u),
 			.pciidlist = adlp_rplu_ids,
 			STEP_INFO(adl_p_rpl_pu_steppings),
 		},
@@ -1214,20 +1214,20 @@ static const enum intel_step dg2_g12_steppings[] = {
 };
 
 static const struct platform_desc dg2_desc = {
-	PLATFORM(DG2),
+	PLATFORM(dg2),
 	.subplatforms = (const struct subplatform_desc[]) {
 		{
-			SUBPLATFORM(DG2, G10),
+			SUBPLATFORM(dg2, g10),
 			.pciidlist = dg2_g10_ids,
 			STEP_INFO(dg2_g10_steppings),
 		},
 		{
-			SUBPLATFORM(DG2, G11),
+			SUBPLATFORM(dg2, g11),
 			.pciidlist = dg2_g11_ids,
 			STEP_INFO(dg2_g11_steppings),
 		},
 		{
-			SUBPLATFORM(DG2, G12),
+			SUBPLATFORM(dg2, g12),
 			.pciidlist = dg2_g12_ids,
 			STEP_INFO(dg2_g12_steppings),
 		},
@@ -1305,15 +1305,15 @@ static const struct intel_display_device_info xe2_hpd_display = {
  * reported by the hardware.
  */
 static const struct platform_desc mtl_desc = {
-	PLATFORM(METEORLAKE),
+	PLATFORM(meteorlake),
 };
 
 static const struct platform_desc lnl_desc = {
-	PLATFORM(LUNARLAKE),
+	PLATFORM(lunarlake),
 };
 
 static const struct platform_desc bmg_desc = {
-	PLATFORM(BATTLEMAGE),
+	PLATFORM(battlemage),
 };
 
 __diag_pop();
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index dc425e2661bc..c4208c34cc31 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -22,79 +22,79 @@ struct drm_printer;
 #define INTEL_DISPLAY_PLATFORMS(func) \
 	func(PLATFORM_UNINITIALIZED) \
 	/* Display ver 2 */ \
-	func(I830) \
-	func(I845G) \
-	func(I85X) \
-	func(I865G) \
+	func(i830) \
+	func(i845g) \
+	func(i85x) \
+	func(i865g) \
 	/* Display ver 3 */ \
-	func(I915G) \
-	func(I915GM) \
-	func(I945G) \
-	func(I945GM) \
-	func(G33) \
-	func(PINEVIEW) \
+	func(i915g) \
+	func(i915gm) \
+	func(i945g) \
+	func(i945gm) \
+	func(g33) \
+	func(pineview) \
 	/* Display ver 4 */ \
-	func(I965G) \
-	func(I965GM) \
-	func(G45) \
-	func(GM45) \
+	func(i965g) \
+	func(i965gm) \
+	func(g45) \
+	func(gm45) \
 	/* Display ver 5 */ \
-	func(IRONLAKE) \
+	func(ironlake) \
 	/* Display ver 6 */ \
-	func(SANDYBRIDGE) \
+	func(sandybridge) \
 	/* Display ver 7 */ \
-	func(IVYBRIDGE) \
-	func(VALLEYVIEW) \
-	func(HASWELL) \
-	func(HASWELL_ULT) \
-	func(HASWELL_ULX) \
+	func(ivybridge) \
+	func(valleyview) \
+	func(haswell) \
+	func(haswell_ult) \
+	func(haswell_ulx) \
 	/* Display ver 8 */ \
-	func(BROADWELL) \
-	func(BROADWELL_ULT) \
-	func(BROADWELL_ULX) \
-	func(CHERRYVIEW) \
+	func(broadwell) \
+	func(broadwell_ult) \
+	func(broadwell_ulx) \
+	func(cherryview) \
 	/* Display ver 9 */ \
-	func(SKYLAKE) \
-	func(SKYLAKE_ULT) \
-	func(SKYLAKE_ULX) \
-	func(BROXTON) \
-	func(KABYLAKE) \
-	func(KABYLAKE_ULT) \
-	func(KABYLAKE_ULX) \
-	func(GEMINILAKE) \
-	func(COFFEELAKE) \
-	func(COFFEELAKE_ULT) \
-	func(COFFEELAKE_ULX) \
-	func(COMETLAKE) \
-	func(COMETLAKE_ULT) \
-	func(COMETLAKE_ULX) \
+	func(skylake) \
+	func(skylake_ult) \
+	func(skylake_ulx) \
+	func(broxton) \
+	func(kabylake) \
+	func(kabylake_ult) \
+	func(kabylake_ulx) \
+	func(geminilake) \
+	func(coffeelake) \
+	func(coffeelake_ult) \
+	func(coffeelake_ulx) \
+	func(cometlake) \
+	func(cometlake_ult) \
+	func(cometlake_ulx) \
 	/* Display ver 11 */ \
-	func(ICELAKE) \
-	func(ICELAKE_PORT_F) \
-	func(JASPERLAKE) \
-	func(ELKHARTLAKE) \
+	func(icelake) \
+	func(icelake_port_f) \
+	func(jasperlake) \
+	func(elkhartlake) \
 	/* Display ver 12 */ \
-	func(TIGERLAKE) \
-	func(TIGERLAKE_UY) \
-	func(ROCKETLAKE) \
-	func(DG1) \
-	func(ALDERLAKE_S) \
-	func(ALDERLAKE_S_RAPTORLAKE_S) \
+	func(tigerlake) \
+	func(tigerlake_uy) \
+	func(rocketlake) \
+	func(dg1) \
+	func(alderlake_s) \
+	func(alderlake_s_raptorlake_s) \
 	/* Display ver 13 */ \
-	func(ALDERLAKE_P) \
-	func(ALDERLAKE_P_ALDERLAKE_N) \
-	func(ALDERLAKE_P_RAPTORLAKE_P) \
-	func(ALDERLAKE_P_RAPTORLAKE_U) \
-	func(DG2) \
-	func(DG2_G10) \
-	func(DG2_G11) \
-	func(DG2_G12) \
+	func(alderlake_p) \
+	func(alderlake_p_alderlake_n) \
+	func(alderlake_p_raptorlake_p) \
+	func(alderlake_p_raptorlake_u) \
+	func(dg2) \
+	func(dg2_g10) \
+	func(dg2_g11) \
+	func(dg2_g12) \
 	/* Display ver 14 (based on GMD ID) */ \
-	func(METEORLAKE) \
+	func(meteorlake) \
 	/* Display ver 20 (based on GMD ID) */ \
-	func(LUNARLAKE) \
+	func(lunarlake) \
 	/* Display ver 14.1 (based on GMD ID) */ \
-	func(BATTLEMAGE)
+	func(battlemage)
 
 #define __ENUM(x) INTEL_DISPLAY_ ## x,
 
-- 
2.39.5

[PATCH v3 06/15] drm/i915/display: add display platforms structure with platform members

[Jani Nikula]

Add a structure with a bitfield member for each platform and
subplatform, and initialize them in platform and subplatform descs.

The structure also contains a bitmap in a union for easier manipulation
of the bits.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.c   |  4 ++++
 .../drm/i915/display/intel_display_device.h   | 19 +++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index b2610217f5c5..258660b49eba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -31,6 +31,7 @@ struct stepping_desc {
 	.step_info.size = ARRAY_SIZE(_map)
 
 struct subplatform_desc {
+	struct intel_display_platforms platforms;
 	enum intel_display_platform subplatform;
 	const char *name;
 	const u16 *pciidlist;
@@ -38,10 +39,12 @@ struct subplatform_desc {
 };
 
 #define SUBPLATFORM(_platform, _subplatform)				\
+	.platforms._platform##_##_subplatform = 1,			\
 	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
 	.name = #_subplatform
 
 struct platform_desc {
+	struct intel_display_platforms platforms;
 	enum intel_display_platform platform;
 	const char *name;
 	const struct subplatform_desc *subplatforms;
@@ -50,6 +53,7 @@ struct platform_desc {
 };
 
 #define PLATFORM(_platform)			 \
+	.platforms._platform = 1,		 \
 	.platform = (INTEL_DISPLAY_##_platform), \
 	.name = #_platform
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index c4208c34cc31..f166d4698949 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -6,6 +6,7 @@
 #ifndef __INTEL_DISPLAY_DEVICE_H__
 #define __INTEL_DISPLAY_DEVICE_H__
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 
 #include "intel_display_conversion.h"
@@ -104,6 +105,24 @@ enum intel_display_platform {
 
 #undef __ENUM
 
+#define __MEMBER(name) unsigned long name:1;
+#define __COUNT(x) 1 +
+
+#define __NUM_PLATFORMS (INTEL_DISPLAY_PLATFORMS(__COUNT) 0)
+
+struct intel_display_platforms {
+	union {
+		struct {
+			INTEL_DISPLAY_PLATFORMS(__MEMBER);
+		};
+		DECLARE_BITMAP(bitmap, __NUM_PLATFORMS);
+	};
+};
+
+#undef __MEMBER
+#undef __COUNT
+#undef __NUM_PLATFORMS
+
 #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
 	/* Keep in alphabetical order */ \
 	func(cursor_needs_physical); \
-- 
2.39.5

[PATCH v3 07/15] drm/i915/display: add platform member to struct intel_display

[Jani Nikula]

Facilitate using display->platform.haswell and
display->platform.haswell_ult etc. for identifying platforms and
subplatforms.

Merge the platform and subplatform bitmaps together, and check that
there's no overlap.

v4:
- Lower case, s/is/platform/

v3:
- Fix sanity check on display->is after merging subplatform members

v2:
- Use bitmap ops
- Add some sanity checks with warnings

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_core.h |  3 ++
 .../drm/i915/display/intel_display_device.c   | 35 +++++++++++++++++--
 2 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 982dd9469195..c19cc7e131e2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -284,6 +284,9 @@ struct intel_display {
 	/* drm device backpointer */
 	struct drm_device *drm;
 
+	/* Platform (and subplatform, if any) identification */
+	struct intel_display_platforms platform;
+
 	/* Display functions */
 	struct {
 		/* Top level crtc-ish functions */
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 258660b49eba..be42f941900d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1519,6 +1519,25 @@ static enum intel_step get_pre_gmdid_step(struct intel_display *display,
 	return step;
 }
 
+/* Size of the entire bitmap, not the number of platforms */
+static unsigned int display_platforms_num_bits(void)
+{
+	return sizeof(((struct intel_display_platforms *)0)->bitmap) * BITS_PER_BYTE;
+}
+
+/* Number of platform bits set */
+static unsigned int display_platforms_weight(const struct intel_display_platforms *p)
+{
+	return bitmap_weight(p->bitmap, display_platforms_num_bits());
+}
+
+/* Merge the subplatform information from src to dst */
+static void display_platforms_or(struct intel_display_platforms *dst,
+				 const struct intel_display_platforms *src)
+{
+	bitmap_or(dst->bitmap, dst->bitmap, src->bitmap, display_platforms_num_bits());
+}
+
 void intel_display_device_probe(struct drm_i915_private *i915)
 {
 	struct intel_display *display = &i915->display;
@@ -1558,13 +1577,25 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 	       &DISPLAY_INFO(i915)->__runtime_defaults,
 	       sizeof(*DISPLAY_RUNTIME_INFO(i915)));
 
-	drm_WARN_ON(&i915->drm, !desc->platform || !desc->name);
+	drm_WARN_ON(&i915->drm, !desc->platform || !desc->name ||
+		    !display_platforms_weight(&desc->platforms));
 	DISPLAY_RUNTIME_INFO(i915)->platform = desc->platform;
 
+	display->platform = desc->platforms;
+
 	subdesc = find_subplatform_desc(pdev, desc);
 	if (subdesc) {
-		drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name);
+		drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name ||
+			    !display_platforms_weight(&subdesc->platforms));
 		DISPLAY_RUNTIME_INFO(i915)->subplatform = subdesc->subplatform;
+
+		display_platforms_or(&display->platform, &subdesc->platforms);
+
+		/* Ensure platform and subplatform are distinct */
+		drm_WARN_ON(&i915->drm,
+			    display_platforms_weight(&display->platform) !=
+			    display_platforms_weight(&desc->platforms) +
+			    display_platforms_weight(&subdesc->platforms));
 	}
 
 	if (ip_ver.ver || ip_ver.rel || ip_ver.step) {
-- 
2.39.5

[PATCH v3 08/15] drm/i915/display: remove the display platform enum as unnecessary

[Jani Nikula]

The display platform enums are not really needed for anything. Remove.

Without the enum, PLATFORM_UNINITIALIZED is also no longer needed for
keeping the first enum 0.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 12 +++---------
 drivers/gpu/drm/i915/display/intel_display_device.h | 12 ------------
 2 files changed, 3 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index be42f941900d..86d3ba26e66f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -32,7 +32,6 @@ struct stepping_desc {
 
 struct subplatform_desc {
 	struct intel_display_platforms platforms;
-	enum intel_display_platform subplatform;
 	const char *name;
 	const u16 *pciidlist;
 	struct stepping_desc step_info;
@@ -40,12 +39,10 @@ struct subplatform_desc {
 
 #define SUBPLATFORM(_platform, _subplatform)				\
 	.platforms._platform##_##_subplatform = 1,			\
-	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
 	.name = #_subplatform
 
 struct platform_desc {
 	struct intel_display_platforms platforms;
-	enum intel_display_platform platform;
 	const char *name;
 	const struct subplatform_desc *subplatforms;
 	const struct intel_display_device_info *info; /* NULL for GMD ID */
@@ -54,7 +51,6 @@ struct platform_desc {
 
 #define PLATFORM(_platform)			 \
 	.platforms._platform = 1,		 \
-	.platform = (INTEL_DISPLAY_##_platform), \
 	.name = #_platform
 
 #define ID(id) (id)
@@ -1460,7 +1456,7 @@ find_subplatform_desc(struct pci_dev *pdev, const struct platform_desc *desc)
 	const struct subplatform_desc *sp;
 	const u16 *id;
 
-	for (sp = desc->subplatforms; sp && sp->subplatform; sp++)
+	for (sp = desc->subplatforms; sp && sp->pciidlist; sp++)
 		for (id = sp->pciidlist; *id; id++)
 			if (*id == pdev->device)
 				return sp;
@@ -1577,17 +1573,15 @@ void intel_display_device_probe(struct drm_i915_private *i915)
 	       &DISPLAY_INFO(i915)->__runtime_defaults,
 	       sizeof(*DISPLAY_RUNTIME_INFO(i915)));
 
-	drm_WARN_ON(&i915->drm, !desc->platform || !desc->name ||
+	drm_WARN_ON(&i915->drm, !desc->name ||
 		    !display_platforms_weight(&desc->platforms));
-	DISPLAY_RUNTIME_INFO(i915)->platform = desc->platform;
 
 	display->platform = desc->platforms;
 
 	subdesc = find_subplatform_desc(pdev, desc);
 	if (subdesc) {
-		drm_WARN_ON(&i915->drm, !subdesc->subplatform || !subdesc->name ||
+		drm_WARN_ON(&i915->drm, !subdesc->name ||
 			    !display_platforms_weight(&subdesc->platforms));
-		DISPLAY_RUNTIME_INFO(i915)->subplatform = subdesc->subplatform;
 
 		display_platforms_or(&display->platform, &subdesc->platforms);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index f166d4698949..2711c82f518b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -21,7 +21,6 @@ struct drm_printer;
  * platform.
  */
 #define INTEL_DISPLAY_PLATFORMS(func) \
-	func(PLATFORM_UNINITIALIZED) \
 	/* Display ver 2 */ \
 	func(i830) \
 	func(i845g) \
@@ -97,14 +96,6 @@ struct drm_printer;
 	/* Display ver 14.1 (based on GMD ID) */ \
 	func(battlemage)
 
-#define __ENUM(x) INTEL_DISPLAY_ ## x,
-
-enum intel_display_platform {
-	INTEL_DISPLAY_PLATFORMS(__ENUM)
-};
-
-#undef __ENUM
-
 #define __MEMBER(name) unsigned long name:1;
 #define __COUNT(x) 1 +
 
@@ -229,9 +220,6 @@ struct intel_display_platforms {
 	 INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) < (until))
 
 struct intel_display_runtime_info {
-	enum intel_display_platform platform;
-	enum intel_display_platform subplatform;
-
 	struct intel_display_ip_ver {
 		u16 ver;
 		u16 rel;
-- 
2.39.5

[PATCH v3 09/15] drm/i915/display: add platform group for g4x

[Jani Nikula]

Add support for defining aliases for platform groups, such as g4x that
covers both g45 and gm45.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 9 +++++++++
 drivers/gpu/drm/i915/display/intel_display_device.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 86d3ba26e66f..73d4c9ed5a10 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -53,6 +53,13 @@ struct platform_desc {
 	.platforms._platform = 1,		 \
 	.name = #_platform
 
+/*
+ * Group platform alias that matches multiple platforms. For aliases such as g4x
+ * that covers both g45 and gm45.
+ */
+#define PLATFORM_GROUP(_platform)		\
+	.platforms._platform = 1
+
 #define ID(id) (id)
 
 static const struct intel_display_device_info no_display = {};
@@ -387,6 +394,7 @@ static const struct platform_desc i965gm_desc = {
 
 static const struct platform_desc g45_desc = {
 	PLATFORM(g45),
+	PLATFORM_GROUP(g4x),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 
@@ -396,6 +404,7 @@ static const struct platform_desc g45_desc = {
 
 static const struct platform_desc gm45_desc = {
 	PLATFORM(gm45),
+	PLATFORM_GROUP(g4x),
 	.info = &(const struct intel_display_device_info) {
 		GEN4_DISPLAY,
 		.supports_tv = 1,
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 2711c82f518b..d8d545ed552e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -38,6 +38,7 @@ struct drm_printer;
 	func(i965gm) \
 	func(g45) \
 	func(gm45) \
+	func(g4x) /* group alias for g45 and gm45 */ \
 	/* Display ver 5 */ \
 	func(ironlake) \
 	/* Display ver 6 */ \
-- 
2.39.5

[PATCH v3 10/15] drm/i915/display: add subplatform group for HSW/BDW ULT

[Jani Nikula]

Add support for defining aliases for subplatform groups, such as HSW/BDW
ULT that covers both ULT and ULX.

ULT is a special case, because we slightly abuse the ULT subplatform
both as a subplatform and group, but with the way this is defined, it
should be fairly clear.

This follows i915 core and IS_HASWELL_ULT()/IS_BROADWELL_ULT()
conventions, i.e. "is ULT" also matches ULX platforms.

Note: Pedantically, this should have been done earlier, but it's only
feasible now that we no longer have a subplatform enum and can actually
initialize multiple subplatforms.

v2: Use the subplatform group idea

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 73d4c9ed5a10..cfd7d0fdf934 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -41,6 +41,13 @@ struct subplatform_desc {
 	.platforms._platform##_##_subplatform = 1,			\
 	.name = #_subplatform
 
+/*
+ * Group subplatform alias that matches multiple subplatforms. For making ult
+ * cover both ult and ulx on HSW/BDW.
+ */
+#define SUBPLATFORM_GROUP(_platform, _subplatform)			\
+	.platforms._platform##_##_subplatform = 1
+
 struct platform_desc {
 	struct intel_display_platforms platforms;
 	const char *name;
@@ -510,12 +517,15 @@ static const u16 hsw_ulx_ids[] = {
 static const struct platform_desc hsw_desc = {
 	PLATFORM(haswell),
 	.subplatforms = (const struct subplatform_desc[]) {
+		/* Special case: Use ult both as group and subplatform. */
 		{
 			SUBPLATFORM(haswell, ult),
+			SUBPLATFORM_GROUP(haswell, ult),
 			.pciidlist = hsw_ult_ids,
 		},
 		{
 			SUBPLATFORM(haswell, ulx),
+			SUBPLATFORM_GROUP(haswell, ult),
 			.pciidlist = hsw_ulx_ids,
 		},
 		{},
@@ -560,12 +570,15 @@ static const u16 bdw_ulx_ids[] = {
 static const struct platform_desc bdw_desc = {
 	PLATFORM(broadwell),
 	.subplatforms = (const struct subplatform_desc[]) {
+		/* Special case: Use ult both as group and subplatform. */
 		{
 			SUBPLATFORM(broadwell, ult),
+			SUBPLATFORM_GROUP(broadwell, ult),
 			.pciidlist = bdw_ult_ids,
 		},
 		{
 			SUBPLATFORM(broadwell, ulx),
+			SUBPLATFORM_GROUP(broadwell, ult),
 			.pciidlist = bdw_ulx_ids,
 		},
 		{},
-- 
2.39.5

[PATCH v3 11/15] drm/i915/bios: use display->platform.<platform> instead of IS_<PLATFORM>()

[Jani Nikula]

Switch to using the new display->platform.<platform> members for
platform identification in display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 40 +++++++++--------------
 1 file changed, 15 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index daa4b9535123..cf1ba3ca57d3 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1169,7 +1169,6 @@ static int intel_bios_ssc_frequency(struct intel_display *display,
 static void
 parse_general_features(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	const struct bdb_general_features *general;
 
 	general = bdb_find_section(display, BDB_GENERAL_FEATURES);
@@ -1179,7 +1178,7 @@ parse_general_features(struct intel_display *display)
 	display->vbt.int_tv_support = general->int_tv_support;
 	/* int_crt_support can't be trusted on earlier platforms */
 	if (display->vbt.version >= 155 &&
-	    (HAS_DDI(display) || IS_VALLEYVIEW(i915)))
+	    (HAS_DDI(display) || display->platform.valleyview))
 		display->vbt.int_crt_support = general->int_crt_support;
 	display->vbt.lvds_use_ssc = general->enable_ssc;
 	display->vbt.lvds_ssc_freq =
@@ -1542,7 +1541,6 @@ static void
 parse_psr(struct intel_display *display,
 	  struct intel_panel *panel)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	const struct bdb_psr *psr;
 	const struct psr_table *psr_table;
 	int panel_type = panel->vbt.panel_type;
@@ -1567,7 +1565,7 @@ parse_psr(struct intel_display *display,
 	 * Old decimal value is wake up time in multiples of 100 us.
 	 */
 	if (display->vbt.version >= 205 &&
-	    (DISPLAY_VER(display) >= 9 && !IS_BROXTON(i915))) {
+	    (DISPLAY_VER(display) >= 9 && !display->platform.broxton)) {
 		switch (psr_table->tp1_wakeup_time) {
 		case 0:
 			panel->vbt.psr.tp1_wakeup_time_us = 500;
@@ -2029,11 +2027,9 @@ static void icl_fixup_mipi_sequences(struct intel_display *display,
 static void fixup_mipi_sequences(struct intel_display *display,
 				 struct intel_panel *panel)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
 	if (DISPLAY_VER(display) >= 11)
 		icl_fixup_mipi_sequences(display, panel);
-	else if (IS_VALLEYVIEW(i915))
+	else if (display->platform.valleyview)
 		vlv_fixup_mipi_sequences(display, panel);
 }
 
@@ -2243,15 +2239,15 @@ static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin)
 	const u8 *ddc_pin_map;
 	int i, n_entries;
 
-	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
+	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || display->platform.alderlake_p) {
 		ddc_pin_map = adlp_ddc_pin_map;
 		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
-	} else if (IS_ALDERLAKE_S(i915)) {
+	} else if (display->platform.alderlake_s) {
 		ddc_pin_map = adls_ddc_pin_map;
 		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
 		return vbt_pin;
-	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
+	} else if (display->platform.rocketlake && INTEL_PCH_TYPE(i915) == PCH_TGP) {
 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
 	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) {
@@ -2334,7 +2330,6 @@ static enum port __dvo_port_to_port(int n_ports, int n_dvo,
 static enum port dvo_port_to_port(struct intel_display *display,
 				  u8 dvo_port)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	/*
 	 * Each DDI port can have more than one value on the "DVO Port" field,
 	 * so look for all the possible values for each port.
@@ -2391,12 +2386,12 @@ static enum port dvo_port_to_port(struct intel_display *display,
 					  ARRAY_SIZE(xelpd_port_mapping[0]),
 					  xelpd_port_mapping,
 					  dvo_port);
-	else if (IS_ALDERLAKE_S(i915))
+	else if (display->platform.alderlake_s)
 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
 					  ARRAY_SIZE(adls_port_mapping[0]),
 					  adls_port_mapping,
 					  dvo_port);
-	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
+	else if (display->platform.dg1 || display->platform.rocketlake)
 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
 					  ARRAY_SIZE(rkl_port_mapping[0]),
 					  rkl_port_mapping,
@@ -2519,7 +2514,6 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 				      enum port port)
 {
 	struct intel_display *display = devdata->display;
-	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (!intel_bios_encoder_supports_dvi(devdata))
 		return;
@@ -2529,7 +2523,7 @@ static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
 	 * with a HSW VBT where the level shifter value goes
 	 * up to 11, whereas the BDW max is 9.
 	 */
-	if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
+	if (display->platform.broadwell && devdata->child.hdmi_level_shifter_value > 9) {
 		drm_dbg_kms(display->drm,
 			    "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
 			    port_name(port), devdata->child.hdmi_level_shifter_value, 9);
@@ -2618,14 +2612,13 @@ int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata
 
 static bool is_port_valid(struct intel_display *display, enum port port)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	/*
 	 * On some ICL SKUs port F is not present, but broken VBTs mark
 	 * the port as present. Only try to initialize port F for the
 	 * SKUs that may actually have it.
 	 */
-	if (port == PORT_F && IS_ICELAKE(i915))
-		return IS_ICL_WITH_PORT_F(i915);
+	if (port == PORT_F && display->platform.icelake)
+		return display->platform.icelake_port_f;
 
 	return true;
 }
@@ -2723,9 +2716,7 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
 
 static bool has_ddi_port_info(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	return DISPLAY_VER(display) >= 5 || IS_G4X(i915);
+	return DISPLAY_VER(display) >= 5 || display->platform.g4x;
 }
 
 static void parse_ddi_ports(struct intel_display *display)
@@ -2907,7 +2898,7 @@ init_vbt_missing_defaults(struct intel_display *display)
 	unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask;
 	enum port port;
 
-	if (!HAS_DDI(display) && !IS_CHERRYVIEW(i915))
+	if (!HAS_DDI(display) && !display->platform.cherryview)
 		return;
 
 	for_each_port_masked(port, ports) {
@@ -3672,17 +3663,16 @@ static const u8 direct_aux_ch_map[] = {
 
 static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	const u8 *aux_ch_map;
 	int i, n_entries;
 
 	if (DISPLAY_VER(display) >= 13) {
 		aux_ch_map = adlp_aux_ch_map;
 		n_entries = ARRAY_SIZE(adlp_aux_ch_map);
-	} else if (IS_ALDERLAKE_S(i915)) {
+	} else if (display->platform.alderlake_s) {
 		aux_ch_map = adls_aux_ch_map;
 		n_entries = ARRAY_SIZE(adls_aux_ch_map);
-	} else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
+	} else if (display->platform.dg1 || display->platform.rocketlake) {
 		aux_ch_map = rkl_aux_ch_map;
 		n_entries = ARRAY_SIZE(rkl_aux_ch_map);
 	} else {
-- 
2.39.5

[PATCH v3 12/15] drm/i915/pps: use display->platform.<platform> instead of IS_<PLATFORM>()

[Jani Nikula]

Switch to using the new display->platform.<platform> members for
platform identification in display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_pps.c | 47 ++++++++++--------------
 1 file changed, 20 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 88abc4c7cda1..c42fc670a381 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -29,10 +29,9 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
 static const char *pps_name(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_pps *pps = &intel_dp->pps;
 
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+	if (display->platform.valleyview || display->platform.cherryview) {
 		switch (pps->vlv_pps_pipe) {
 		case INVALID_PIPE:
 			/*
@@ -122,7 +121,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
 	DP |= DP_PORT_WIDTH(1);
 	DP |= DP_LINK_TRAIN_PAT_1;
 
-	if (IS_CHERRYVIEW(dev_priv))
+	if (display->platform.cherryview)
 		DP |= DP_PIPE_SEL_CHV(pipe);
 	else
 		DP |= DP_PIPE_SEL(pipe);
@@ -134,7 +133,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
 	 * So enable temporarily it if it's not already enabled.
 	 */
 	if (!pll_enabled) {
-		release_cl_override = IS_CHERRYVIEW(dev_priv) &&
+		release_cl_override = display->platform.cherryview &&
 			!chv_phy_powergate_ch(dev_priv, phy, ch, true);
 
 		if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) {
@@ -356,10 +355,10 @@ static int intel_num_pps(struct intel_display *display)
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+	if (display->platform.valleyview || display->platform.cherryview)
 		return 2;
 
-	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+	if (display->platform.geminilake || display->platform.broxton)
 		return 2;
 
 	if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
@@ -406,11 +405,10 @@ pps_initial_setup(struct intel_dp *intel_dp)
 	struct intel_display *display = to_intel_display(intel_dp);
 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
 	struct intel_connector *connector = intel_dp->attached_connector;
-	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 
 	lockdep_assert_held(&display->pps.mutex);
 
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+	if (display->platform.valleyview || display->platform.cherryview) {
 		vlv_initial_power_sequencer_setup(intel_dp);
 		return true;
 	}
@@ -509,9 +507,9 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
 
 	memset(regs, 0, sizeof(*regs));
 
-	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+	if (display->platform.valleyview || display->platform.cherryview)
 		pps_idx = vlv_power_sequencer_pipe(intel_dp);
-	else if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
+	else if (display->platform.geminilake || display->platform.broxton)
 		pps_idx = bxt_power_sequencer_idx(intel_dp);
 	else
 		pps_idx = intel_dp->pps.pps_idx;
@@ -522,7 +520,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
 	regs->pp_off = PP_OFF_DELAYS(display, pps_idx);
 
 	/* Cycle delay moved from PP_DIVISOR to PP_CONTROL */
-	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+	if (display->platform.geminilake || display->platform.broxton ||
 	    INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
 		regs->pp_div = INVALID_MMIO_REG;
 	else
@@ -552,11 +550,10 @@ _pp_stat_reg(struct intel_dp *intel_dp)
 static bool edp_have_panel_power(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
 	lockdep_assert_held(&display->pps.mutex);
 
-	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
+	if ((display->platform.valleyview || display->platform.cherryview) &&
 	    intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
 		return false;
 
@@ -566,11 +563,10 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
 static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
 	lockdep_assert_held(&display->pps.mutex);
 
-	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
+	if ((display->platform.valleyview || display->platform.cherryview) &&
 	    intel_dp->pps.vlv_pps_pipe == INVALID_PIPE)
 		return false;
 
@@ -953,7 +949,6 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
 void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 pp;
 	i915_reg_t pp_ctrl_reg;
 
@@ -978,7 +973,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 
 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
 	pp = ilk_get_pp_control(intel_dp);
-	if (IS_IRONLAKE(dev_priv)) {
+	if (display->platform.ironlake) {
 		/* ILK workaround: disable reset around power sequence */
 		pp &= ~PANEL_POWER_RESET;
 		intel_de_write(display, pp_ctrl_reg, pp);
@@ -994,7 +989,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 			     0, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
 
 	pp |= PANEL_POWER_ON;
-	if (!IS_IRONLAKE(dev_priv))
+	if (!display->platform.ironlake)
 		pp |= PANEL_POWER_RESET;
 
 	intel_de_write(display, pp_ctrl_reg, pp);
@@ -1007,7 +1002,7 @@ void intel_pps_on_unlocked(struct intel_dp *intel_dp)
 		intel_de_rmw(display, SOUTH_DSPCLK_GATE_D,
 			     PCH_DPLSUNIT_CLOCK_GATE_DISABLE, 0);
 
-	if (IS_IRONLAKE(dev_priv)) {
+	if (display->platform.ironlake) {
 		pp |= PANEL_POWER_RESET; /* restore panel reset bit */
 		intel_de_write(display, pp_ctrl_reg, pp);
 		intel_de_posting_read(display, pp_ctrl_reg);
@@ -1627,7 +1622,7 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
 
 	/* Haswell doesn't have any port selection bits for the panel
 	 * power sequencer any more. */
-	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+	if (display->platform.valleyview || display->platform.cherryview) {
 		port_sel = PANEL_PORT_SELECT_VLV(port);
 	} else if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)) {
 		switch (port) {
@@ -1674,7 +1669,6 @@ static void pps_init_registers(struct intel_dp *intel_dp, bool force_disable_vdd
 void intel_pps_encoder_reset(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	intel_wakeref_t wakeref;
 
 	if (!intel_dp_is_edp(intel_dp))
@@ -1685,7 +1679,7 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp)
 		 * Reinit the power sequencer also on the resume path, in case
 		 * BIOS did something nasty with it.
 		 */
-		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		if (display->platform.valleyview || display->platform.cherryview)
 			vlv_initial_power_sequencer_setup(intel_dp);
 
 		pps_init_delays(intel_dp);
@@ -1721,11 +1715,10 @@ bool intel_pps_init(struct intel_dp *intel_dp)
 static void pps_init_late(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
 	struct intel_connector *connector = intel_dp->attached_connector;
 
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+	if (display->platform.valleyview || display->platform.cherryview)
 		return;
 
 	if (intel_num_pps(display) < 2)
@@ -1783,9 +1776,9 @@ void intel_pps_setup(struct intel_display *display)
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (HAS_PCH_SPLIT(i915) || IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+	if (HAS_PCH_SPLIT(i915) || display->platform.geminilake || display->platform.broxton)
 		display->pps.mmio_base = PCH_PPS_BASE;
-	else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+	else if (display->platform.valleyview || display->platform.cherryview)
 		display->pps.mmio_base = VLV_PPS_BASE;
 	else
 		display->pps.mmio_base = PPS_BASE;
@@ -1857,7 +1850,7 @@ void assert_pps_unlocked(struct intel_display *display, enum pipe pipe)
 			MISSING_CASE(port_sel);
 			break;
 		}
-	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+	} else if (display->platform.valleyview || display->platform.cherryview) {
 		/* presumably write lock depends on pipe, not port select */
 		pp_reg = PP_CONTROL(display, pipe);
 		panel_pipe = pipe;
-- 
2.39.5

[PATCH v3 13/15] drm/i915/tv: use display->platform.<platform> instead of IS_<PLATFORM>()

[Jani Nikula]

Switch to using the new display->platform.<platform> members for
platform identification in display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tv.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index e40aff490486..bfd16054ca05 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1093,7 +1093,6 @@ intel_tv_get_config(struct intel_encoder *encoder,
 		    struct intel_crtc_state *pipe_config)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct drm_display_mode *adjusted_mode =
 		&pipe_config->hw.adjusted_mode;
 	struct drm_display_mode mode = {};
@@ -1167,7 +1166,7 @@ intel_tv_get_config(struct intel_encoder *encoder,
 		adjusted_mode->crtc_clock /= 2;
 
 	/* pixel counter doesn't work on i965gm TV output */
-	if (IS_I965GM(dev_priv))
+	if (display->platform.i965gm)
 		pipe_config->mode_flags |=
 			I915_MODE_FLAG_USE_SCANLINE_COUNTER;
 }
@@ -1197,7 +1196,6 @@ intel_tv_compute_config(struct intel_encoder *encoder,
 	struct intel_atomic_state *state =
 		to_intel_atomic_state(pipe_config->uapi.state);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_tv_connector_state *tv_conn_state =
 		to_intel_tv_connector_state(conn_state);
 	const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
@@ -1349,7 +1347,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
 	adjusted_mode->name[0] = '\0';
 
 	/* pixel counter doesn't work on i965gm TV output */
-	if (IS_I965GM(dev_priv))
+	if (display->platform.i965gm)
 		pipe_config->mode_flags |=
 			I915_MODE_FLAG_USE_SCANLINE_COUNTER;
 
@@ -1525,7 +1523,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
 		tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
 
 	/* Enable two fixes for the chips that need them. */
-	if (IS_I915GM(dev_priv))
+	if (display->platform.i915gm)
 		tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
 
 	set_tv_mode_timings(display, tv_mode, burst_ena);
@@ -1627,7 +1625,7 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
 	 * The TV sense state should be cleared to zero on cantiga platform. Otherwise
 	 * the TV is misdetected. This is hardware requirement.
 	 */
-	if (IS_GM45(dev_priv))
+	if (display->platform.gm45)
 		tv_dac &= ~(TVDAC_STATE_CHG_EN | TVDAC_A_SENSE_CTL |
 			    TVDAC_B_SENSE_CTL | TVDAC_C_SENSE_CTL);
 
-- 
2.39.5

[PATCH v3 14/15] drm/i915/vga: use display->platform.<platform> instead of IS_<PLATFORM>()

[Jani Nikula]

Switch to using the new display->platform.<platform> members for
platform identification in display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vga.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 2c76a0176a35..fd18dd07ae49 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -16,9 +16,7 @@
 
 static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+	if (display->platform.valleyview || display->platform.cherryview)
 		return VLV_VGACNTRL;
 	else if (DISPLAY_VER(display) >= 5)
 		return CPU_VGACNTRL;
-- 
2.39.5

[PATCH v3 15/15] drm/i915/vblank: use display->platform.<platform> instead of IS_<PLATFORM>()

[Jani Nikula]

Switch to using the new display->platform.<platform> members for
platform identification in display code.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vblank.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index d18b8292be49..a95fb3349eba 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -195,7 +195,6 @@ static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc)
 int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
 
 	/*
 	 * The scanline counter increments at the leading edge of hsync.
@@ -225,7 +224,7 @@ int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
 	 */
 	if (DISPLAY_VER(display) == 2)
 		return -1;
-	else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+	else if (HAS_DDI(display) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
 		return 2;
 	else
 		return 1;
@@ -327,14 +326,13 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
 				     const struct drm_display_mode *mode)
 {
 	struct intel_display *display = to_intel_display(_crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
 	enum pipe pipe = crtc->pipe;
 	int position;
 	int vbl_start, vbl_end, hsync_start, htotal, vtotal;
 	unsigned long irqflags;
 	bool use_scanline_counter = DISPLAY_VER(display) >= 5 ||
-		IS_G4X(dev_priv) || DISPLAY_VER(display) == 2 ||
+		display->platform.g4x || DISPLAY_VER(display) == 2 ||
 		crtc->mode_flags & I915_MODE_FLAG_USE_SCANLINE_COUNTER;
 
 	if (drm_WARN_ON(display->drm, !mode->crtc_clock)) {
@@ -603,14 +601,15 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
 			     const struct intel_crtc_state *new_crtc_state,
 			     struct intel_vblank_evade_ctx *evade)
 {
+	struct intel_display *display = to_intel_display(new_crtc_state);
 	struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
-	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	const struct intel_crtc_state *crtc_state;
 	const struct drm_display_mode *adjusted_mode;
 
 	evade->crtc = crtc;
 
-	evade->need_vlv_dsi_wa = (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) &&
+	evade->need_vlv_dsi_wa = (display->platform.valleyview ||
+				  display->platform.cherryview) &&
 		intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
 
 	/*
-- 
2.39.5

✗ Fi.CI.SPARSE: warning for drm/i915/display: platform identification with display->platform.<platform>

[Patchwork]

== Series Details ==

Series: drm/i915/display: platform identification with display->platform.<platform>
URL   : https://patchwork.freedesktop.org/series/139302/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/i915/display: platform identification with display->platform.<platform>

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 4485 bytes --]

== Series Details ==

Series: drm/i915/display: platform identification with display->platform.<platform>
URL   : https://patchwork.freedesktop.org/series/139302/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15461 -> Patchwork_139302v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/index.html

Participating hosts (42 -> 42)
------------------------------

  Additional (1): bat-dg2-13 
  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_139302v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-mtlp-6:         [PASS][1] -> [DMESG-WARN][2] ([i915#10341])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/bat-mtlp-6/igt@i915_selftest@live.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-mtlp-6/igt@i915_selftest@live.html

  * igt@i915_selftest@live@gt_heartbeat:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][3] ([i915#11637] / [i915#12133]) +8 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_tlb:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][4] ([i915#11637]) +21 other tests dmesg-warn
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_selftest@live@gt_tlb.html

  * igt@i915_selftest@live@hangcheck:
    - bat-mtlp-6:         [PASS][5] -> [DMESG-WARN][6] ([i915#11349])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@objects:
    - bat-arls-5:         NOTRUN -> [DMESG-WARN][7] ([i915#10341] / [i915#11637]) +2 other tests dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_selftest@live@objects.html

  * igt@kms_chamelium_hpd@dp-hpd-fast:
    - bat-dg2-13:         NOTRUN -> [SKIP][8] ([i915#7828]) +8 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-dg2-13/igt@kms_chamelium_hpd@dp-hpd-fast.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - bat-arls-5:         [DMESG-WARN][9] ([i915#11637] / [i915#1982]) -> [DMESG-WARN][10] ([i915#11637])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/bat-arls-5/igt@i915_module_load@reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_module_load@reload.html

  * igt@i915_selftest@live:
    - bat-arls-5:         [ABORT][11] ([i915#12061] / [i915#12133]) -> [DMESG-WARN][12] ([i915#10341] / [i915#12133])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/bat-arls-5/igt@i915_selftest@live.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_selftest@live.html

  * igt@i915_selftest@live@workarounds:
    - bat-arls-5:         [ABORT][13] ([i915#12061]) -> [DMESG-WARN][14] ([i915#10341] / [i915#11637])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/bat-arls-5/igt@i915_selftest@live@workarounds.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/bat-arls-5/igt@i915_selftest@live@workarounds.html

  
  [i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
  [i915#11349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11349
  [i915#11637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11637
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828


Build changes
-------------

  * Linux: CI_DRM_15461 -> Patchwork_139302v1

  CI-20190529: 20190529
  CI_DRM_15461: 4e4d7873ac763aa0bd9207ea9ec2b89bb52a6fe1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8043: 8043
  Patchwork_139302v1: 4e4d7873ac763aa0bd9207ea9ec2b89bb52a6fe1 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/index.html

[-- Attachment #2: Type: text/html, Size: 6134 bytes --]

✗ Fi.CI.IGT: failure for drm/i915/display: platform identification with display->platform.<platform>

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 100302 bytes --]

== Series Details ==

Series: drm/i915/display: platform identification with display->platform.<platform>
URL   : https://patchwork.freedesktop.org/series/139302/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15461_full -> Patchwork_139302v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_139302v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_139302v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): shard-glk-0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_139302v1_full:

### CI changes ###

#### Possible regressions ####

  * boot:
    - shard-glk:          ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44]) -> ([PASS][45], [PASS][46], [PASS][47], [PASS][48], [FAIL][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk5/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk5/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk5/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk5/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk2/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk2/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk2/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk2/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk9/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk9/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk9/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk8/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk8/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk7/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk7/boot.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk7/boot.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/boot.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/boot.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/boot.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk5/boot.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk5/boot.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk5/boot.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk4/boot.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk4/boot.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk4/boot.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk3/boot.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk3/boot.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk2/boot.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk2/boot.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk2/boot.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk1/boot.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk1/boot.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk1/boot.html

  

### IGT changes ###

#### Possible regressions ####

  * igt@drm_read@short-buffer-wakeup:
    - shard-glk:          NOTRUN -> [INCOMPLETE][70]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk1/igt@drm_read@short-buffer-wakeup.html

  * igt@gem_exec_fair@basic-sync@rcs0:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][71] +1 other test incomplete
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-5/igt@gem_exec_fair@basic-sync@rcs0.html

  * igt@gem_exec_whisper@basic-fds-all:
    - shard-mtlp:         NOTRUN -> [INCOMPLETE][72]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@gem_exec_whisper@basic-fds-all.html

  * igt@gem_exec_whisper@basic-fds-priority-all:
    - shard-rkl:          [PASS][73] -> [DMESG-WARN][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-rkl-7/igt@gem_exec_whisper@basic-fds-priority-all.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@gem_exec_whisper@basic-fds-priority-all.html

  * igt@i915_selftest@live@uncore:
    - shard-dg2:          [PASS][75] -> [ABORT][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-4/igt@i915_selftest@live@uncore.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@i915_selftest@live@uncore.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-mtlp:         NOTRUN -> [SKIP][77]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_flip@blocking-wf_vblank@a-hdmi-a4:
    - shard-dg1:          [PASS][78] -> [FAIL][79]
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/igt@kms_flip@blocking-wf_vblank@a-hdmi-a4.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/igt@kms_flip@blocking-wf_vblank@a-hdmi-a4.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1:
    - shard-mtlp:         [PASS][80] -> [FAIL][81]
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-edp1.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][82]
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-tglu:         NOTRUN -> [SKIP][83]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][84] +2 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-5/igt@kms_pm_backlight@brightness-with-dpms.html

  
#### Warnings ####

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-dg1:          [SKIP][85] ([i915#4423]) -> [SKIP][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_setmode@basic:
    - {shard-tglu-1}:     NOTRUN -> [FAIL][87] +2 other tests fail
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-1/igt@kms_setmode@basic.html

  
New tests
---------

  New tests have been introduced between CI_DRM_15461_full and Patchwork_139302v1_full:

### New IGT tests (1) ###

  * igt@kms_lease@lease-again@pipe-d-hdmi-a-2:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  

Known issues
------------

  Here are the changes found in Patchwork_139302v1_full that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - shard-dg1:          ([PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [FAIL][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111]) -> ([PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [PASS][131], [PASS][132], [PASS][133], [PASS][134], [PASS][135], [PASS][136])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-15/boot.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-12/boot.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-12/boot.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-12/boot.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-13/boot.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-13/boot.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/boot.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/boot.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/boot.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-15/boot.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-15/boot.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-16/boot.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-16/boot.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-16/boot.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-16/boot.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-17/boot.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-17/boot.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-17/boot.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-18/boot.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-18/boot.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-18/boot.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-19/boot.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-19/boot.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-19/boot.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-19/boot.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-19/boot.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-19/boot.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-19/boot.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/boot.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/boot.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/boot.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-17/boot.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-17/boot.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-17/boot.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/boot.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/boot.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/boot.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/boot.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/boot.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/boot.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/boot.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/boot.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/boot.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-13/boot.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-13/boot.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-13/boot.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/boot.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/boot.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - shard-tglu:         NOTRUN -> [SKIP][137] ([i915#9318])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@debugfs_test@basic-hwmon.html

  * igt@drm_fdinfo@busy@vcs1:
    - shard-dg1:          NOTRUN -> [SKIP][138] ([i915#8414]) +11 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@drm_fdinfo@busy@vcs1.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-tglu:         NOTRUN -> [SKIP][139] ([i915#9323])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-dg1:          NOTRUN -> [SKIP][140] ([i915#3555] / [i915#9323])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_ccs@suspend-resume:
    - shard-rkl:          NOTRUN -> [SKIP][141] ([i915#9323])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_ccs@suspend-resume.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][142] ([i915#7297])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-10/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#7697])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu:         NOTRUN -> [SKIP][144] ([i915#6335])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_ctx_engines@invalid-engines:
    - shard-tglu:         NOTRUN -> [FAIL][145] ([i915#12027])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@gem_ctx_engines@invalid-engines.html

  * igt@gem_ctx_persistence@smoketest:
    - shard-rkl:          [PASS][146] -> [FAIL][147] ([i915#11837])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-rkl-2/igt@gem_ctx_persistence@smoketest.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          NOTRUN -> [SKIP][148] ([i915#280])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-rkl:          NOTRUN -> [SKIP][149] ([i915#4525]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-tglu:         NOTRUN -> [FAIL][150] ([i915#6117])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-dg2:          NOTRUN -> [SKIP][151] ([i915#3539] / [i915#4852])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-rrul:
    - shard-mtlp:         NOTRUN -> [SKIP][152] ([i915#4473] / [i915#4771])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@gem_exec_fair@basic-none-rrul.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         NOTRUN -> [FAIL][153] ([i915#2842]) +9 other tests fail
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none@bcs0:
    - shard-rkl:          NOTRUN -> [FAIL][154] ([i915#2842]) +4 other tests fail
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@gem_exec_fair@basic-none@bcs0.html

  * igt@gem_exec_fair@basic-pace-solo:
    - shard-glk:          NOTRUN -> [FAIL][155] ([i915#2842]) +1 other test fail
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@gem_exec_fair@basic-pace-solo.html

  * igt@gem_exec_flush@basic-uc-pro-default:
    - shard-dg1:          NOTRUN -> [SKIP][156] ([i915#3539] / [i915#4852]) +2 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_exec_flush@basic-uc-pro-default.html

  * igt@gem_exec_reloc@basic-cpu-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#3281]) +1 other test skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-1/igt@gem_exec_reloc@basic-cpu-gtt.html
    - shard-dg1:          NOTRUN -> [SKIP][158] ([i915#3281]) +4 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gem_exec_reloc@basic-cpu-gtt.html
    - shard-mtlp:         NOTRUN -> [SKIP][159] ([i915#3281])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@gem_exec_reloc@basic-cpu-gtt.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][160] ([i915#3281]) +9 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_schedule@preempt-queue:
    - shard-dg2:          NOTRUN -> [SKIP][161] ([i915#4537] / [i915#4812])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_exec_schedule@preempt-queue.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-snb:          NOTRUN -> [SKIP][162] +14 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb2/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-dg1:          NOTRUN -> [SKIP][163] ([i915#4860])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][164] ([i915#4860])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-rkl:          NOTRUN -> [SKIP][165] ([i915#4613]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][166] ([i915#12193])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gem_lmem_swapping@verify-random-ccs.html
    - shard-tglu:         NOTRUN -> [SKIP][167] ([i915#4613]) +4 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][168] ([i915#4565])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gem_lmem_swapping@verify-random-ccs@lmem0.html

  * igt@gem_media_fill@media-fill:
    - shard-mtlp:         NOTRUN -> [SKIP][169] ([i915#8289])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@gem_media_fill@media-fill.html

  * igt@gem_mmap_gtt@basic-small-copy-odd:
    - shard-dg1:          NOTRUN -> [SKIP][170] ([i915#4077]) +2 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gem_mmap_gtt@basic-small-copy-odd.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-dg1:          NOTRUN -> [SKIP][171] ([i915#4083])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
    - shard-dg1:          NOTRUN -> [SKIP][172] ([i915#3282]) +3 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html

  * igt@gem_pread@exhaustion:
    - shard-dg2:          NOTRUN -> [SKIP][173] ([i915#3282])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_pread@exhaustion.html

  * igt@gem_pwrite@basic-random:
    - shard-rkl:          NOTRUN -> [SKIP][174] ([i915#3282]) +4 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@gem_pwrite@basic-random.html

  * igt@gem_pxp@protected-raw-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [SKIP][175] ([i915#4270]) +2 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_pxp@protected-raw-src-copy-not-readible.html
    - shard-mtlp:         NOTRUN -> [SKIP][176] ([i915#4270])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@gem_pxp@protected-raw-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-tglu:         NOTRUN -> [SKIP][177] ([i915#4270]) +1 other test skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][178] ([i915#5190] / [i915#8428])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          NOTRUN -> [SKIP][179] ([i915#8411])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
    - shard-mtlp:         NOTRUN -> [SKIP][180] ([i915#4079])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap:
    - shard-dg1:          NOTRUN -> [SKIP][181] ([i915#3297] / [i915#4880])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gem_userptr_blits@map-fixed-invalidate-overlap.html

  * igt@gem_userptr_blits@readonly-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#3297])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_userptr_blits@readonly-unsync.html

  * igt@gem_userptr_blits@relocations:
    - shard-dg1:          NOTRUN -> [SKIP][183] ([i915#3281] / [i915#3297])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-tglu:         NOTRUN -> [SKIP][184] ([i915#3297]) +2 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#2527]) +3 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@gen9_exec_parse@shadow-peek.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglu:         NOTRUN -> [SKIP][186] ([i915#2527] / [i915#2856]) +2 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@gen9_exec_parse@unaligned-jump.html
    - shard-mtlp:         NOTRUN -> [SKIP][187] ([i915#2856])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@gen9_exec_parse@unaligned-jump.html
    - shard-dg2:          NOTRUN -> [SKIP][188] ([i915#2856])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-1/igt@gen9_exec_parse@unaligned-jump.html
    - shard-dg1:          NOTRUN -> [SKIP][189] ([i915#2527])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-glk:          ([PASS][190], [PASS][191]) -> [ABORT][192] ([i915#9820])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/igt@i915_module_load@reload-with-fault-injection.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk5/igt@i915_module_load@reload-with-fault-injection.html
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk5/igt@i915_module_load@reload-with-fault-injection.html
    - shard-dg2:          [PASS][193] -> [ABORT][194] ([i915#9820])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-6/igt@i915_module_load@reload-with-fault-injection.html
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@i915_module_load@reload-with-fault-injection.html
    - shard-rkl:          [PASS][195] -> [ABORT][196] ([i915#9820])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-rkl-2/igt@i915_module_load@reload-with-fault-injection.html
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-5/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         [PASS][197] -> [ABORT][198] ([i915#10131] / [i915#9820])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-6/igt@i915_module_load@reload-with-fault-injection.html
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#8399])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_selftest@mock:
    - shard-tglu:         NOTRUN -> [DMESG-WARN][200] ([i915#9311]) +1 other test dmesg-warn
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@i915_selftest@mock.html

  * igt@i915_selftest@mock@memory_region:
    - shard-dg1:          NOTRUN -> [DMESG-WARN][201] ([i915#9311]) +1 other test dmesg-warn
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@i915_selftest@mock@memory_region.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          NOTRUN -> [SKIP][202] ([i915#7707])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@intel_hwmon@hwmon-read.html

  * igt@intel_hwmon@hwmon-write:
    - shard-tglu:         NOTRUN -> [SKIP][203] ([i915#7707])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-legacy:
    - shard-dg2:          [PASS][204] -> [INCOMPLETE][205] ([i915#2295])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_addfb_basic@addfb25-y-tiled-legacy.html
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-legacy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-glk:          NOTRUN -> [SKIP][206] ([i915#1769])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3:
    - shard-dg2:          [PASS][207] -> [FAIL][208] ([i915#5956]) +1 other test fail
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-1/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3.html
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][209] ([i915#5286]) +3 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][210] ([i915#5286]) +5 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-dg1:          NOTRUN -> [SKIP][211] ([i915#4538] / [i915#5286]) +3 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][212] ([i915#4538] / [i915#5190]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][213] ([i915#3638]) +2 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
    - shard-mtlp:         NOTRUN -> [SKIP][214] +1 other test skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][215] ([i915#3638]) +2 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
    - shard-dg1:          NOTRUN -> [SKIP][216] ([i915#4538]) +2 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][217] ([i915#5190])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][218] ([i915#6095]) +111 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][219] ([i915#10307] / [i915#6095]) +128 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-3/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-d-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][220] ([i915#12313]) +5 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][221] ([i915#12313]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][222] ([i915#12313])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][223] ([i915#6095]) +74 other tests skip
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][224] ([i915#6095]) +4 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][225] ([i915#6095]) +34 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][226] ([i915#12313])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][227] ([i915#12313]) +1 other test skip
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][228] ([i915#10307] / [i915#10434] / [i915#6095])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-4/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-rkl:          NOTRUN -> [SKIP][229] ([i915#3742])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][230] ([i915#7213]) +3 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-1/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][231] ([i915#4087]) +3 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-3/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-tglu:         NOTRUN -> [SKIP][232] ([i915#7828]) +8 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-dg1:          NOTRUN -> [SKIP][233] ([i915#7828]) +5 other tests skip
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@vga-hpd:
    - shard-mtlp:         NOTRUN -> [SKIP][234] ([i915#7828])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_chamelium_hpd@vga-hpd.html
    - shard-dg2:          NOTRUN -> [SKIP][235] ([i915#7828])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-1/igt@kms_chamelium_hpd@vga-hpd.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#7828]) +5 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_chamelium_hpd@vga-hpd-fast.html

  * igt@kms_content_protection@atomic:
    - shard-tglu:         NOTRUN -> [SKIP][237] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424]) +1 other test skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-tglu:         NOTRUN -> [SKIP][238] ([i915#3116] / [i915#3299]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][239] ([i915#3116])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg1:          NOTRUN -> [SKIP][240] ([i915#3299]) +1 other test skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-rkl:          NOTRUN -> [SKIP][241] ([i915#9424]) +1 other test skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-dg1:          NOTRUN -> [SKIP][242] ([i915#3555]) +1 other test skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-tglu:         NOTRUN -> [SKIP][243] ([i915#11453]) +1 other test skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][244] ([i915#11453])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-tglu:         NOTRUN -> [SKIP][245] ([i915#3555]) +6 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#11453])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@kms_cursor_crc@cursor-sliding-512x512.html
    - shard-dg1:          NOTRUN -> [SKIP][247] ([i915#11453]) +1 other test skip
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-rkl:          NOTRUN -> [SKIP][248] ([i915#3555]) +4 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - shard-rkl:          NOTRUN -> [SKIP][249] ([i915#4103])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][250] +12 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-dg2:          NOTRUN -> [SKIP][251] ([i915#5354]) +7 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-glk:          ([PASS][252], [PASS][253]) -> [FAIL][254] ([i915#2346])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-tglu:         NOTRUN -> [SKIP][255] ([i915#4103])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-rkl:          NOTRUN -> [SKIP][256] ([i915#8588])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-rkl:          NOTRUN -> [SKIP][257] ([i915#3555] / [i915#3804])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][258] ([i915#3804])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dp_aux_dev:
    - shard-dg1:          NOTRUN -> [SKIP][259] ([i915#1257])
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_dp_aux_dev.html
    - shard-tglu:         NOTRUN -> [SKIP][260] ([i915#1257])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_dp_aux_dev.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-tglu:         NOTRUN -> [SKIP][261] ([i915#3840])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_dsc@dsc-fractional-bpp.html
    - shard-mtlp:         NOTRUN -> [SKIP][262] ([i915#3840] / [i915#9688])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][263] ([i915#3955])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-tglu:         NOTRUN -> [SKIP][264] ([i915#2065] / [i915#4854])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-2x:
    - shard-dg1:          NOTRUN -> [SKIP][265] ([i915#1839])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@display-3x:
    - shard-rkl:          NOTRUN -> [SKIP][266] ([i915#1839]) +1 other test skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-tglu:         NOTRUN -> [SKIP][267] ([i915#9337])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][268] ([i915#4881])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][269] ([i915#3637]) +4 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-dg2:          NOTRUN -> [SKIP][270] +3 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
    - shard-mtlp:         NOTRUN -> [SKIP][271] ([i915#3637])
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][272] -> [FAIL][273] ([i915#2122]) +7 other tests fail
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-snb4/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-vga1-hdmi-a1.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb7/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ac-hdmi-a1-hdmi-a2:
    - shard-glk:          ([PASS][274], [PASS][275]) -> [FAIL][276] ([i915#2122]) +1 other test fail
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk2/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@blocking-wf_vblank@a-hdmi-a2:
    - shard-rkl:          NOTRUN -> [FAIL][277] ([i915#11961])
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-5/igt@kms_flip@blocking-wf_vblank@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
    - shard-dg1:          [PASS][278] -> [FAIL][279] ([i915#2122]) +4 other tests fail
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-12/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
    - shard-mtlp:         [PASS][280] -> [FAIL][281] ([i915#2122]) +1 other test fail
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a4:
    - shard-dg1:          NOTRUN -> [FAIL][282] ([i915#2122]) +1 other test fail
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a4.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1:
    - shard-mtlp:         [PASS][283] -> [FAIL][284] ([i915#12138])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-6/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@d-hdmi-a2:
    - shard-dg2:          NOTRUN -> [FAIL][285] ([i915#2122]) +2 other tests fail
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@d-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2:
    - shard-glk:          [PASS][286] -> [INCOMPLETE][287] ([i915#4839])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk3/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-wf_vblank-interruptible:
    - shard-dg2:          [PASS][288] -> [SKIP][289] ([i915#5354]) +2 other tests skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_flip@flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-tglu:         NOTRUN -> [FAIL][290] ([i915#2122]) +2 other tests fail
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-dg1:          NOTRUN -> [SKIP][291] ([i915#2672] / [i915#3555]) +2 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
    - shard-dg2:          [PASS][292] -> [SKIP][293] ([i915#3555]) +1 other test skip
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][294] ([i915#2672] / [i915#3555] / [i915#8813])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
    - shard-dg2:          NOTRUN -> [SKIP][295] ([i915#2672] / [i915#3555])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][296] ([i915#2672])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][297] ([i915#2672]) +4 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][298] ([i915#2587] / [i915#2672]) +2 other tests skip
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][299] ([i915#2672] / [i915#3555]) +3 other tests skip
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-tglu:         NOTRUN -> [SKIP][300] ([i915#2587] / [i915#2672] / [i915#3555])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][301] ([i915#2587] / [i915#2672]) +4 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-rkl:          NOTRUN -> [SKIP][302] ([i915#2672] / [i915#3555]) +1 other test skip
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][303] ([i915#2672]) +1 other test skip
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render:
    - shard-snb:          [PASS][304] -> [SKIP][305] +1 other test skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][306] +16 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html
    - shard-mtlp:         NOTRUN -> [SKIP][307] ([i915#1825]) +2 other tests skip
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][308] ([i915#8708]) +10 other tests skip
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][309] ([i915#8708]) +2 other tests skip
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
    - shard-rkl:          NOTRUN -> [SKIP][310] ([i915#1825]) +24 other tests skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][311] ([i915#8708])
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
    - shard-tglu:         NOTRUN -> [SKIP][312] +73 other tests skip
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
    - shard-dg1:          NOTRUN -> [SKIP][313] ([i915#3458]) +5 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][314] ([i915#3023]) +17 other tests skip
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][315] ([i915#5439])
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-mtlp:         NOTRUN -> [SKIP][316] ([i915#10055])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-dg2:          NOTRUN -> [SKIP][317] ([i915#9766])
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-rte:
    - shard-dg2:          NOTRUN -> [SKIP][318] ([i915#3458]) +1 other test skip
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-rte.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][319] ([i915#3555] / [i915#8228]) +1 other test skip
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg1:          NOTRUN -> [SKIP][320] ([i915#3555] / [i915#8228])
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][321] ([i915#3555] / [i915#8228])
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_hdr@static-toggle.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-rkl:          NOTRUN -> [SKIP][322] ([i915#6301])
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_alpha_blend@alpha-basic:
    - shard-glk:          NOTRUN -> [FAIL][323] ([i915#12178])
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_plane_alpha_blend@alpha-basic.html

  * igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][324] ([i915#7862]) +1 other test fail
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_plane_alpha_blend@alpha-basic@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][325] ([i915#8292]) +1 other test fail
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b:
    - shard-rkl:          NOTRUN -> [SKIP][326] ([i915#12247]) +5 other tests skip
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers:
    - shard-dg2:          [PASS][327] -> [SKIP][328] ([i915#8152] / [i915#9423])
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers@pipe-d:
    - shard-dg2:          [PASS][329] -> [SKIP][330] ([i915#8152])
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers@pipe-d.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-modifiers@pipe-d.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b:
    - shard-mtlp:         NOTRUN -> [SKIP][331] ([i915#12247]) +1 other test skip
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-tglu:         NOTRUN -> [SKIP][332] ([i915#12247] / [i915#3555] / [i915#6953])
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-tglu:         NOTRUN -> [SKIP][333] ([i915#12247]) +8 other tests skip
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
    - shard-dg1:          NOTRUN -> [SKIP][334] ([i915#12247] / [i915#6953])
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b:
    - shard-dg1:          NOTRUN -> [SKIP][335] ([i915#12247]) +3 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
    - shard-dg2:          [PASS][336] -> [SKIP][337] ([i915#12247] / [i915#3555] / [i915#6953] / [i915#8152] / [i915#9423])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-c:
    - shard-dg2:          [PASS][338] -> [SKIP][339] ([i915#12247]) +5 other tests skip
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-c.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-d:
    - shard-dg2:          [PASS][340] -> [SKIP][341] ([i915#12247] / [i915#8152])
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-d.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-d.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-tglu:         NOTRUN -> [SKIP][342] ([i915#9812])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][343] ([i915#5354])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-tglu:         NOTRUN -> [SKIP][344] ([i915#9685]) +1 other test skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-rkl:          NOTRUN -> [SKIP][345] ([i915#9685]) +1 other test skip
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [PASS][346] -> [SKIP][347] ([i915#9519]) +1 other test skip
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-rkl-7/igt@kms_pm_rpm@dpms-lpsp.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@drm-resources-equal:
    - shard-dg2:          [PASS][348] -> [SKIP][349] ([i915#3547])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_pm_rpm@drm-resources-equal.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_pm_rpm@drm-resources-equal.html

  * igt@kms_pm_rpm@fences-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][350] ([i915#4077]) +7 other tests skip
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_pm_rpm@fences-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg1:          NOTRUN -> [SKIP][351] ([i915#9519])
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg2:          [PASS][352] -> [SKIP][353] ([i915#9519]) +1 other test skip
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-tglu:         NOTRUN -> [SKIP][354] ([i915#9519])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
    - shard-mtlp:         NOTRUN -> [SKIP][355] ([i915#9519])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-tglu:         NOTRUN -> [SKIP][356] ([i915#6524])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@d3hot:
    - shard-rkl:          NOTRUN -> [SKIP][357] ([i915#6524])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_prime@d3hot.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf:
    - shard-dg2:          NOTRUN -> [SKIP][358] ([i915#11520]) +1 other test skip
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-glk:          NOTRUN -> [SKIP][359] ([i915#11520]) +2 other tests skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
    - shard-tglu:         NOTRUN -> [SKIP][360] ([i915#11520]) +4 other tests skip
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][361] ([i915#11520]) +6 other tests skip
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-dg1:          NOTRUN -> [SKIP][362] ([i915#11520]) +2 other tests skip
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg1:          NOTRUN -> [SKIP][363] ([i915#9683])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglu:         NOTRUN -> [SKIP][364] ([i915#9683]) +2 other tests skip
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-cursor-plane-onoff:
    - shard-tglu:         NOTRUN -> [SKIP][365] ([i915#9732]) +15 other tests skip
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_psr@fbc-psr-cursor-plane-onoff.html

  * igt@kms_psr@fbc-psr2-dpms:
    - shard-mtlp:         NOTRUN -> [SKIP][366] ([i915#9688]) +1 other test skip
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_psr@fbc-psr2-dpms.html

  * igt@kms_psr@psr-cursor-plane-onoff:
    - shard-dg1:          NOTRUN -> [SKIP][367] ([i915#1072] / [i915#9732]) +7 other tests skip
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_psr@psr-cursor-plane-onoff.html

  * igt@kms_psr@psr-cursor-render:
    - shard-rkl:          NOTRUN -> [SKIP][368] ([i915#1072] / [i915#9732]) +14 other tests skip
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_psr@psr-cursor-render.html

  * igt@kms_psr@psr-no-drrs:
    - shard-glk:          NOTRUN -> [SKIP][369] +50 other tests skip
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_psr@psr-no-drrs.html

  * igt@kms_psr@psr-primary-render:
    - shard-dg2:          NOTRUN -> [SKIP][370] ([i915#1072] / [i915#9732]) +3 other tests skip
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_psr@psr-primary-render.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-dg2:          NOTRUN -> [SKIP][371] ([i915#9685])
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-dg2:          NOTRUN -> [SKIP][372] ([i915#11131])
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][373] ([i915#12231]) +1 other test abort
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-6/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_sysfs_edid_timing:
    - shard-dg2:          [PASS][374] -> [FAIL][375] ([IGT#2])
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_sysfs_edid_timing.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_sysfs_edid_timing.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-tglu:         NOTRUN -> [SKIP][376] ([i915#8623])
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-mtlp:         [PASS][377] -> [FAIL][378] ([i915#9196]) +1 other test fail
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-8/igt@kms_universal_plane@cursor-fb-leak.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-dg2:          [PASS][379] -> [SKIP][380] ([i915#9197]) +18 other tests skip
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-6/igt@kms_vblank@ts-continuation-dpms-suspend.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_vblank@ts-continuation-dpms-suspend.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-tglu:         NOTRUN -> [SKIP][381] ([i915#9906])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@negative-basic:
    - shard-dg1:          NOTRUN -> [SKIP][382] ([i915#3555] / [i915#9906])
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_vrr@negative-basic.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-rkl:          NOTRUN -> [SKIP][383] ([i915#2437] / [i915#9412])
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-dg1:          NOTRUN -> [SKIP][384] ([i915#2437])
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-14/igt@kms_writeback@writeback-fb-id.html
    - shard-tglu:         NOTRUN -> [SKIP][385] ([i915#2437])
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-dg1:          NOTRUN -> [SKIP][386] ([i915#2437] / [i915#9412])
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf@per-context-mode-unprivileged:
    - shard-dg1:          NOTRUN -> [SKIP][387] ([i915#2433])
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-16/igt@perf@per-context-mode-unprivileged.html

  * igt@perf@unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][388] ([i915#2433])
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@perf@unprivileged-single-ctx-counters.html

  * igt@perf_pmu@cpu-hotplug:
    - shard-tglu:         NOTRUN -> [SKIP][389] ([i915#8850])
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@perf_pmu@cpu-hotplug.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-tglu:         NOTRUN -> [SKIP][390] ([i915#8516])
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@basic-fence-read:
    - shard-dg2:          NOTRUN -> [SKIP][391] ([i915#3291] / [i915#3708])
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-write:
    - shard-rkl:          NOTRUN -> [SKIP][392] ([i915#3291] / [i915#3708])
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@prime_vgem@basic-write.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-rkl:          NOTRUN -> [SKIP][393] ([i915#3708])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@prime_vgem@fence-flip-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-tglu:         NOTRUN -> [SKIP][394] ([i915#9917])
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-6/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-rkl:          NOTRUN -> [SKIP][395] ([i915#9917])
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-2/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@syncobj_wait@invalid-wait-zero-handles:
    - shard-dg2:          NOTRUN -> [FAIL][396] ([i915#9781])
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@syncobj_wait@invalid-wait-zero-handles.html

  
#### Possible fixes ####

  * igt@fbdev@pan:
    - shard-dg2:          [SKIP][397] ([i915#2582]) -> [PASS][398]
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@fbdev@pan.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@fbdev@pan.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
    - shard-dg2:          [INCOMPLETE][399] ([i915#7297]) -> [PASS][400]
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-10/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          [ABORT][401] ([i915#10030] / [i915#7975] / [i915#8213]) -> [PASS][402]
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@gem_eio@hibernate.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@gem_eio@hibernate.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglu:         [FAIL][403] ([i915#2842]) -> [PASS][404] +1 other test pass
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-tglu-6/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          ([PASS][405], [ABORT][406]) ([i915#5566]) -> [PASS][407]
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk1/igt@gen9_exec_parse@allowed-all.html
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/igt@gen9_exec_parse@allowed-all.html
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk4/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [ABORT][408] ([i915#5566]) -> [PASS][409]
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk8/igt@gen9_exec_parse@allowed-single.html
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-tglu:         [ABORT][410] ([i915#9820]) -> [PASS][411]
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-mtlp:         [INCOMPLETE][412] -> [PASS][413] +1 other test pass
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-1/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_atomic_interruptible@atomic-setmode:
    - shard-dg2:          [SKIP][414] ([i915#9197]) -> [PASS][415] +21 other tests pass
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_atomic_interruptible@atomic-setmode.html
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_atomic_interruptible@atomic-setmode.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-mtlp:         [FAIL][416] ([i915#5138]) -> [PASS][417] +1 other test pass
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-5/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-3/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@linear-64bpp-rotate-0:
    - shard-dg1:          [FAIL][418] ([i915#5138]) -> [PASS][419] +1 other test pass
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-12/igt@kms_big_fb@linear-64bpp-rotate-0.html
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-15/igt@kms_big_fb@linear-64bpp-rotate-0.html

  * igt@kms_cursor_crc@cursor-onscreen-128x128:
    - shard-dg1:          [DMESG-WARN][420] ([i915#4423]) -> [PASS][421] +1 other test pass
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg1-14/igt@kms_cursor_crc@cursor-onscreen-128x128.html
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg1-18/igt@kms_cursor_crc@cursor-onscreen-128x128.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-snb:          [SKIP][422] -> [PASS][423] +7 other tests pass
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-snb4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          ([FAIL][424], [PASS][425]) ([i915#2346]) -> [PASS][426]
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-snb:          [FAIL][427] -> [PASS][428]
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-snb6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_fb_coherency@memset-crc:
    - shard-dg2:          [SKIP][429] -> [PASS][430]
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_fb_coherency@memset-crc.html
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_fb_coherency@memset-crc.html

  * igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          ([FAIL][431], [PASS][432]) -> [PASS][433] +2 other tests pass
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk3/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk3/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2:
    - shard-glk:          ([PASS][434], [FAIL][435]) ([i915#2122]) -> [PASS][436] +5 other tests pass
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk6/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk9/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk6/igt@kms_flip@2x-plain-flip-ts-check@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@blocking-wf_vblank@b-hdmi-a1:
    - shard-snb:          [FAIL][437] ([i915#2122]) -> [PASS][438] +4 other tests pass
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-snb2/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-snb5/igt@kms_flip@blocking-wf_vblank@b-hdmi-a1.html

  * igt@kms_flip@blocking-wf_vblank@c-hdmi-a1:
    - shard-tglu:         [FAIL][439] ([i915#2122]) -> [PASS][440] +5 other tests pass
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-tglu-7/igt@kms_flip@blocking-wf_vblank@c-hdmi-a1.html
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-tglu-2/igt@kms_flip@blocking-wf_vblank@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a2:
    - shard-glk:          [INCOMPLETE][441] ([i915#4839]) -> [PASS][442] +1 other test pass
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-glk4/igt@kms_flip@flip-vs-suspend@b-hdmi-a2.html
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-glk1/igt@kms_flip@flip-vs-suspend@b-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-mtlp:         [FAIL][443] ([i915#2122]) -> [PASS][444] +2 other tests pass
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-8/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-5/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
    - shard-dg2:          [SKIP][445] ([i915#5354]) -> [PASS][446] +5 other tests pass
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2:          [FAIL][447] ([i915#6880]) -> [PASS][448] +1 other test pass
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_invalid_mode@bad-vtotal:
    - shard-dg2:          [SKIP][449] ([i915#3555]) -> [PASS][450]
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_invalid_mode@bad-vtotal.html
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_invalid_mode@bad-vtotal.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb:
    - shard-dg2:          [SKIP][451] ([i915#7294]) -> [PASS][452]
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_plane_alpha_blend@alpha-transparent-fb.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-dg2:          [SKIP][453] ([i915#3555] / [i915#8152] / [i915#9423]) -> [PASS][454]
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75:
    - shard-dg2:          [SKIP][455] ([i915#3555] / [i915#6953] / [i915#8152] / [i915#9423]) -> [PASS][456]
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75.html
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-c:
    - shard-dg2:          [SKIP][457] ([i915#12247]) -> [PASS][458] +5 other tests pass
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-c.html
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-c.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-d:
    - shard-dg2:          [SKIP][459] ([i915#12247] / [i915#8152]) -> [PASS][460] +1 other test pass
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-d.html
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-75@pipe-d.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-dg2:          [FAIL][461] ([i915#7330]) -> [PASS][462]
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_pm_dc@dc9-dpms.html
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          [SKIP][463] ([i915#9519]) -> [PASS][464] +1 other test pass
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-rkl-3/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress:
    - shard-dg2:          [SKIP][465] ([i915#9519]) -> [PASS][466]
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress.html

  * igt@kms_properties@plane-properties-legacy:
    - shard-dg2:          [SKIP][467] ([i915#11521]) -> [PASS][468]
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_properties@plane-properties-legacy.html
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_properties@plane-properties-legacy.html

  * igt@kms_vrr@negative-basic:
    - shard-mtlp:         [FAIL][469] ([i915#10393]) -> [PASS][470] +1 other test pass
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-8/igt@kms_vrr@negative-basic.html
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-2/igt@kms_vrr@negative-basic.html

  
#### Warnings ####

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-dg2:          [SKIP][471] ([i915#9197]) -> [SKIP][472] +1 other test skip
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-dg2:          [SKIP][473] ([i915#4538] / [i915#5190]) -> [SKIP][474] ([i915#5190] / [i915#9197]) +2 other tests skip
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-6/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-dg2:          [SKIP][475] ([i915#5190]) -> [SKIP][476] ([i915#5190] / [i915#9197])
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_big_fb@y-tiled-addfb.html
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-dg2:          [SKIP][477] ([i915#5190] / [i915#9197]) -> [SKIP][478] ([i915#4538] / [i915#5190]) +4 other tests skip
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
    - shard-dg2:          [SKIP][479] ([i915#10307] / [i915#6095]) -> [SKIP][480] ([i915#9197])
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs:
    - shard-dg2:          [SKIP][481] ([i915#9197]) -> [SKIP][482] ([i915#10307] / [i915#6095]) +4 other tests skip
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs.html
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs.html

  * igt@kms_chamelium_hpd@hdmi-hpd-after-suspend:
    - shard-mtlp:         [INCOMPLETE][483] ([i915#2295]) -> [SKIP][484] ([i915#7828])
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-mtlp-2/igt@kms_chamelium_hpd@hdmi-hpd-after-suspend.html
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-mtlp-6/igt@kms_chamelium_hpd@hdmi-hpd-after-suspend.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-dg2:          [SKIP][485] ([i915#3299]) -> [SKIP][486] ([i915#9197])
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_content_protection@dp-mst-lic-type-1.html
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-dg2:          [SKIP][487] ([i915#3555]) -> [SKIP][488] ([i915#9197])
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_cursor_crc@cursor-onscreen-32x10.html
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-dg2:          [SKIP][489] ([i915#9197]) -> [SKIP][490] ([i915#11453])
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
    - shard-dg2:          [SKIP][491] ([i915#9197]) -> [SKIP][492] ([i915#5354]) +1 other test skip
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-11/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-dg2:          [SKIP][493] ([i915#5354]) -> [SKIP][494] ([i915#9197])
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-dg2:          [SKIP][495] ([i915#9197]) -> [SKIP][496] ([i915#3555] / [i915#3840])
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-2/igt@kms_dsc@dsc-with-formats.html
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-8/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-dg2:          [SKIP][497] ([i915#3555] / [i915#3840]) -> [SKIP][498] ([i915#9197])
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15461/shard-dg2-11/igt@kms_dsc@dsc-with-output-formats.html
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/shard-dg2-2/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_flip@2x-flip-vs-wf_vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          ([PASS][499], [FAIL][500]) -> [FAIL][501] ([i915#2122]) +1 other test fail
   [499]: https://intel-gfx-ci.01.org/tree/drm-

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139302v1/index.html

[-- Attachment #2: Type: text/html, Size: 109605 bytes --]

Re: [PATCH v3 01/15] drm/i915/display: reindent subplatform initialization

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:02PM +0300, Jani Nikula wrote:
> Make the subplatform initialization less cramped, and follow the coding
> style more closely. Initialize .pciidlist using designated initializers.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  .../drm/i915/display/intel_display_device.c   | 116 +++++++++++++-----
>  1 file changed, 88 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index f33062322c66..93c751fde1a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -497,8 +497,14 @@ static const u16 hsw_ulx_ids[] = {
>  static const struct platform_desc hsw_desc = {
>  	PLATFORM(HASWELL),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_HASWELL_ULT, "ULT", hsw_ult_ids },
> -		{ INTEL_DISPLAY_HASWELL_ULX, "ULX", hsw_ulx_ids },
> +		{
> +			INTEL_DISPLAY_HASWELL_ULT, "ULT",
> +			.pciidlist = hsw_ult_ids,
> +		},
> +		{
> +			INTEL_DISPLAY_HASWELL_ULX, "ULX",
> +			.pciidlist = hsw_ulx_ids,
> +		},
>  		{},
>  	},
>  	.info = &(const struct intel_display_device_info) {
> @@ -541,8 +547,14 @@ static const u16 bdw_ulx_ids[] = {
>  static const struct platform_desc bdw_desc = {
>  	PLATFORM(BROADWELL),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_BROADWELL_ULT, "ULT", bdw_ult_ids },
> -		{ INTEL_DISPLAY_BROADWELL_ULX, "ULX", bdw_ulx_ids },
> +		{
> +			INTEL_DISPLAY_BROADWELL_ULT, "ULT",
> +			.pciidlist = bdw_ult_ids,
> +		},
> +		{
> +			INTEL_DISPLAY_BROADWELL_ULX, "ULX",
> +			.pciidlist = bdw_ulx_ids,
> +		},
>  		{},
>  	},
>  	.info = &(const struct intel_display_device_info) {
> @@ -632,8 +644,14 @@ static const enum intel_step skl_steppings[] = {
>  static const struct platform_desc skl_desc = {
>  	PLATFORM(SKYLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_SKYLAKE_ULT, "ULT", skl_ult_ids },
> -		{ INTEL_DISPLAY_SKYLAKE_ULX, "ULX", skl_ulx_ids },
> +		{
> +			INTEL_DISPLAY_SKYLAKE_ULT, "ULT",
> +			.pciidlist = skl_ult_ids,
> +		},
> +		{
> +			INTEL_DISPLAY_SKYLAKE_ULX, "ULX",
> +			.pciidlist = skl_ulx_ids,
> +		},
>  		{},
>  	},
>  	.info = &skl_display,
> @@ -667,8 +685,14 @@ static const enum intel_step kbl_steppings[] = {
>  static const struct platform_desc kbl_desc = {
>  	PLATFORM(KABYLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_KABYLAKE_ULT, "ULT", kbl_ult_ids },
> -		{ INTEL_DISPLAY_KABYLAKE_ULX, "ULX", kbl_ulx_ids },
> +		{
> +			INTEL_DISPLAY_KABYLAKE_ULT, "ULT",
> +			.pciidlist = kbl_ult_ids,
> +		},
> +		{
> +			INTEL_DISPLAY_KABYLAKE_ULX, "ULX",
> +			.pciidlist = kbl_ulx_ids,
> +		},
>  		{},
>  	},
>  	.info = &skl_display,
> @@ -692,8 +716,14 @@ static const u16 cfl_ulx_ids[] = {
>  static const struct platform_desc cfl_desc = {
>  	PLATFORM(COFFEELAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_COFFEELAKE_ULT, "ULT", cfl_ult_ids },
> -		{ INTEL_DISPLAY_COFFEELAKE_ULX, "ULX", cfl_ulx_ids },
> +		{
> +			INTEL_DISPLAY_COFFEELAKE_ULT, "ULT",
> +			.pciidlist = cfl_ult_ids,
> +		},
> +		{
> +			INTEL_DISPLAY_COFFEELAKE_ULX, "ULX",
> +			.pciidlist = cfl_ulx_ids,
> +		},
>  		{},
>  	},
>  	.info = &skl_display,
> @@ -708,7 +738,10 @@ static const u16 cml_ult_ids[] = {
>  static const struct platform_desc cml_desc = {
>  	PLATFORM(COMETLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_COMETLAKE_ULT, "ULT", cml_ult_ids },
> +		{
> +			INTEL_DISPLAY_COMETLAKE_ULT, "ULT",
> +			.pciidlist = cml_ult_ids,
> +		},
>  		{},
>  	},
>  	.info = &skl_display,
> @@ -824,7 +857,10 @@ static const enum intel_step icl_steppings[] = {
>  static const struct platform_desc icl_desc = {
>  	PLATFORM(ICELAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_ICELAKE_PORT_F, "Port F", icl_port_f_ids },
> +		{
> +			INTEL_DISPLAY_ICELAKE_PORT_F, "Port F",
> +			.pciidlist = icl_port_f_ids,
> +		},
>  		{},
>  	},
>  	.info = &(const struct intel_display_device_info) {
> @@ -921,8 +957,11 @@ static const enum intel_step tgl_uy_steppings[] = {
>  static const struct platform_desc tgl_desc = {
>  	PLATFORM(TIGERLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_TIGERLAKE_UY, "UY", tgl_uy_ids,
> -		  STEP_INFO(tgl_uy_steppings) },
> +		{
> +			INTEL_DISPLAY_TIGERLAKE_UY, "UY",
> +			.pciidlist = tgl_uy_ids,
> +			STEP_INFO(tgl_uy_steppings),
> +		},
>  		{},
>  	},
>  	.info = &(const struct intel_display_device_info) {
> @@ -998,8 +1037,11 @@ static const enum intel_step adl_s_rpl_s_steppings[] = {
>  static const struct platform_desc adl_s_desc = {
>  	PLATFORM(ALDERLAKE_S),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S", adls_rpls_ids,
> -		  STEP_INFO(adl_s_rpl_s_steppings) },
> +		{
> +			INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S",
> +			.pciidlist = adls_rpls_ids,
> +			STEP_INFO(adl_s_rpl_s_steppings),
> +		},
>  		{},
>  	},
>  	.info = &(const struct intel_display_device_info) {
> @@ -1102,12 +1144,21 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = {
>  static const struct platform_desc adl_p_desc = {
>  	PLATFORM(ALDERLAKE_P),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N", adlp_adln_ids,
> -		  STEP_INFO(adl_p_adl_n_steppings) },
> -		{ INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P", adlp_rplp_ids,
> -		  STEP_INFO(adl_p_rpl_pu_steppings) },
> -		{ INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U", adlp_rplu_ids,
> -		  STEP_INFO(adl_p_rpl_pu_steppings) },
> +		{
> +			INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N",
> +			.pciidlist = adlp_adln_ids,
> +			STEP_INFO(adl_p_adl_n_steppings),
> +		},
> +		{
> +			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P",
> +			.pciidlist = adlp_rplp_ids,
> +			STEP_INFO(adl_p_rpl_pu_steppings),
> +		},
> +		{
> +			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U",
> +			.pciidlist = adlp_rplu_ids,
> +			STEP_INFO(adl_p_rpl_pu_steppings),
> +		},
>  		{},
>  	},
>  	.info = &xe_lpd_display,
> @@ -1161,12 +1212,21 @@ static const enum intel_step dg2_g12_steppings[] = {
>  static const struct platform_desc dg2_desc = {
>  	PLATFORM(DG2),
>  	.subplatforms = (const struct subplatform_desc[]) {
> -		{ INTEL_DISPLAY_DG2_G10, "G10", dg2_g10_ids,
> -		  STEP_INFO(dg2_g10_steppings) },
> -		{ INTEL_DISPLAY_DG2_G11, "G11", dg2_g11_ids,
> -		  STEP_INFO(dg2_g11_steppings) },
> -		{ INTEL_DISPLAY_DG2_G12, "G12", dg2_g12_ids,
> -		  STEP_INFO(dg2_g12_steppings) },
> +		{
> +			INTEL_DISPLAY_DG2_G10, "G10",
> +			.pciidlist = dg2_g10_ids,
> +			STEP_INFO(dg2_g10_steppings),
> +		},
> +		{
> +			INTEL_DISPLAY_DG2_G11, "G11",
> +			.pciidlist = dg2_g11_ids,
> +			STEP_INFO(dg2_g11_steppings),
> +		},
> +		{
> +			INTEL_DISPLAY_DG2_G12, "G12",
> +			.pciidlist = dg2_g12_ids,
> +			STEP_INFO(dg2_g12_steppings),
> +		},
>  		{},
>  	},
>  	.info = &xe_hpd_display,
> -- 
> 2.39.5
> 

Re: [PATCH v3 02/15] drm/i915/display: use a macro to initialize subplatforms

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:03PM +0300, Jani Nikula wrote:
> Make it easier to change the underlying structures by using a macro
> similar to PLATFORM() for initialization.
> 
> The subplatform names in debug logs change slightly as they now reflect
> the enum rather than manually entered names. For example, RAPTORLAKE_S
> rather than RPL-S.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.c   | 44 ++++++++++---------
>  1 file changed, 24 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 93c751fde1a9..d311edbfc069 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -37,6 +37,10 @@ struct subplatform_desc {
>  	struct stepping_desc step_info;
>  };
>  
> +#define SUBPLATFORM(_platform, _subplatform)				\
> +	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
> +	.name = #_subplatform
> +
>  struct platform_desc {
>  	enum intel_display_platform platform;
>  	const char *name;
> @@ -498,11 +502,11 @@ static const struct platform_desc hsw_desc = {
>  	PLATFORM(HASWELL),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_HASWELL_ULT, "ULT",
> +			SUBPLATFORM(HASWELL, ULT),
>  			.pciidlist = hsw_ult_ids,
>  		},
>  		{
> -			INTEL_DISPLAY_HASWELL_ULX, "ULX",
> +			SUBPLATFORM(HASWELL, ULX),
>  			.pciidlist = hsw_ulx_ids,
>  		},
>  		{},
> @@ -548,11 +552,11 @@ static const struct platform_desc bdw_desc = {
>  	PLATFORM(BROADWELL),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_BROADWELL_ULT, "ULT",
> +			SUBPLATFORM(BROADWELL, ULT),
>  			.pciidlist = bdw_ult_ids,
>  		},
>  		{
> -			INTEL_DISPLAY_BROADWELL_ULX, "ULX",
> +			SUBPLATFORM(BROADWELL, ULX),
>  			.pciidlist = bdw_ulx_ids,
>  		},
>  		{},
> @@ -645,11 +649,11 @@ static const struct platform_desc skl_desc = {
>  	PLATFORM(SKYLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_SKYLAKE_ULT, "ULT",
> +			SUBPLATFORM(SKYLAKE, ULT),
>  			.pciidlist = skl_ult_ids,
>  		},
>  		{
> -			INTEL_DISPLAY_SKYLAKE_ULX, "ULX",
> +			SUBPLATFORM(SKYLAKE, ULX),
>  			.pciidlist = skl_ulx_ids,
>  		},
>  		{},
> @@ -686,11 +690,11 @@ static const struct platform_desc kbl_desc = {
>  	PLATFORM(KABYLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_KABYLAKE_ULT, "ULT",
> +			SUBPLATFORM(KABYLAKE, ULT),
>  			.pciidlist = kbl_ult_ids,
>  		},
>  		{
> -			INTEL_DISPLAY_KABYLAKE_ULX, "ULX",
> +			SUBPLATFORM(KABYLAKE, ULX),
>  			.pciidlist = kbl_ulx_ids,
>  		},
>  		{},
> @@ -717,11 +721,11 @@ static const struct platform_desc cfl_desc = {
>  	PLATFORM(COFFEELAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_COFFEELAKE_ULT, "ULT",
> +			SUBPLATFORM(COFFEELAKE, ULT),
>  			.pciidlist = cfl_ult_ids,
>  		},
>  		{
> -			INTEL_DISPLAY_COFFEELAKE_ULX, "ULX",
> +			SUBPLATFORM(COFFEELAKE, ULX),
>  			.pciidlist = cfl_ulx_ids,
>  		},
>  		{},
> @@ -739,7 +743,7 @@ static const struct platform_desc cml_desc = {
>  	PLATFORM(COMETLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_COMETLAKE_ULT, "ULT",
> +			SUBPLATFORM(COMETLAKE, ULT),
>  			.pciidlist = cml_ult_ids,
>  		},
>  		{},
> @@ -858,7 +862,7 @@ static const struct platform_desc icl_desc = {
>  	PLATFORM(ICELAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_ICELAKE_PORT_F, "Port F",
> +			SUBPLATFORM(ICELAKE, PORT_F),
>  			.pciidlist = icl_port_f_ids,
>  		},
>  		{},
> @@ -958,7 +962,7 @@ static const struct platform_desc tgl_desc = {
>  	PLATFORM(TIGERLAKE),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_TIGERLAKE_UY, "UY",
> +			SUBPLATFORM(TIGERLAKE, UY),
>  			.pciidlist = tgl_uy_ids,
>  			STEP_INFO(tgl_uy_steppings),
>  		},
> @@ -1038,7 +1042,7 @@ static const struct platform_desc adl_s_desc = {
>  	PLATFORM(ALDERLAKE_S),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S, "RPL-S",
> +			SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S),

these gets a bit strange now, but anyway, it is correct...

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


>  			.pciidlist = adls_rpls_ids,
>  			STEP_INFO(adl_s_rpl_s_steppings),
>  		},
> @@ -1145,17 +1149,17 @@ static const struct platform_desc adl_p_desc = {
>  	PLATFORM(ALDERLAKE_P),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N, "ADL-N",
> +			SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N),
>  			.pciidlist = adlp_adln_ids,
>  			STEP_INFO(adl_p_adl_n_steppings),
>  		},
>  		{
> -			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P, "RPL-P",
> +			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P),
>  			.pciidlist = adlp_rplp_ids,
>  			STEP_INFO(adl_p_rpl_pu_steppings),
>  		},
>  		{
> -			INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U, "RPL-U",
> +			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U),
>  			.pciidlist = adlp_rplu_ids,
>  			STEP_INFO(adl_p_rpl_pu_steppings),
>  		},
> @@ -1213,17 +1217,17 @@ static const struct platform_desc dg2_desc = {
>  	PLATFORM(DG2),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			INTEL_DISPLAY_DG2_G10, "G10",
> +			SUBPLATFORM(DG2, G10),
>  			.pciidlist = dg2_g10_ids,
>  			STEP_INFO(dg2_g10_steppings),
>  		},
>  		{
> -			INTEL_DISPLAY_DG2_G11, "G11",
> +			SUBPLATFORM(DG2, G11),
>  			.pciidlist = dg2_g11_ids,
>  			STEP_INFO(dg2_g11_steppings),
>  		},
>  		{
> -			INTEL_DISPLAY_DG2_G12, "G12",
> +			SUBPLATFORM(DG2, G12),
>  			.pciidlist = dg2_g12_ids,
>  			STEP_INFO(dg2_g12_steppings),
>  		},
> -- 
> 2.39.5
> 

Re: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:04PM +0300, Jani Nikula wrote:
> We'll be needing a macro based list of platforms for more things in the
> future. Start by defining the platform enumerations with it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
>  1 file changed, 61 insertions(+), 54 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 5306bbd13e59..1cc1a2de9e6a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -15,63 +15,70 @@ struct drm_i915_private;
>  struct drm_printer;
>  
>  /* Keep in gen based order, and chronological order within a gen */
> +#define INTEL_DISPLAY_PLATFORMS(func) \
> +	func(PLATFORM_UNINITIALIZED) \
> +	/* Display ver 2 */ \
> +	func(I830) \
> +	func(I845G) \
> +	func(I85X) \
> +	func(I865G) \
> +	/* Display ver 3 */ \
> +	func(I915G) \
> +	func(I915GM) \
> +	func(I945G) \
> +	func(I945GM) \
> +	func(G33) \
> +	func(PINEVIEW) \
> +	/* Display ver 4 */ \
> +	func(I965G) \
> +	func(I965GM) \
> +	func(G45) \
> +	func(GM45) \
> +	/* Display ver 5 */ \
> +	func(IRONLAKE) \
> +	/* Display ver 6 */ \
> +	func(SANDYBRIDGE) \
> +	/* Display ver 7 */ \
> +	func(IVYBRIDGE) \
> +	func(VALLEYVIEW) \
> +	func(HASWELL) \
> +	/* Display ver 8 */ \
> +	func(BROADWELL) \
> +	func(CHERRYVIEW) \
> +	/* Display ver 9 */ \
> +	func(SKYLAKE) \
> +	func(BROXTON) \
> +	func(KABYLAKE) \
> +	func(GEMINILAKE) \
> +	func(COFFEELAKE) \
> +	func(COMETLAKE) \
> +	/* Display ver 11 */ \
> +	func(ICELAKE) \
> +	func(JASPERLAKE) \
> +	func(ELKHARTLAKE) \
> +	/* Display ver 12 */ \
> +	func(TIGERLAKE) \
> +	func(ROCKETLAKE) \
> +	func(DG1) \
> +	func(ALDERLAKE_S) \
> +	/* Display ver 13 */ \
> +	func(ALDERLAKE_P) \
> +	func(DG2) \
> +	/* Display ver 14 (based on GMD ID) */ \
> +	func(METEORLAKE) \
> +	/* Display ver 20 (based on GMD ID) */ \
> +	func(LUNARLAKE) \
> +	/* Display ver 14.1 (based on GMD ID) */ \
> +	func(BATTLEMAGE)
> +
> +#define __ENUM(x) INTEL_DISPLAY_ ## x,
> +
>  enum intel_display_platform {
> -	INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0,
> -	/* Display ver 2 */
> -	INTEL_DISPLAY_I830,
> -	INTEL_DISPLAY_I845G,
> -	INTEL_DISPLAY_I85X,
> -	INTEL_DISPLAY_I865G,
> -	/* Display ver 3 */
> -	INTEL_DISPLAY_I915G,
> -	INTEL_DISPLAY_I915GM,
> -	INTEL_DISPLAY_I945G,
> -	INTEL_DISPLAY_I945GM,
> -	INTEL_DISPLAY_G33,
> -	INTEL_DISPLAY_PINEVIEW,
> -	/* Display ver 4 */
> -	INTEL_DISPLAY_I965G,
> -	INTEL_DISPLAY_I965GM,
> -	INTEL_DISPLAY_G45,
> -	INTEL_DISPLAY_GM45,
> -	/* Display ver 5 */
> -	INTEL_DISPLAY_IRONLAKE,
> -	/* Display ver 6 */
> -	INTEL_DISPLAY_SANDYBRIDGE,
> -	/* Display ver 7 */
> -	INTEL_DISPLAY_IVYBRIDGE,
> -	INTEL_DISPLAY_VALLEYVIEW,
> -	INTEL_DISPLAY_HASWELL,
> -	/* Display ver 8 */
> -	INTEL_DISPLAY_BROADWELL,
> -	INTEL_DISPLAY_CHERRYVIEW,
> -	/* Display ver 9 */
> -	INTEL_DISPLAY_SKYLAKE,
> -	INTEL_DISPLAY_BROXTON,
> -	INTEL_DISPLAY_KABYLAKE,
> -	INTEL_DISPLAY_GEMINILAKE,
> -	INTEL_DISPLAY_COFFEELAKE,
> -	INTEL_DISPLAY_COMETLAKE,
> -	/* Display ver 11 */
> -	INTEL_DISPLAY_ICELAKE,
> -	INTEL_DISPLAY_JASPERLAKE,
> -	INTEL_DISPLAY_ELKHARTLAKE,
> -	/* Display ver 12 */
> -	INTEL_DISPLAY_TIGERLAKE,
> -	INTEL_DISPLAY_ROCKETLAKE,
> -	INTEL_DISPLAY_DG1,
> -	INTEL_DISPLAY_ALDERLAKE_S,
> -	/* Display ver 13 */
> -	INTEL_DISPLAY_ALDERLAKE_P,
> -	INTEL_DISPLAY_DG2,
> -	/* Display ver 14 (based on GMD ID) */
> -	INTEL_DISPLAY_METEORLAKE,
> -	/* Display ver 20 (based on GMD ID) */
> -	INTEL_DISPLAY_LUNARLAKE,
> -	/* Display ver 14.1 (based on GMD ID) */
> -	INTEL_DISPLAY_BATTLEMAGE,
> +	INTEL_DISPLAY_PLATFORMS(__ENUM)

these func macros gets me confused so easily, but I believe
everything looks okay here and I'm trusting your compiler and
experiments more.

And I don't believe the CI issues could be root caused here,
so

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

>  };
>  
> +#undef __ENUM
> +
>  enum intel_display_subplatform {
>  	INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0,
>  	INTEL_DISPLAY_HASWELL_ULT,
> -- 
> 2.39.5
> 

Re: [PATCH v3 04/15] drm/i915/display: join the platform and subplatform enums

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:05PM +0300, Jani Nikula wrote:
> We'll want to use the subplatforms similar to platforms. Join the
> subplatforms next to their corresponding platforms. Update the comment
> while at it.
> 
> v2: Put the subplatforms next to the platforms
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  .../drm/i915/display/intel_display_device.c   |  2 +-
>  .../drm/i915/display/intel_display_device.h   | 54 +++++++++----------
>  2 files changed, 28 insertions(+), 28 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index d311edbfc069..ab98a69b84a7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -31,7 +31,7 @@ struct stepping_desc {
>  	.step_info.size = ARRAY_SIZE(_map)
>  
>  struct subplatform_desc {
> -	enum intel_display_subplatform subplatform;
> +	enum intel_display_platform subplatform;
>  	const char *name;
>  	const u16 *pciidlist;
>  	struct stepping_desc step_info;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 1cc1a2de9e6a..dc425e2661bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -14,7 +14,11 @@
>  struct drm_i915_private;
>  struct drm_printer;
>  
> -/* Keep in gen based order, and chronological order within a gen */
> +/*
> + * Display platforms and subplatforms. Keep platforms in display version based
> + * order, chronological order within a version, and subplatforms next to the
> + * platform.
> + */
>  #define INTEL_DISPLAY_PLATFORMS(func) \
>  	func(PLATFORM_UNINITIALIZED) \
>  	/* Display ver 2 */ \
> @@ -42,28 +46,49 @@ struct drm_printer;
>  	func(IVYBRIDGE) \
>  	func(VALLEYVIEW) \
>  	func(HASWELL) \
> +	func(HASWELL_ULT) \
> +	func(HASWELL_ULX) \
>  	/* Display ver 8 */ \
>  	func(BROADWELL) \
> +	func(BROADWELL_ULT) \
> +	func(BROADWELL_ULX) \
>  	func(CHERRYVIEW) \
>  	/* Display ver 9 */ \
>  	func(SKYLAKE) \
> +	func(SKYLAKE_ULT) \
> +	func(SKYLAKE_ULX) \
>  	func(BROXTON) \
>  	func(KABYLAKE) \
> +	func(KABYLAKE_ULT) \
> +	func(KABYLAKE_ULX) \
>  	func(GEMINILAKE) \
>  	func(COFFEELAKE) \
> +	func(COFFEELAKE_ULT) \
> +	func(COFFEELAKE_ULX) \
>  	func(COMETLAKE) \
> +	func(COMETLAKE_ULT) \
> +	func(COMETLAKE_ULX) \
>  	/* Display ver 11 */ \
>  	func(ICELAKE) \
> +	func(ICELAKE_PORT_F) \
>  	func(JASPERLAKE) \
>  	func(ELKHARTLAKE) \
>  	/* Display ver 12 */ \
>  	func(TIGERLAKE) \
> +	func(TIGERLAKE_UY) \
>  	func(ROCKETLAKE) \
>  	func(DG1) \
>  	func(ALDERLAKE_S) \
> +	func(ALDERLAKE_S_RAPTORLAKE_S) \
>  	/* Display ver 13 */ \
>  	func(ALDERLAKE_P) \
> +	func(ALDERLAKE_P_ALDERLAKE_N) \
> +	func(ALDERLAKE_P_RAPTORLAKE_P) \
> +	func(ALDERLAKE_P_RAPTORLAKE_U) \
>  	func(DG2) \
> +	func(DG2_G10) \
> +	func(DG2_G11) \
> +	func(DG2_G12) \
>  	/* Display ver 14 (based on GMD ID) */ \
>  	func(METEORLAKE) \
>  	/* Display ver 20 (based on GMD ID) */ \
> @@ -79,31 +104,6 @@ enum intel_display_platform {
>  
>  #undef __ENUM
>  
> -enum intel_display_subplatform {
> -	INTEL_DISPLAY_SUBPLATFORM_UNINITIALIZED = 0,
> -	INTEL_DISPLAY_HASWELL_ULT,
> -	INTEL_DISPLAY_HASWELL_ULX,
> -	INTEL_DISPLAY_BROADWELL_ULT,
> -	INTEL_DISPLAY_BROADWELL_ULX,
> -	INTEL_DISPLAY_SKYLAKE_ULT,
> -	INTEL_DISPLAY_SKYLAKE_ULX,
> -	INTEL_DISPLAY_KABYLAKE_ULT,
> -	INTEL_DISPLAY_KABYLAKE_ULX,
> -	INTEL_DISPLAY_COFFEELAKE_ULT,
> -	INTEL_DISPLAY_COFFEELAKE_ULX,
> -	INTEL_DISPLAY_COMETLAKE_ULT,
> -	INTEL_DISPLAY_COMETLAKE_ULX,
> -	INTEL_DISPLAY_ICELAKE_PORT_F,
> -	INTEL_DISPLAY_TIGERLAKE_UY,
> -	INTEL_DISPLAY_ALDERLAKE_S_RAPTORLAKE_S,
> -	INTEL_DISPLAY_ALDERLAKE_P_ALDERLAKE_N,
> -	INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_P,
> -	INTEL_DISPLAY_ALDERLAKE_P_RAPTORLAKE_U,
> -	INTEL_DISPLAY_DG2_G10,
> -	INTEL_DISPLAY_DG2_G11,
> -	INTEL_DISPLAY_DG2_G12,
> -};
> -
>  #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
>  	/* Keep in alphabetical order */ \
>  	func(cursor_needs_physical); \
> @@ -211,7 +211,7 @@ enum intel_display_subplatform {
>  
>  struct intel_display_runtime_info {
>  	enum intel_display_platform platform;
> -	enum intel_display_subplatform subplatform;
> +	enum intel_display_platform subplatform;
>  
>  	struct intel_display_ip_ver {
>  		u16 ver;
> -- 
> 2.39.5
> 

Re: [PATCH v3 05/15] drm/i915/display: convert display platforms to lower case

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:06PM +0300, Jani Nikula wrote:
> This will be helpful for follow-up, where the names here become struct
> member names.
> 
> This does impact debug logs as well, making everything lower case.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  .../drm/i915/display/intel_display_device.c   | 120 +++++++++---------
>  .../drm/i915/display/intel_display_device.h   | 120 +++++++++---------
>  2 files changed, 120 insertions(+), 120 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index ab98a69b84a7..b2610217f5c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -236,7 +236,7 @@ static const struct intel_display_device_info no_display = {};
>  	.__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A)
>  
>  static const struct platform_desc i830_desc = {
> -	PLATFORM(I830),
> +	PLATFORM(i830),
>  	.info = &(const struct intel_display_device_info) {
>  		I830_DISPLAY,
>  
> @@ -245,7 +245,7 @@ static const struct platform_desc i830_desc = {
>  };
>  
>  static const struct platform_desc i845_desc = {
> -	PLATFORM(I845G),
> +	PLATFORM(i845g),
>  	.info = &(const struct intel_display_device_info) {
>  		I845_DISPLAY,
>  
> @@ -254,7 +254,7 @@ static const struct platform_desc i845_desc = {
>  };
>  
>  static const struct platform_desc i85x_desc = {
> -	PLATFORM(I85X),
> +	PLATFORM(i85x),
>  	.info = &(const struct intel_display_device_info) {
>  		I830_DISPLAY,
>  
> @@ -264,7 +264,7 @@ static const struct platform_desc i85x_desc = {
>  };
>  
>  static const struct platform_desc i865g_desc = {
> -	PLATFORM(I865G),
> +	PLATFORM(i865g),
>  	.info = &(const struct intel_display_device_info) {
>  		I845_DISPLAY,
>  
> @@ -286,7 +286,7 @@ static const struct platform_desc i865g_desc = {
>  	.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) /* SDVO B/C */
>  
>  static const struct platform_desc i915g_desc = {
> -	PLATFORM(I915G),
> +	PLATFORM(i915g),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I845_COLORS,
> @@ -296,7 +296,7 @@ static const struct platform_desc i915g_desc = {
>  };
>  
>  static const struct platform_desc i915gm_desc = {
> -	PLATFORM(I915GM),
> +	PLATFORM(i915gm),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I9XX_COLORS,
> @@ -309,7 +309,7 @@ static const struct platform_desc i915gm_desc = {
>  };
>  
>  static const struct platform_desc i945g_desc = {
> -	PLATFORM(I945G),
> +	PLATFORM(i945g),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I845_COLORS,
> @@ -320,7 +320,7 @@ static const struct platform_desc i945g_desc = {
>  };
>  
>  static const struct platform_desc i945gm_desc = {
> -	PLATFORM(I915GM),
> +	PLATFORM(i915gm),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I9XX_COLORS,
> @@ -334,7 +334,7 @@ static const struct platform_desc i945gm_desc = {
>  };
>  
>  static const struct platform_desc g33_desc = {
> -	PLATFORM(G33),
> +	PLATFORM(g33),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I845_COLORS,
> @@ -343,7 +343,7 @@ static const struct platform_desc g33_desc = {
>  };
>  
>  static const struct platform_desc pnv_desc = {
> -	PLATFORM(PINEVIEW),
> +	PLATFORM(pineview),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN3_DISPLAY,
>  		I9XX_COLORS,
> @@ -364,7 +364,7 @@ static const struct platform_desc pnv_desc = {
>  		BIT(TRANSCODER_A) | BIT(TRANSCODER_B)
>  
>  static const struct platform_desc i965g_desc = {
> -	PLATFORM(I965G),
> +	PLATFORM(i965g),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  		.has_overlay = 1,
> @@ -374,7 +374,7 @@ static const struct platform_desc i965g_desc = {
>  };
>  
>  static const struct platform_desc i965gm_desc = {
> -	PLATFORM(I965GM),
> +	PLATFORM(i965gm),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  		.has_overlay = 1,
> @@ -386,7 +386,7 @@ static const struct platform_desc i965gm_desc = {
>  };
>  
>  static const struct platform_desc g45_desc = {
> -	PLATFORM(G45),
> +	PLATFORM(g45),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  
> @@ -395,7 +395,7 @@ static const struct platform_desc g45_desc = {
>  };
>  
>  static const struct platform_desc gm45_desc = {
> -	PLATFORM(GM45),
> +	PLATFORM(gm45),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN4_DISPLAY,
>  		.supports_tv = 1,
> @@ -418,14 +418,14 @@ static const struct platform_desc gm45_desc = {
>  	.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
>  
>  static const struct platform_desc ilk_d_desc = {
> -	PLATFORM(IRONLAKE),
> +	PLATFORM(ironlake),
>  	.info = &(const struct intel_display_device_info) {
>  		ILK_DISPLAY,
>  	},
>  };
>  
>  static const struct platform_desc ilk_m_desc = {
> -	PLATFORM(IRONLAKE),
> +	PLATFORM(ironlake),
>  	.info = &(const struct intel_display_device_info) {
>  		ILK_DISPLAY,
>  
> @@ -434,7 +434,7 @@ static const struct platform_desc ilk_m_desc = {
>  };
>  
>  static const struct platform_desc snb_desc = {
> -	PLATFORM(SANDYBRIDGE),
> +	PLATFORM(sandybridge),
>  	.info = &(const struct intel_display_device_info) {
>  		.has_hotplug = 1,
>  		I9XX_PIPE_OFFSETS,
> @@ -451,7 +451,7 @@ static const struct platform_desc snb_desc = {
>  };
>  
>  static const struct platform_desc ivb_desc = {
> -	PLATFORM(IVYBRIDGE),
> +	PLATFORM(ivybridge),
>  	.info = &(const struct intel_display_device_info) {
>  		.has_hotplug = 1,
>  		IVB_PIPE_OFFSETS,
> @@ -468,7 +468,7 @@ static const struct platform_desc ivb_desc = {
>  };
>  
>  static const struct platform_desc vlv_desc = {
> -	PLATFORM(VALLEYVIEW),
> +	PLATFORM(valleyview),
>  	.info = &(const struct intel_display_device_info) {
>  		.has_gmch = 1,
>  		.has_hotplug = 1,
> @@ -499,14 +499,14 @@ static const u16 hsw_ulx_ids[] = {
>  };
>  
>  static const struct platform_desc hsw_desc = {
> -	PLATFORM(HASWELL),
> +	PLATFORM(haswell),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(HASWELL, ULT),
> +			SUBPLATFORM(haswell, ult),
>  			.pciidlist = hsw_ult_ids,
>  		},
>  		{
> -			SUBPLATFORM(HASWELL, ULX),
> +			SUBPLATFORM(haswell, ulx),
>  			.pciidlist = hsw_ulx_ids,
>  		},
>  		{},
> @@ -549,14 +549,14 @@ static const u16 bdw_ulx_ids[] = {
>  };
>  
>  static const struct platform_desc bdw_desc = {
> -	PLATFORM(BROADWELL),
> +	PLATFORM(broadwell),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(BROADWELL, ULT),
> +			SUBPLATFORM(broadwell, ult),
>  			.pciidlist = bdw_ult_ids,
>  		},
>  		{
> -			SUBPLATFORM(BROADWELL, ULX),
> +			SUBPLATFORM(broadwell, ulx),
>  			.pciidlist = bdw_ulx_ids,
>  		},
>  		{},
> @@ -583,7 +583,7 @@ static const struct platform_desc bdw_desc = {
>  };
>  
>  static const struct platform_desc chv_desc = {
> -	PLATFORM(CHERRYVIEW),
> +	PLATFORM(cherryview),
>  	.info = &(const struct intel_display_device_info) {
>  		.has_hotplug = 1,
>  		.has_gmch = 1,
> @@ -646,14 +646,14 @@ static const enum intel_step skl_steppings[] = {
>  };
>  
>  static const struct platform_desc skl_desc = {
> -	PLATFORM(SKYLAKE),
> +	PLATFORM(skylake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(SKYLAKE, ULT),
> +			SUBPLATFORM(skylake, ult),
>  			.pciidlist = skl_ult_ids,
>  		},
>  		{
> -			SUBPLATFORM(SKYLAKE, ULX),
> +			SUBPLATFORM(skylake, ulx),
>  			.pciidlist = skl_ulx_ids,
>  		},
>  		{},
> @@ -687,14 +687,14 @@ static const enum intel_step kbl_steppings[] = {
>  };
>  
>  static const struct platform_desc kbl_desc = {
> -	PLATFORM(KABYLAKE),
> +	PLATFORM(kabylake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(KABYLAKE, ULT),
> +			SUBPLATFORM(kabylake, ult),
>  			.pciidlist = kbl_ult_ids,
>  		},
>  		{
> -			SUBPLATFORM(KABYLAKE, ULX),
> +			SUBPLATFORM(kabylake, ulx),
>  			.pciidlist = kbl_ulx_ids,
>  		},
>  		{},
> @@ -718,14 +718,14 @@ static const u16 cfl_ulx_ids[] = {
>  };
>  
>  static const struct platform_desc cfl_desc = {
> -	PLATFORM(COFFEELAKE),
> +	PLATFORM(coffeelake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(COFFEELAKE, ULT),
> +			SUBPLATFORM(coffeelake, ult),
>  			.pciidlist = cfl_ult_ids,
>  		},
>  		{
> -			SUBPLATFORM(COFFEELAKE, ULX),
> +			SUBPLATFORM(coffeelake, ulx),
>  			.pciidlist = cfl_ulx_ids,
>  		},
>  		{},
> @@ -740,10 +740,10 @@ static const u16 cml_ult_ids[] = {
>  };
>  
>  static const struct platform_desc cml_desc = {
> -	PLATFORM(COMETLAKE),
> +	PLATFORM(cometlake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(COMETLAKE, ULT),
> +			SUBPLATFORM(cometlake, ult),
>  			.pciidlist = cml_ult_ids,
>  		},
>  		{},
> @@ -782,7 +782,7 @@ static const enum intel_step bxt_steppings[] = {
>  };
>  
>  static const struct platform_desc bxt_desc = {
> -	PLATFORM(BROXTON),
> +	PLATFORM(broxton),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN9_LP_DISPLAY,
>  		.dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */
> @@ -797,7 +797,7 @@ static const enum intel_step glk_steppings[] = {
>  };
>  
>  static const struct platform_desc glk_desc = {
> -	PLATFORM(GEMINILAKE),
> +	PLATFORM(geminilake),
>  	.info = &(const struct intel_display_device_info) {
>  		GEN9_LP_DISPLAY,
>  		.dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */
> @@ -859,10 +859,10 @@ static const enum intel_step icl_steppings[] = {
>  };
>  
>  static const struct platform_desc icl_desc = {
> -	PLATFORM(ICELAKE),
> +	PLATFORM(icelake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(ICELAKE, PORT_F),
> +			SUBPLATFORM(icelake, port_f),
>  			.pciidlist = icl_port_f_ids,
>  		},
>  		{},
> @@ -887,13 +887,13 @@ static const enum intel_step jsl_ehl_steppings[] = {
>  };
>  
>  static const struct platform_desc jsl_desc = {
> -	PLATFORM(JASPERLAKE),
> +	PLATFORM(jasperlake),
>  	.info = &jsl_ehl_display,
>  	STEP_INFO(jsl_ehl_steppings),
>  };
>  
>  static const struct platform_desc ehl_desc = {
> -	PLATFORM(ELKHARTLAKE),
> +	PLATFORM(elkhartlake),
>  	.info = &jsl_ehl_display,
>  	STEP_INFO(jsl_ehl_steppings),
>  };
> @@ -959,10 +959,10 @@ static const enum intel_step tgl_uy_steppings[] = {
>  };
>  
>  static const struct platform_desc tgl_desc = {
> -	PLATFORM(TIGERLAKE),
> +	PLATFORM(tigerlake),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(TIGERLAKE, UY),
> +			SUBPLATFORM(tigerlake, uy),
>  			.pciidlist = tgl_uy_ids,
>  			STEP_INFO(tgl_uy_steppings),
>  		},
> @@ -987,7 +987,7 @@ static const enum intel_step dg1_steppings[] = {
>  };
>  
>  static const struct platform_desc dg1_desc = {
> -	PLATFORM(DG1),
> +	PLATFORM(dg1),
>  	.info = &(const struct intel_display_device_info) {
>  		XE_D_DISPLAY,
>  
> @@ -1004,7 +1004,7 @@ static const enum intel_step rkl_steppings[] = {
>  };
>  
>  static const struct platform_desc rkl_desc = {
> -	PLATFORM(ROCKETLAKE),
> +	PLATFORM(rocketlake),
>  	.info = &(const struct intel_display_device_info) {
>  		XE_D_DISPLAY,
>  		.abox_mask = BIT(0),
> @@ -1039,10 +1039,10 @@ static const enum intel_step adl_s_rpl_s_steppings[] = {
>  };
>  
>  static const struct platform_desc adl_s_desc = {
> -	PLATFORM(ALDERLAKE_S),
> +	PLATFORM(alderlake_s),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(ALDERLAKE_S, RAPTORLAKE_S),
> +			SUBPLATFORM(alderlake_s, raptorlake_s),
>  			.pciidlist = adls_rpls_ids,
>  			STEP_INFO(adl_s_rpl_s_steppings),
>  		},
> @@ -1146,20 +1146,20 @@ static const enum intel_step adl_p_rpl_pu_steppings[] = {
>  };
>  
>  static const struct platform_desc adl_p_desc = {
> -	PLATFORM(ALDERLAKE_P),
> +	PLATFORM(alderlake_p),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(ALDERLAKE_P, ALDERLAKE_N),
> +			SUBPLATFORM(alderlake_p, alderlake_n),
>  			.pciidlist = adlp_adln_ids,
>  			STEP_INFO(adl_p_adl_n_steppings),
>  		},
>  		{
> -			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_P),
> +			SUBPLATFORM(alderlake_p, raptorlake_p),
>  			.pciidlist = adlp_rplp_ids,
>  			STEP_INFO(adl_p_rpl_pu_steppings),
>  		},
>  		{
> -			SUBPLATFORM(ALDERLAKE_P, RAPTORLAKE_U),
> +			SUBPLATFORM(alderlake_p, raptorlake_u),
>  			.pciidlist = adlp_rplu_ids,
>  			STEP_INFO(adl_p_rpl_pu_steppings),
>  		},
> @@ -1214,20 +1214,20 @@ static const enum intel_step dg2_g12_steppings[] = {
>  };
>  
>  static const struct platform_desc dg2_desc = {
> -	PLATFORM(DG2),
> +	PLATFORM(dg2),
>  	.subplatforms = (const struct subplatform_desc[]) {
>  		{
> -			SUBPLATFORM(DG2, G10),
> +			SUBPLATFORM(dg2, g10),
>  			.pciidlist = dg2_g10_ids,
>  			STEP_INFO(dg2_g10_steppings),
>  		},
>  		{
> -			SUBPLATFORM(DG2, G11),
> +			SUBPLATFORM(dg2, g11),
>  			.pciidlist = dg2_g11_ids,
>  			STEP_INFO(dg2_g11_steppings),
>  		},
>  		{
> -			SUBPLATFORM(DG2, G12),
> +			SUBPLATFORM(dg2, g12),
>  			.pciidlist = dg2_g12_ids,
>  			STEP_INFO(dg2_g12_steppings),
>  		},
> @@ -1305,15 +1305,15 @@ static const struct intel_display_device_info xe2_hpd_display = {
>   * reported by the hardware.
>   */
>  static const struct platform_desc mtl_desc = {
> -	PLATFORM(METEORLAKE),
> +	PLATFORM(meteorlake),
>  };
>  
>  static const struct platform_desc lnl_desc = {
> -	PLATFORM(LUNARLAKE),
> +	PLATFORM(lunarlake),
>  };
>  
>  static const struct platform_desc bmg_desc = {
> -	PLATFORM(BATTLEMAGE),
> +	PLATFORM(battlemage),
>  };
>  
>  __diag_pop();
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index dc425e2661bc..c4208c34cc31 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -22,79 +22,79 @@ struct drm_printer;
>  #define INTEL_DISPLAY_PLATFORMS(func) \
>  	func(PLATFORM_UNINITIALIZED) \
>  	/* Display ver 2 */ \
> -	func(I830) \
> -	func(I845G) \
> -	func(I85X) \
> -	func(I865G) \
> +	func(i830) \
> +	func(i845g) \
> +	func(i85x) \
> +	func(i865g) \
>  	/* Display ver 3 */ \
> -	func(I915G) \
> -	func(I915GM) \
> -	func(I945G) \
> -	func(I945GM) \
> -	func(G33) \
> -	func(PINEVIEW) \
> +	func(i915g) \
> +	func(i915gm) \
> +	func(i945g) \
> +	func(i945gm) \
> +	func(g33) \
> +	func(pineview) \
>  	/* Display ver 4 */ \
> -	func(I965G) \
> -	func(I965GM) \
> -	func(G45) \
> -	func(GM45) \
> +	func(i965g) \
> +	func(i965gm) \
> +	func(g45) \
> +	func(gm45) \
>  	/* Display ver 5 */ \
> -	func(IRONLAKE) \
> +	func(ironlake) \
>  	/* Display ver 6 */ \
> -	func(SANDYBRIDGE) \
> +	func(sandybridge) \
>  	/* Display ver 7 */ \
> -	func(IVYBRIDGE) \
> -	func(VALLEYVIEW) \
> -	func(HASWELL) \
> -	func(HASWELL_ULT) \
> -	func(HASWELL_ULX) \
> +	func(ivybridge) \
> +	func(valleyview) \
> +	func(haswell) \
> +	func(haswell_ult) \
> +	func(haswell_ulx) \
>  	/* Display ver 8 */ \
> -	func(BROADWELL) \
> -	func(BROADWELL_ULT) \
> -	func(BROADWELL_ULX) \
> -	func(CHERRYVIEW) \
> +	func(broadwell) \
> +	func(broadwell_ult) \
> +	func(broadwell_ulx) \
> +	func(cherryview) \
>  	/* Display ver 9 */ \
> -	func(SKYLAKE) \
> -	func(SKYLAKE_ULT) \
> -	func(SKYLAKE_ULX) \
> -	func(BROXTON) \
> -	func(KABYLAKE) \
> -	func(KABYLAKE_ULT) \
> -	func(KABYLAKE_ULX) \
> -	func(GEMINILAKE) \
> -	func(COFFEELAKE) \
> -	func(COFFEELAKE_ULT) \
> -	func(COFFEELAKE_ULX) \
> -	func(COMETLAKE) \
> -	func(COMETLAKE_ULT) \
> -	func(COMETLAKE_ULX) \
> +	func(skylake) \
> +	func(skylake_ult) \
> +	func(skylake_ulx) \
> +	func(broxton) \
> +	func(kabylake) \
> +	func(kabylake_ult) \
> +	func(kabylake_ulx) \
> +	func(geminilake) \
> +	func(coffeelake) \
> +	func(coffeelake_ult) \
> +	func(coffeelake_ulx) \
> +	func(cometlake) \
> +	func(cometlake_ult) \
> +	func(cometlake_ulx) \
>  	/* Display ver 11 */ \
> -	func(ICELAKE) \
> -	func(ICELAKE_PORT_F) \
> -	func(JASPERLAKE) \
> -	func(ELKHARTLAKE) \
> +	func(icelake) \
> +	func(icelake_port_f) \
> +	func(jasperlake) \
> +	func(elkhartlake) \
>  	/* Display ver 12 */ \
> -	func(TIGERLAKE) \
> -	func(TIGERLAKE_UY) \
> -	func(ROCKETLAKE) \
> -	func(DG1) \
> -	func(ALDERLAKE_S) \
> -	func(ALDERLAKE_S_RAPTORLAKE_S) \
> +	func(tigerlake) \
> +	func(tigerlake_uy) \
> +	func(rocketlake) \
> +	func(dg1) \
> +	func(alderlake_s) \
> +	func(alderlake_s_raptorlake_s) \
>  	/* Display ver 13 */ \
> -	func(ALDERLAKE_P) \
> -	func(ALDERLAKE_P_ALDERLAKE_N) \
> -	func(ALDERLAKE_P_RAPTORLAKE_P) \
> -	func(ALDERLAKE_P_RAPTORLAKE_U) \
> -	func(DG2) \
> -	func(DG2_G10) \
> -	func(DG2_G11) \
> -	func(DG2_G12) \
> +	func(alderlake_p) \
> +	func(alderlake_p_alderlake_n) \
> +	func(alderlake_p_raptorlake_p) \
> +	func(alderlake_p_raptorlake_u) \
> +	func(dg2) \
> +	func(dg2_g10) \
> +	func(dg2_g11) \
> +	func(dg2_g12) \
>  	/* Display ver 14 (based on GMD ID) */ \
> -	func(METEORLAKE) \
> +	func(meteorlake) \
>  	/* Display ver 20 (based on GMD ID) */ \
> -	func(LUNARLAKE) \
> +	func(lunarlake) \
>  	/* Display ver 14.1 (based on GMD ID) */ \
> -	func(BATTLEMAGE)
> +	func(battlemage)
>  
>  #define __ENUM(x) INTEL_DISPLAY_ ## x,
>  
> -- 
> 2.39.5
> 

Re: [PATCH v3 06/15] drm/i915/display: add display platforms structure with platform members

[Rodrigo Vivi]

On Mon, Sep 30, 2024 at 03:31:07PM +0300, Jani Nikula wrote:
> Add a structure with a bitfield member for each platform and
> subplatform, and initialize them in platform and subplatform descs.
> 
> The structure also contains a bitmap in a union for easier manipulation
> of the bits.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.c   |  4 ++++
>  .../drm/i915/display/intel_display_device.h   | 19 +++++++++++++++++++
>  2 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index b2610217f5c5..258660b49eba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -31,6 +31,7 @@ struct stepping_desc {
>  	.step_info.size = ARRAY_SIZE(_map)
>  
>  struct subplatform_desc {
> +	struct intel_display_platforms platforms;
>  	enum intel_display_platform subplatform;
>  	const char *name;
>  	const u16 *pciidlist;
> @@ -38,10 +39,12 @@ struct subplatform_desc {
>  };
>  
>  #define SUBPLATFORM(_platform, _subplatform)				\
> +	.platforms._platform##_##_subplatform = 1,			\
>  	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
>  	.name = #_subplatform
>  
>  struct platform_desc {
> +	struct intel_display_platforms platforms;
>  	enum intel_display_platform platform;
>  	const char *name;
>  	const struct subplatform_desc *subplatforms;
> @@ -50,6 +53,7 @@ struct platform_desc {
>  };
>  
>  #define PLATFORM(_platform)			 \
> +	.platforms._platform = 1,		 \
>  	.platform = (INTEL_DISPLAY_##_platform), \
>  	.name = #_platform
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index c4208c34cc31..f166d4698949 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -6,6 +6,7 @@
>  #ifndef __INTEL_DISPLAY_DEVICE_H__
>  #define __INTEL_DISPLAY_DEVICE_H__
>  
> +#include <linux/bitops.h>
>  #include <linux/types.h>
>  
>  #include "intel_display_conversion.h"
> @@ -104,6 +105,24 @@ enum intel_display_platform {
>  
>  #undef __ENUM
>  
> +#define __MEMBER(name) unsigned long name:1;
> +#define __COUNT(x) 1 +
> +
> +#define __NUM_PLATFORMS (INTEL_DISPLAY_PLATFORMS(__COUNT) 0)
> +
> +struct intel_display_platforms {
> +	union {
> +		struct {
> +			INTEL_DISPLAY_PLATFORMS(__MEMBER);
> +		};
> +		DECLARE_BITMAP(bitmap, __NUM_PLATFORMS);
> +	};
> +};
> +
> +#undef __MEMBER
> +#undef __COUNT

why do we need the count here?
I'm afraid I didn't fully followed this macro...

> +#undef __NUM_PLATFORMS
> +
>  #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
>  	/* Keep in alphabetical order */ \
>  	func(cursor_needs_physical); \
> -- 
> 2.39.5
> 

Re: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Michal Wajdeczko]

On 30.09.2024 14:31, Jani Nikula wrote:
> We'll be needing a macro based list of platforms for more things in the
> future. Start by defining the platform enumerations with it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
>  1 file changed, 61 insertions(+), 54 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 5306bbd13e59..1cc1a2de9e6a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -15,63 +15,70 @@ struct drm_i915_private;
>  struct drm_printer;
>  
>  /* Keep in gen based order, and chronological order within a gen */
> +#define INTEL_DISPLAY_PLATFORMS(func) \
> +	func(PLATFORM_UNINITIALIZED) \

maybe this one should be defined in the old-fashion way so the
INTEL_DISPLAY_PLATFORMS macro will contain only valid IDs?

Re: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Jani Nikula]

On Mon, 07 Oct 2024, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
> On 30.09.2024 14:31, Jani Nikula wrote:
>> We'll be needing a macro based list of platforms for more things in the
>> future. Start by defining the platform enumerations with it.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
>>  1 file changed, 61 insertions(+), 54 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 5306bbd13e59..1cc1a2de9e6a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -15,63 +15,70 @@ struct drm_i915_private;
>>  struct drm_printer;
>>  
>>  /* Keep in gen based order, and chronological order within a gen */
>> +#define INTEL_DISPLAY_PLATFORMS(func) \
>> +	func(PLATFORM_UNINITIALIZED) \
>
> maybe this one should be defined in the old-fashion way so the
> INTEL_DISPLAY_PLATFORMS macro will contain only valid IDs?

I don't understand.

BR,
Jani.

-- 
Jani Nikula, Intel

Re: [PATCH v3 06/15] drm/i915/display: add display platforms structure with platform members

[Jani Nikula]

On Mon, 07 Oct 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Mon, Sep 30, 2024 at 03:31:07PM +0300, Jani Nikula wrote:
>> Add a structure with a bitfield member for each platform and
>> subplatform, and initialize them in platform and subplatform descs.
>> 
>> The structure also contains a bitmap in a union for easier manipulation
>> of the bits.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  .../drm/i915/display/intel_display_device.c   |  4 ++++
>>  .../drm/i915/display/intel_display_device.h   | 19 +++++++++++++++++++
>>  2 files changed, 23 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
>> index b2610217f5c5..258660b49eba 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
>> @@ -31,6 +31,7 @@ struct stepping_desc {
>>  	.step_info.size = ARRAY_SIZE(_map)
>>  
>>  struct subplatform_desc {
>> +	struct intel_display_platforms platforms;
>>  	enum intel_display_platform subplatform;
>>  	const char *name;
>>  	const u16 *pciidlist;
>> @@ -38,10 +39,12 @@ struct subplatform_desc {
>>  };
>>  
>>  #define SUBPLATFORM(_platform, _subplatform)				\
>> +	.platforms._platform##_##_subplatform = 1,			\
>>  	.subplatform = (INTEL_DISPLAY_##_platform##_##_subplatform),	\
>>  	.name = #_subplatform
>>  
>>  struct platform_desc {
>> +	struct intel_display_platforms platforms;
>>  	enum intel_display_platform platform;
>>  	const char *name;
>>  	const struct subplatform_desc *subplatforms;
>> @@ -50,6 +53,7 @@ struct platform_desc {
>>  };
>>  
>>  #define PLATFORM(_platform)			 \
>> +	.platforms._platform = 1,		 \
>>  	.platform = (INTEL_DISPLAY_##_platform), \
>>  	.name = #_platform
>>  
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index c4208c34cc31..f166d4698949 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -6,6 +6,7 @@
>>  #ifndef __INTEL_DISPLAY_DEVICE_H__
>>  #define __INTEL_DISPLAY_DEVICE_H__
>>  
>> +#include <linux/bitops.h>
>>  #include <linux/types.h>
>>  
>>  #include "intel_display_conversion.h"
>> @@ -104,6 +105,24 @@ enum intel_display_platform {
>>  
>>  #undef __ENUM
>>  
>> +#define __MEMBER(name) unsigned long name:1;
>> +#define __COUNT(x) 1 +
>> +
>> +#define __NUM_PLATFORMS (INTEL_DISPLAY_PLATFORMS(__COUNT) 0)
>> +
>> +struct intel_display_platforms {
>> +	union {
>> +		struct {
>> +			INTEL_DISPLAY_PLATFORMS(__MEMBER);
>> +		};
>> +		DECLARE_BITMAP(bitmap, __NUM_PLATFORMS);
>> +	};
>> +};
>> +
>> +#undef __MEMBER
>> +#undef __COUNT
>
> why do we need the count here?
> I'm afraid I didn't fully followed this macro...

"1 +" gets substituted for each platform in INTEL_DISPLAY_PLATFORMS(),
resulting in the number of platforms, stored in __NUM_PLATFORMS.

We use that for the DECLARE_BITMAP() above. And we're using a bitmap to
avoid hand-rolling bitmap_or(). Yeah, it's a bit icky, but a) gets the
job done, b) should not need to be manually updated when the number of
platforms grows.

BR,
Jani.

>
>> +#undef __NUM_PLATFORMS
>> +
>>  #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
>>  	/* Keep in alphabetical order */ \
>>  	func(cursor_needs_physical); \
>> -- 
>> 2.39.5
>> 

-- 
Jani Nikula, Intel

Re: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Michal Wajdeczko]

On 08.10.2024 11:30, Jani Nikula wrote:
> On Mon, 07 Oct 2024, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
>> On 30.09.2024 14:31, Jani Nikula wrote:
>>> We'll be needing a macro based list of platforms for more things in the
>>> future. Start by defining the platform enumerations with it.
>>>
>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>> ---
>>>  .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
>>>  1 file changed, 61 insertions(+), 54 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>>> index 5306bbd13e59..1cc1a2de9e6a 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>>> @@ -15,63 +15,70 @@ struct drm_i915_private;
>>>  struct drm_printer;
>>>  
>>>  /* Keep in gen based order, and chronological order within a gen */
>>> +#define INTEL_DISPLAY_PLATFORMS(func) \
>>> +	func(PLATFORM_UNINITIALIZED) \
>>
>> maybe this one should be defined in the old-fashion way so the
>> INTEL_DISPLAY_PLATFORMS macro will contain only valid IDs?
> 
> I don't understand.
> 

I mean something like this:

enum intel_display_platform {
	INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0,
	INTEL_DISPLAY_PLATFORMS(__ENUM)
};

with that INTEL_DISPLAY_PLATFORMS macro could be used in some other
cases (maybe tests) without worrying about that uninitialized case.

Re: [PATCH v3 03/15] drm/i915/display: use a macro to define platform enumerations

[Jani Nikula]

On Tue, 08 Oct 2024, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
> On 08.10.2024 11:30, Jani Nikula wrote:
>> On Mon, 07 Oct 2024, Michal Wajdeczko <michal.wajdeczko@intel.com> wrote:
>>> On 30.09.2024 14:31, Jani Nikula wrote:
>>>> We'll be needing a macro based list of platforms for more things in the
>>>> future. Start by defining the platform enumerations with it.
>>>>
>>>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>>>> ---
>>>>  .../drm/i915/display/intel_display_device.h   | 115 ++++++++++--------
>>>>  1 file changed, 61 insertions(+), 54 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>>>> index 5306bbd13e59..1cc1a2de9e6a 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>>>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>>>> @@ -15,63 +15,70 @@ struct drm_i915_private;
>>>>  struct drm_printer;
>>>>  
>>>>  /* Keep in gen based order, and chronological order within a gen */
>>>> +#define INTEL_DISPLAY_PLATFORMS(func) \
>>>> +	func(PLATFORM_UNINITIALIZED) \
>>>
>>> maybe this one should be defined in the old-fashion way so the
>>> INTEL_DISPLAY_PLATFORMS macro will contain only valid IDs?
>> 
>> I don't understand.
>> 
>
> I mean something like this:
>
> enum intel_display_platform {
> 	INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0,
> 	INTEL_DISPLAY_PLATFORMS(__ENUM)
> };
>
> with that INTEL_DISPLAY_PLATFORMS macro could be used in some other
> cases (maybe tests) without worrying about that uninitialized case.

Patch 8 removes the enum altogether.


BR,
Jani.


-- 
Jani Nikula, Intel