[PATCH 0/8] drm/i915: irq_lock refactoring, move to display

[PATCH 0/8] drm/i915: irq_lock refactoring, move to display

[Jani Nikula]

Refactor some irq/rps code to help move i915->irq_lock to
display->irq.lock, and then do the move.

Jani Nikula (8):
  drm/i915/irq: move locking inside vlv_display_irq_reset()
  drm/i915/irq: move locking inside
    valleyview_{enable,disable}_display_irqs()
  drm/i915/irq: move locking inside vlv_display_irq_postinstall()
  drm/i915/irq: split out i915_display_irq_postinstall()
  drm/i915/irq: split out i965_display_irq_postinstall()
  drm/i915/irq: make i915_enable_asle_pipestat() static
  drm/i915/rps: refactor display rps support
  drm/i915/irq: move i915->irq_lock to display->irq.lock

 drivers/gpu/drm/i915/display/i9xx_plane.c     |  43 +++--
 .../gpu/drm/i915/display/intel_display_core.h |   3 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 153 ++++++++++--------
 .../gpu/drm/i915/display/intel_display_irq.h  |   3 +-
 .../i915/display/intel_display_power_well.c   |   5 -
 .../gpu/drm/i915/display/intel_display_rps.c  |  23 +++
 .../gpu/drm/i915/display/intel_display_rps.h  |  24 +++
 .../drm/i915/display/intel_display_types.h    |   2 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  10 +-
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c  |   9 +-
 .../drm/i915/display/intel_fifo_underrun.c    |  44 ++---
 drivers/gpu/drm/i915/display/intel_hotplug.c  | 129 ++++++---------
 .../gpu/drm/i915/display/intel_hotplug_irq.c  |  22 ++-
 drivers/gpu/drm/i915/display/intel_tv.c       |  14 +-
 .../drm/i915/display/skl_universal_plane.c    |  10 +-
 drivers/gpu/drm/i915/gt/intel_rps.c           |  10 +-
 drivers/gpu/drm/i915/i915_driver.c            |   1 -
 drivers/gpu/drm/i915/i915_drv.h               |   2 -
 drivers/gpu/drm/i915/i915_irq.c               |  27 +---
 drivers/gpu/drm/xe/Makefile                   |   1 -
 .../drm/xe/compat-i915-headers/gt/intel_rps.h |  11 --
 .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  11 --
 drivers/gpu/drm/xe/display/xe_display_rps.c   |  17 --
 23 files changed, 260 insertions(+), 314 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
 delete mode 100644 drivers/gpu/drm/xe/display/xe_display_rps.c

-- 
2.39.5

[PATCH 1/8] drm/i915/irq: move locking inside vlv_display_irq_reset()

[Jani Nikula]

All users of vlv_display_irq_reset() have a lock/unlock pair. Move the
locking inside the function.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 4 ++++
 drivers/gpu/drm/i915/i915_irq.c                  | 4 ----
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 73b6254c5485..22bb0fc10736 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1884,8 +1884,12 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 
 void vlv_display_irq_reset(struct intel_display *display)
 {
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
+
+	spin_lock_irq(&dev_priv->irq_lock);
 	if (display->irq.vlv_display_irqs_enabled)
 		_vlv_display_irq_reset(display);
+	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 void i9xx_display_irq_reset(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d06694d6531e..b918b440cbce 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -688,9 +688,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
 
 	gen5_gt_irq_reset(to_gt(dev_priv));
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	vlv_display_irq_reset(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 static void gen8_irq_reset(struct drm_i915_private *dev_priv)
@@ -752,9 +750,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
 
 	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	vlv_display_irq_reset(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
-- 
2.39.5

[PATCH 2/8] drm/i915/irq: move locking inside valleyview_{enable, disable}_display_irqs()

[Jani Nikula]

All users of valleyview_enable_display_irqs() and
valleyview_disable_display_irqs() have a lock/unlock pair. Move the
locking inside the functions.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c    | 13 +++++++++----
 .../gpu/drm/i915/display/intel_display_power_well.c |  5 -----
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 22bb0fc10736..3d2294a4d83d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -2117,10 +2117,10 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	spin_lock_irq(&dev_priv->irq_lock);
 
 	if (display->irq.vlv_display_irqs_enabled)
-		return;
+		goto out;
 
 	display->irq.vlv_display_irqs_enabled = true;
 
@@ -2128,21 +2128,26 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 		_vlv_display_irq_reset(display);
 		vlv_display_irq_postinstall(display);
 	}
+
+out:
+	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 void valleyview_disable_display_irqs(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	spin_lock_irq(&dev_priv->irq_lock);
 
 	if (!display->irq.vlv_display_irqs_enabled)
-		return;
+		goto out;
 
 	display->irq.vlv_display_irqs_enabled = false;
 
 	if (intel_irqs_enabled(dev_priv))
 		_vlv_display_irq_reset(display);
+out:
+	spin_unlock_irq(&dev_priv->irq_lock);
 }
 
 void ilk_de_irq_postinstall(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 6335fa909a7b..b104bce0e14d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -1212,7 +1212,6 @@ static void vlv_init_display_clock_gating(struct intel_display *display)
 
 static void vlv_display_power_well_init(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_encoder *encoder;
 	enum pipe pipe;
 
@@ -1236,9 +1235,7 @@ static void vlv_display_power_well_init(struct intel_display *display)
 
 	vlv_init_display_clock_gating(display);
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	valleyview_enable_display_irqs(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 
 	/*
 	 * During driver initialization/resume we can avoid restoring the
@@ -1265,9 +1262,7 @@ static void vlv_display_power_well_deinit(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	valleyview_disable_display_irqs(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 
 	/* make sure we're done processing display irqs */
 	intel_synchronize_irq(dev_priv);
-- 
2.39.5

[PATCH 3/8] drm/i915/irq: move locking inside vlv_display_irq_postinstall()

[Jani Nikula]

All users of vlv_display_irq_postinstall() outside of
intel_display_irq.c have a lock/unlock pair. Move the locking inside the
function. Add an unlocked variant for internal use, similar to the
_vlv_display_irq_reset() and vlv_display_irq_reset() functions.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c    | 17 ++++++++++++-----
 drivers/gpu/drm/i915/i915_irq.c                 |  4 ----
 2 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 3d2294a4d83d..a0e08b8752e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1908,16 +1908,13 @@ static u32 vlv_error_mask(void)
 	return VLV_ERROR_PAGE_TABLE;
 }
 
-void vlv_display_irq_postinstall(struct intel_display *display)
+static void _vlv_display_irq_postinstall(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 pipestat_mask;
 	u32 enable_mask;
 	enum pipe pipe;
 
-	if (!display->irq.vlv_display_irqs_enabled)
-		return;
-
 	if (display->platform.cherryview)
 		intel_de_write(display, DPINVGTT,
 			       DPINVGTT_STATUS_MASK_CHV |
@@ -1954,6 +1951,16 @@ void vlv_display_irq_postinstall(struct intel_display *display)
 	intel_display_irq_regs_init(display, VLV_IRQ_REGS, dev_priv->irq_mask, enable_mask);
 }
 
+void vlv_display_irq_postinstall(struct intel_display *display)
+{
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
+
+	spin_lock_irq(&dev_priv->irq_lock);
+	if (display->irq.vlv_display_irqs_enabled)
+		_vlv_display_irq_postinstall(display);
+	spin_unlock_irq(&dev_priv->irq_lock);
+}
+
 void ibx_display_irq_reset(struct intel_display *display)
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
@@ -2126,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 
 	if (intel_irqs_enabled(dev_priv)) {
 		_vlv_display_irq_reset(display);
-		vlv_display_irq_postinstall(display);
+		_vlv_display_irq_postinstall(display);
 	}
 
 out:
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b918b440cbce..19d8a7c29eac 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -768,9 +768,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen5_gt_irq_postinstall(to_gt(dev_priv));
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	vlv_display_irq_postinstall(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 
 	intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
 	intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);
@@ -827,9 +825,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen8_gt_irq_postinstall(to_gt(dev_priv));
 
-	spin_lock_irq(&dev_priv->irq_lock);
 	vlv_display_irq_postinstall(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
 
 	intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
 	intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);
-- 
2.39.5

[PATCH 4/8] drm/i915/irq: split out i915_display_irq_postinstall()

[Jani Nikula]

Split out i915_display_irq_postinstall() similar to other platforms.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++++++++++
 drivers/gpu/drm/i915/display/intel_display_irq.h |  1 +
 drivers/gpu/drm/i915/i915_irq.c                  |  9 +--------
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index a0e08b8752e7..77cdd1ea5d00 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1902,6 +1902,22 @@ void i9xx_display_irq_reset(struct intel_display *display)
 	i9xx_pipestat_irq_reset(display);
 }
 
+void i915_display_irq_postinstall(struct intel_display *display)
+{
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
+
+	/*
+	 * Interrupt setup is already guaranteed to be single-threaded, this is
+	 * just to make the assert_spin_locked check happy.
+	 */
+	spin_lock_irq(&dev_priv->irq_lock);
+	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
+	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
+	spin_unlock_irq(&dev_priv->irq_lock);
+
+	i915_enable_asle_pipestat(display);
+}
+
 static u32 vlv_error_mask(void)
 {
 	/* TODO enable other errors too? */
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 5422426c6843..8fdce804c9d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -61,6 +61,7 @@ void vlv_display_irq_reset(struct intel_display *display);
 void gen8_display_irq_reset(struct intel_display *display);
 void gen11_display_irq_reset(struct intel_display *display);
 
+void i915_display_irq_postinstall(struct intel_display *display);
 void vlv_display_irq_postinstall(struct intel_display *display);
 void ilk_de_irq_postinstall(struct intel_display *display);
 void gen8_de_irq_postinstall(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 19d8a7c29eac..30c78177ae0d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -935,14 +935,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
 
-	/* Interrupt setup is already guaranteed to be single-threaded, this is
-	 * just to make the assert_spin_locked check happy. */
-	spin_lock_irq(&dev_priv->irq_lock);
-	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	spin_unlock_irq(&dev_priv->irq_lock);
-
-	i915_enable_asle_pipestat(display);
+	i915_display_irq_postinstall(display);
 }
 
 static irqreturn_t i915_irq_handler(int irq, void *arg)
-- 
2.39.5

[PATCH 5/8] drm/i915/irq: split out i965_display_irq_postinstall()

[Jani Nikula]

Split out i965_display_irq_postinstall() similar to other platforms.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c    | 17 +++++++++++++++++
 .../gpu/drm/i915/display/intel_display_irq.h    |  1 +
 drivers/gpu/drm/i915/i915_irq.c                 | 10 +---------
 3 files changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 77cdd1ea5d00..989b78339aa4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1918,6 +1918,23 @@ void i915_display_irq_postinstall(struct intel_display *display)
 	i915_enable_asle_pipestat(display);
 }
 
+void i965_display_irq_postinstall(struct intel_display *display)
+{
+	struct drm_i915_private *dev_priv = to_i915(display->drm);
+
+	/*
+	 * Interrupt setup is already guaranteed to be single-threaded, this is
+	 * just to make the assert_spin_locked check happy.
+	 */
+	spin_lock_irq(&dev_priv->irq_lock);
+	i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
+	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
+	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
+	spin_unlock_irq(&dev_priv->irq_lock);
+
+	i915_enable_asle_pipestat(display);
+}
+
 static u32 vlv_error_mask(void)
 {
 	/* TODO enable other errors too? */
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 8fdce804c9d7..4c0ed476e568 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -62,6 +62,7 @@ void gen8_display_irq_reset(struct intel_display *display);
 void gen11_display_irq_reset(struct intel_display *display);
 
 void i915_display_irq_postinstall(struct intel_display *display);
+void i965_display_irq_postinstall(struct intel_display *display);
 void vlv_display_irq_postinstall(struct intel_display *display);
 void ilk_de_irq_postinstall(struct intel_display *display);
 void gen8_de_irq_postinstall(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 30c78177ae0d..95042879bec4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1053,15 +1053,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
 
 	gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
 
-	/* Interrupt setup is already guaranteed to be single-threaded, this is
-	 * just to make the assert_spin_locked check happy. */
-	spin_lock_irq(&dev_priv->irq_lock);
-	i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
-	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	spin_unlock_irq(&dev_priv->irq_lock);
-
-	i915_enable_asle_pipestat(display);
+	i965_display_irq_postinstall(display);
 }
 
 static irqreturn_t i965_irq_handler(int irq, void *arg)
-- 
2.39.5

[PATCH 6/8] drm/i915/irq: make i915_enable_asle_pipestat() static

[Jani Nikula]

With all users of i915_enable_asle_pipestat() inside
intel_display_irq.c, we can make the function static.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 7 ++-----
 drivers/gpu/drm/i915/display/intel_display_irq.h | 1 -
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 989b78339aa4..0d72964694ce 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -377,11 +377,8 @@ static bool i915_has_legacy_blc_interrupt(struct intel_display *display)
 	return IS_DISPLAY_VER(display, 3, 4) && display->platform.mobile;
 }
 
-/**
- * i915_enable_asle_pipestat - enable ASLE pipestat for OpRegion
- * @display: display device
- */
-void i915_enable_asle_pipestat(struct intel_display *display)
+/* enable ASLE pipestat for OpRegion */
+static void i915_enable_asle_pipestat(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 4c0ed476e568..c66db3851da4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -72,7 +72,6 @@ void dg1_de_irq_postinstall(struct intel_display *display);
 u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
-void i915_enable_asle_pipestat(struct intel_display *display);
 
 void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
 
-- 
2.39.5

[PATCH 7/8] drm/i915/rps: refactor display rps support

[Jani Nikula]

Make the gt rps code and display irq code interact via
intel_display_rps.[ch], instead of direct access. Add no-op static
inline stubs for xe instead of having a separate build unit doing
nothing. All of this clarifies the interfaces between i915 core and
display.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  |  5 ++--
 .../gpu/drm/i915/display/intel_display_rps.c  | 27 +++++++++++++++++++
 .../gpu/drm/i915/display/intel_display_rps.h  | 24 +++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_rps.c           | 10 +++----
 drivers/gpu/drm/xe/Makefile                   |  1 -
 .../drm/xe/compat-i915-headers/gt/intel_rps.h | 11 --------
 drivers/gpu/drm/xe/display/xe_display_rps.c   | 17 ------------
 7 files changed, 56 insertions(+), 39 deletions(-)
 delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
 delete mode 100644 drivers/gpu/drm/xe/display/xe_display_rps.c

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 0d72964694ce..264ddeba121b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -5,7 +5,6 @@
 
 #include <drm/drm_vblank.h>
 
-#include "gt/intel_rps.h"
 #include "i915_drv.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
@@ -15,6 +14,7 @@
 #include "intel_de.h"
 #include "intel_display_irq.h"
 #include "intel_display_rpm.h"
+#include "intel_display_rps.h"
 #include "intel_display_trace.h"
 #include "intel_display_types.h"
 #include "intel_dmc_wl.h"
@@ -876,7 +876,6 @@ static void ilk_gtt_fault_irq_handler(struct intel_display *display)
 
 void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
 {
-	struct drm_i915_private __maybe_unused *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 	u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
 
@@ -923,7 +922,7 @@ void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
 	}
 
 	if (DISPLAY_VER(display) == 5 && de_iir & DE_PCU_EVENT)
-		gen5_rps_irq_handler(&to_gt(dev_priv)->rps);
+		ilk_display_rps_irq_handler(display);
 }
 
 void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index 4074a1879828..941bff5a5eb0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -8,6 +8,8 @@
 
 #include "gt/intel_rps.h"
 #include "i915_drv.h"
+#include "i915_reg.h"
+#include "intel_display_irq.h"
 #include "intel_display_rps.h"
 #include "intel_display_types.h"
 
@@ -81,3 +83,28 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
 	intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
 	state->rps_interactive = interactive;
 }
+
+void ilk_display_rps_enable(struct intel_display *display)
+{
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	spin_lock(&i915->irq_lock);
+	ilk_enable_display_irq(display, DE_PCU_EVENT);
+	spin_unlock(&i915->irq_lock);
+}
+
+void ilk_display_rps_disable(struct intel_display *display)
+{
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	spin_lock(&i915->irq_lock);
+	ilk_disable_display_irq(display, DE_PCU_EVENT);
+	spin_unlock(&i915->irq_lock);
+}
+
+void ilk_display_rps_irq_handler(struct intel_display *display)
+{
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	gen5_rps_irq_handler(&to_gt(i915)->rps);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.h b/drivers/gpu/drm/i915/display/intel_display_rps.h
index 556891edb2dd..183d154f2c7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.h
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.h
@@ -13,10 +13,34 @@ struct drm_crtc;
 struct intel_atomic_state;
 struct intel_display;
 
+#ifdef I915
 void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
 					  struct dma_fence *fence);
 void intel_display_rps_mark_interactive(struct intel_display *display,
 					struct intel_atomic_state *state,
 					bool interactive);
+void ilk_display_rps_enable(struct intel_display *display);
+void ilk_display_rps_disable(struct intel_display *display);
+void ilk_display_rps_irq_handler(struct intel_display *display);
+#else
+static inline void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
+							struct dma_fence *fence)
+{
+}
+static inline void intel_display_rps_mark_interactive(struct intel_display *display,
+						      struct intel_atomic_state *state,
+						      bool interactive)
+{
+}
+static inline void ilk_display_rps_enable(struct intel_display *display)
+{
+}
+static inline void ilk_display_rps_disable(struct intel_display *display)
+{
+}
+static inline void ilk_display_rps_irq_handler(struct intel_display *display)
+{
+}
+#endif
 
 #endif /* __INTEL_DISPLAY_RPS_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index b609e3aa2122..5abc5fcc2514 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -8,7 +8,7 @@
 #include <drm/intel/i915_drm.h>
 
 #include "display/intel_display.h"
-#include "display/intel_display_irq.h"
+#include "display/intel_display_rps.h"
 #include "i915_drv.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
@@ -608,9 +608,7 @@ static bool gen5_rps_enable(struct intel_rps *rps)
 	rps->ips.last_count2 = intel_uncore_read(uncore, GFXEC);
 	rps->ips.last_time2 = ktime_get_raw_ns();
 
-	spin_lock(&i915->irq_lock);
-	ilk_enable_display_irq(display, DE_PCU_EVENT);
-	spin_unlock(&i915->irq_lock);
+	ilk_display_rps_enable(display);
 
 	spin_unlock_irq(&mchdev_lock);
 
@@ -628,9 +626,7 @@ static void gen5_rps_disable(struct intel_rps *rps)
 
 	spin_lock_irq(&mchdev_lock);
 
-	spin_lock(&i915->irq_lock);
-	ilk_disable_display_irq(display, DE_PCU_EVENT);
-	spin_unlock(&i915->irq_lock);
+	ilk_display_rps_disable(display);
 
 	rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
 
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 3ecac0a38b82..e4bf484d4121 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -187,7 +187,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	display/xe_display.o \
 	display/xe_display_misc.o \
 	display/xe_display_rpm.o \
-	display/xe_display_rps.o \
 	display/xe_display_wa.o \
 	display/xe_dsb_buffer.o \
 	display/xe_fb_pin.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
deleted file mode 100644
index 21fec9cc837c..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __INTEL_RPS_H__
-#define __INTEL_RPS_H__
-
-#define gen5_rps_irq_handler(x) ({})
-
-#endif /* __INTEL_RPS_H__ */
diff --git a/drivers/gpu/drm/xe/display/xe_display_rps.c b/drivers/gpu/drm/xe/display/xe_display_rps.c
deleted file mode 100644
index fa616f9688a5..000000000000
--- a/drivers/gpu/drm/xe/display/xe_display_rps.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "intel_display_rps.h"
-
-void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
-					  struct dma_fence *fence)
-{
-}
-
-void intel_display_rps_mark_interactive(struct intel_display *display,
-					struct intel_atomic_state *state,
-					bool interactive)
-{
-}
-- 
2.39.5

[PATCH 8/8] drm/i915/irq: move i915->irq_lock to display->irq.lock

[Jani Nikula]

Observe that i915->irq_lock is no longer used to protect anything
outside of display. Make it a display thing.

This allows us to remove the ugly #define irq_lock irq.lock hack from xe
compat header.

Note that this is slightly more subtle than it first looks. For i915,
there's no functional change here. The lock is moved. However, for xe,
we'll now have *two* locks, xe->irq.lock and display->irq.lock. These
should protect different things, though. Indeed, nesting in the past
would've lead to a deadlock because they were the same lock.

With the i915 references gone, we can make a handful more files
independent of i915_drv.h.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_plane.c     |  43 +++---
 .../gpu/drm/i915/display/intel_display_core.h |   3 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 114 +++++++---------
 .../gpu/drm/i915/display/intel_display_rps.c  |  12 +-
 .../drm/i915/display/intel_display_types.h    |   2 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  10 +-
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c  |   9 +-
 .../drm/i915/display/intel_fifo_underrun.c    |  44 +++---
 drivers/gpu/drm/i915/display/intel_hotplug.c  | 129 +++++++-----------
 .../gpu/drm/i915/display/intel_hotplug_irq.c  |  22 ++-
 drivers/gpu/drm/i915/display/intel_tv.c       |  14 +-
 .../drm/i915/display/skl_universal_plane.c    |  10 +-
 drivers/gpu/drm/i915/i915_driver.c            |   1 -
 drivers/gpu/drm/i915/i915_drv.h               |   2 -
 .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  11 --
 15 files changed, 168 insertions(+), 258 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 5e8344fdfc28..83778a6ff007 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -7,9 +7,10 @@
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_blend.h>
 #include <drm/drm_fourcc.h>
+#include <drm/drm_print.h>
 
-#include "i915_drv.h"
 #include "i915_reg.h"
+#include "i915_utils.h"
 #include "i9xx_plane.h"
 #include "i9xx_plane_regs.h"
 #include "intel_atomic.h"
@@ -631,92 +632,84 @@ static void
 bdw_primary_enable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 bdw_primary_disable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 ivb_primary_enable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 ivb_primary_disable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 ilk_primary_enable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 ilk_primary_disable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 vlv_primary_enable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	i915_enable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 vlv_primary_disable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	i915_disable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static bool i9xx_plane_can_async_flip(u64 modifier)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index dc834cef75c7..ebbd3618260c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -458,6 +458,9 @@ struct intel_display {
 	} ips;
 
 	struct {
+		/* protects the irq masks */
+		spinlock_t lock;
+
 		/*
 		 * Most platforms treat the display irq block as an always-on
 		 * power domain. vlv/chv can disable it at runtime and need
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 264ddeba121b..3e73832e5e81 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -135,7 +135,7 @@ void ilk_update_display_irq(struct intel_display *display,
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
 	new_val = dev_priv->irq_mask;
@@ -173,7 +173,7 @@ void bdw_update_port_irq(struct intel_display *display,
 	u32 new_val;
 	u32 old_val;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
@@ -206,7 +206,7 @@ static void bdw_update_pipe_irq(struct intel_display *display,
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 new_val;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
@@ -254,7 +254,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
 
 	drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
 		return;
@@ -276,11 +276,10 @@ void ibx_disable_display_interrupt(struct intel_display *display, u32 bits)
 u32 i915_pipestat_enable_mask(struct intel_display *display,
 			      enum pipe pipe)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 status_mask = display->irq.pipestat_irq_mask[pipe];
 	u32 enable_mask = status_mask << 16;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (DISPLAY_VER(display) < 5)
 		goto out;
@@ -329,7 +328,7 @@ void i915_enable_pipestat(struct intel_display *display,
 		      "pipe %c: status_mask=0x%x\n",
 		      pipe_name(pipe), status_mask);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
@@ -353,7 +352,7 @@ void i915_disable_pipestat(struct intel_display *display,
 		      "pipe %c: status_mask=0x%x\n",
 		      pipe_name(pipe), status_mask);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 	drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
 
 	if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
@@ -380,22 +379,20 @@ static bool i915_has_legacy_blc_interrupt(struct intel_display *display)
 /* enable ASLE pipestat for OpRegion */
 static void i915_enable_asle_pipestat(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	if (!intel_opregion_asle_present(display))
 		return;
 
 	if (!i915_has_legacy_blc_interrupt(display))
 		return;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	i915_enable_pipestat(display, PIPE_B, PIPE_LEGACY_BLC_EVENT_STATUS);
 	if (DISPLAY_VER(display) >= 4)
 		i915_enable_pipestat(display, PIPE_A,
 				     PIPE_LEGACY_BLC_EVENT_STATUS);
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 #if IS_ENABLED(CONFIG_DEBUG_FS)
@@ -514,14 +511,13 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display)
 void i9xx_pipestat_irq_ack(struct intel_display *display,
 			   u32 iir, u32 pipe_stats[I915_MAX_PIPES])
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 
-	spin_lock(&dev_priv->irq_lock);
+	spin_lock(&display->irq.lock);
 
 	if ((display->platform.valleyview || display->platform.cherryview) &&
 	    !display->irq.vlv_display_irqs_enabled) {
-		spin_unlock(&dev_priv->irq_lock);
+		spin_unlock(&display->irq.lock);
 		return;
 	}
 
@@ -576,7 +572,7 @@ void i9xx_pipestat_irq_ack(struct intel_display *display,
 			intel_de_write(display, reg, enable_mask);
 		}
 	}
-	spin_unlock(&dev_priv->irq_lock);
+	spin_unlock(&display->irq.lock);
 }
 
 void i915_pipestat_irq_handler(struct intel_display *display,
@@ -1566,13 +1562,12 @@ void i915gm_irq_cstate_wa(struct intel_display *display, bool enable)
 int i8xx_enable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	i915_enable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 
 	return 0;
 }
@@ -1580,13 +1575,12 @@ int i8xx_enable_vblank(struct drm_crtc *crtc)
 void i8xx_disable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	i915_disable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 }
 
 int i915gm_enable_vblank(struct drm_crtc *crtc)
@@ -1610,14 +1604,13 @@ void i915gm_disable_vblank(struct drm_crtc *crtc)
 int i965_enable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	i915_enable_pipestat(display, pipe,
 			     PIPE_START_VBLANK_INTERRUPT_STATUS);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 
 	return 0;
 }
@@ -1625,28 +1618,26 @@ int i965_enable_vblank(struct drm_crtc *crtc)
 void i965_disable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	i915_disable_pipestat(display, pipe,
 			      PIPE_START_VBLANK_INTERRUPT_STATUS);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 }
 
 int ilk_enable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 	u32 bit = DISPLAY_VER(display) >= 7 ?
 		DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	ilk_enable_display_irq(display, bit);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 
 	/* Even though there is no DMC, frame counter can get stuck when
 	 * PSR is active as no frames are generated.
@@ -1660,15 +1651,14 @@ int ilk_enable_vblank(struct drm_crtc *crtc)
 void ilk_disable_vblank(struct drm_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc->dev);
-	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
 	enum pipe pipe = to_intel_crtc(crtc)->pipe;
 	unsigned long irqflags;
 	u32 bit = DISPLAY_VER(display) >= 7 ?
 		DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	ilk_disable_display_irq(display, bit);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 }
 
 static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
@@ -1707,7 +1697,6 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
 {
 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	unsigned long irqflags;
 
@@ -1717,9 +1706,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
 	if (crtc->vblank_psr_notify && display->irq.vblank_enable_count++ == 0)
 		schedule_work(&display->irq.vblank_notify_work);
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 
 	/* Even if there is no DMC, frame counter can get stuck when
 	 * PSR is active as no frames are generated, so check only for PSR.
@@ -1734,16 +1723,15 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
 {
 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	unsigned long irqflags;
 
 	if (gen11_dsi_configure_te(crtc, false))
 		return;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
+	spin_lock_irqsave(&display->irq.lock, irqflags);
 	bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+	spin_unlock_irqrestore(&display->irq.lock, irqflags);
 
 	if (crtc->vblank_psr_notify && --display->irq.vblank_enable_count == 0)
 		schedule_work(&display->irq.vblank_notify_work);
@@ -1880,12 +1868,10 @@ static void _vlv_display_irq_reset(struct intel_display *display)
 
 void vlv_display_irq_reset(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	if (display->irq.vlv_display_irqs_enabled)
 		_vlv_display_irq_reset(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void i9xx_display_irq_reset(struct intel_display *display)
@@ -1900,33 +1886,29 @@ void i9xx_display_irq_reset(struct intel_display *display)
 
 void i915_display_irq_postinstall(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	/*
 	 * Interrupt setup is already guaranteed to be single-threaded, this is
 	 * just to make the assert_spin_locked check happy.
 	 */
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
 	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	i915_enable_asle_pipestat(display);
 }
 
 void i965_display_irq_postinstall(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	/*
 	 * Interrupt setup is already guaranteed to be single-threaded, this is
 	 * just to make the assert_spin_locked check happy.
 	 */
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
 	i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
 	i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	i915_enable_asle_pipestat(display);
 }
@@ -1982,12 +1964,10 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
 
 void vlv_display_irq_postinstall(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	if (display->irq.vlv_display_irqs_enabled)
 		_vlv_display_irq_postinstall(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void ibx_display_irq_reset(struct intel_display *display)
@@ -2084,10 +2064,10 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 		gen8_de_pipe_flip_done_mask(display);
 	enum pipe pipe;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (!intel_irqs_enabled(dev_priv)) {
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
 
@@ -2096,7 +2076,7 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 					    display->irq.de_irq_mask[pipe],
 					    ~display->irq.de_irq_mask[pipe] | extra_ier);
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void gen8_irq_power_well_pre_disable(struct intel_display *display,
@@ -2105,17 +2085,17 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (!intel_irqs_enabled(dev_priv)) {
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 		return;
 	}
 
 	for_each_pipe_masked(display, pipe, pipe_mask)
 		intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	/* make sure we're done processing display irqs */
 	intel_synchronize_irq(dev_priv);
@@ -2153,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (display->irq.vlv_display_irqs_enabled)
 		goto out;
@@ -2166,14 +2146,14 @@ void valleyview_enable_display_irqs(struct intel_display *display)
 	}
 
 out:
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void valleyview_disable_display_irqs(struct intel_display *display)
 {
 	struct drm_i915_private *dev_priv = to_i915(display->drm);
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (!display->irq.vlv_display_irqs_enabled)
 		goto out;
@@ -2183,7 +2163,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
 	if (intel_irqs_enabled(dev_priv))
 		_vlv_display_irq_reset(display);
 out:
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void ilk_de_irq_postinstall(struct intel_display *display)
@@ -2371,6 +2351,8 @@ void dg1_de_irq_postinstall(struct intel_display *display)
 
 void intel_display_irq_init(struct intel_display *display)
 {
+	spin_lock_init(&display->irq.lock);
+
 	display->drm->vblank_disable_immediate = true;
 
 	intel_hotplug_irq_init(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index 941bff5a5eb0..678b24115951 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -86,20 +86,16 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
 
 void ilk_display_rps_enable(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	spin_lock(&i915->irq_lock);
+	spin_lock(&display->irq.lock);
 	ilk_enable_display_irq(display, DE_PCU_EVENT);
-	spin_unlock(&i915->irq_lock);
+	spin_unlock(&display->irq.lock);
 }
 
 void ilk_display_rps_disable(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	spin_lock(&i915->irq_lock);
+	spin_lock(&display->irq.lock);
 	ilk_disable_display_irq(display, DE_PCU_EVENT);
-	spin_unlock(&i915->irq_lock);
+	spin_unlock(&display->irq.lock);
 }
 
 void ilk_display_rps_irq_handler(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 7415564d058a..d6d0440dcee9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1388,7 +1388,7 @@ struct intel_crtc {
 	/* armed event for DSB based updates */
 	struct drm_pending_vblank_event *dsb_event;
 
-	/* Access to these should be protected by dev_priv->irq_lock. */
+	/* Access to these should be protected by display->irq.lock. */
 	bool cpu_fifo_underrun_disabled;
 	bool pch_fifo_underrun_disabled;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b299b5d8b68e..593b29b56714 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -45,12 +45,13 @@
 #include <drm/drm_crtc.h>
 #include <drm/drm_edid.h>
 #include <drm/drm_fixed.h>
+#include <drm/drm_print.h>
 #include <drm/drm_probe_helper.h>
 
 #include "g4x_dp.h"
-#include "i915_drv.h"
 #include "i915_irq.h"
 #include "i915_reg.h"
+#include "i915_utils.h"
 #include "intel_alpm.h"
 #include "intel_atomic.h"
 #include "intel_audio.h"
@@ -58,6 +59,7 @@
 #include "intel_combo_phy_regs.h"
 #include "intel_connector.h"
 #include "intel_crtc.h"
+#include "intel_crtc_state_dump.h"
 #include "intel_cx0_phy.h"
 #include "intel_ddi.h"
 #include "intel_de.h"
@@ -92,7 +94,6 @@
 #include "intel_tc.h"
 #include "intel_vdsc.h"
 #include "intel_vrr.h"
-#include "intel_crtc_state_dump.h"
 
 /* DP DSC throughput values used for slice count calculations KPixels/s */
 #define DP_DSC_PEAK_PIXEL_RATE			2720000
@@ -6219,12 +6220,11 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector,
 	struct intel_connector *connector = to_intel_connector(_connector);
 	struct intel_display *display = to_intel_display(connector);
 	struct intel_encoder *encoder = intel_attached_encoder(connector);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	bool hpd_high = hpd_state == connector_status_connected;
 	unsigned int hpd_pin = encoder->hpd_pin;
 	bool need_work = false;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	if (hpd_high != test_bit(hpd_pin, &display->hotplug.oob_hotplug_last_state)) {
 		display->hotplug.event_bits |= BIT(hpd_pin);
 
@@ -6233,7 +6233,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector,
 			     hpd_high);
 		need_work = true;
 	}
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	if (need_work)
 		intel_hpd_schedule_detection(display);
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 4e92504f5c14..29c920983413 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -31,16 +31,16 @@
 #include <linux/pinctrl/machine.h>
 #include <linux/slab.h>
 #include <linux/string_helpers.h>
-
 #include <linux/unaligned.h>
 
 #include <drm/drm_crtc.h>
 #include <drm/drm_edid.h>
+#include <drm/drm_print.h>
 
 #include <video/mipi_display.h>
 
-#include "i915_drv.h"
 #include "i915_reg.h"
+#include "i915_utils.h"
 #include "intel_de.h"
 #include "intel_display_types.h"
 #include "intel_dsi.h"
@@ -321,7 +321,6 @@ enum {
 static void icl_native_gpio_set_value(struct intel_display *display,
 				      int gpio, bool value)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	int index;
 
 	if (drm_WARN_ON(display->drm, DISPLAY_VER(display) == 11 && gpio >= MIPI_RESET_2))
@@ -341,12 +340,12 @@ static void icl_native_gpio_set_value(struct intel_display *display,
 		 * The locking protects against concurrent SHOTPLUG_CTL_DDI
 		 * modifications in irq setup and handling.
 		 */
-		spin_lock_irq(&dev_priv->irq_lock);
+		spin_lock_irq(&display->irq.lock);
 		intel_de_rmw(display, SHOTPLUG_CTL_DDI,
 			     SHOTPLUG_CTL_DDI_HPD_ENABLE(index) |
 			     SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index),
 			     value ? SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index) : 0);
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 		break;
 	case MIPI_AVDD_EN_1:
 	case MIPI_AVDD_EN_2:
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 7c7cd29b0944..2a787897b2d3 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -25,7 +25,8 @@
  *
  */
 
-#include "i915_drv.h"
+#include <drm/drm_print.h>
+
 #include "i915_reg.h"
 #include "intel_de.h"
 #include "intel_display_irq.h"
@@ -57,11 +58,10 @@
 
 static bool ivb_can_enable_err_int(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc;
 	enum pipe pipe;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	for_each_pipe(display, pipe) {
 		crtc = intel_crtc_for_pipe(display, pipe);
@@ -75,11 +75,10 @@ static bool ivb_can_enable_err_int(struct intel_display *display)
 
 static bool cpt_can_enable_serr_int(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	enum pipe pipe;
 	struct intel_crtc *crtc;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	for_each_pipe(display, pipe) {
 		crtc = intel_crtc_for_pipe(display, pipe);
@@ -94,11 +93,10 @@ static bool cpt_can_enable_serr_int(struct intel_display *display)
 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	i915_reg_t reg = PIPESTAT(display, crtc->pipe);
 	u32 enable_mask;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if ((intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
 		return;
@@ -115,10 +113,9 @@ static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
 					     enum pipe pipe,
 					     bool enable, bool old)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	i915_reg_t reg = PIPESTAT(display, pipe);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (enable) {
 		u32 enable_mask = i915_pipestat_enable_mask(display, pipe);
@@ -148,11 +145,10 @@ static void ilk_set_fifo_underrun_reporting(struct intel_display *display,
 static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
 	u32 err_int = intel_de_read(display, GEN7_ERR_INT);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if ((err_int & ERR_INT_FIFO_UNDERRUN(pipe)) == 0)
 		return;
@@ -213,11 +209,10 @@ static void ibx_set_fifo_underrun_reporting(struct intel_display *display,
 static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(crtc);
-	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pch_transcoder = crtc->pipe;
 	u32 serr_int = intel_de_read(display, SERR_INT);
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if ((serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) == 0)
 		return;
@@ -258,11 +253,10 @@ static void cpt_set_fifo_underrun_reporting(struct intel_display *display,
 static bool __intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
 						    enum pipe pipe, bool enable)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
 	bool old;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	old = !crtc->cpu_fifo_underrun_disabled;
 	crtc->cpu_fifo_underrun_disabled = !enable;
@@ -298,13 +292,12 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct intel_display *displa
 bool intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
 					   enum pipe pipe, bool enable)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	unsigned long flags;
 	bool ret;
 
-	spin_lock_irqsave(&dev_priv->irq_lock, flags);
+	spin_lock_irqsave(&display->irq.lock, flags);
 	ret = __intel_set_cpu_fifo_underrun_reporting(display, pipe, enable);
-	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
+	spin_unlock_irqrestore(&display->irq.lock, flags);
 
 	return ret;
 }
@@ -327,7 +320,6 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
 					   enum pipe pch_transcoder,
 					   bool enable)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pch_transcoder);
 	unsigned long flags;
 	bool old;
@@ -341,7 +333,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
 	 * crtc on LPT won't cause issues.
 	 */
 
-	spin_lock_irqsave(&dev_priv->irq_lock, flags);
+	spin_lock_irqsave(&display->irq.lock, flags);
 
 	old = !crtc->pch_fifo_underrun_disabled;
 	crtc->pch_fifo_underrun_disabled = !enable;
@@ -355,7 +347,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
 						pch_transcoder,
 						enable, old);
 
-	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
+	spin_unlock_irqrestore(&display->irq.lock, flags);
 	return old;
 }
 
@@ -422,10 +414,9 @@ void intel_pch_fifo_underrun_irq_handler(struct intel_display *display,
  */
 void intel_check_cpu_fifo_underruns(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	for_each_intel_crtc(display->drm, crtc) {
 		if (crtc->cpu_fifo_underrun_disabled)
@@ -437,7 +428,7 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
 			ivb_check_fifo_underruns(crtc);
 	}
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 /**
@@ -450,10 +441,9 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
  */
 void intel_check_pch_fifo_underruns(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_crtc *crtc;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	for_each_intel_crtc(display->drm, crtc) {
 		if (crtc->pch_fifo_underrun_disabled)
@@ -463,7 +453,7 @@ void intel_check_pch_fifo_underruns(struct intel_display *display)
 			cpt_check_pch_fifo_underruns(crtc);
 	}
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void intel_init_fifo_underrun_reporting(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 6885e5a09079..fc5d8928c37e 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -183,9 +183,7 @@ static bool intel_hpd_irq_storm_detect(struct intel_display *display,
 
 static bool detection_work_enabled(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	return display->hotplug.detection_work_enabled;
 }
@@ -195,7 +193,7 @@ mod_delayed_detection_work(struct intel_display *display, struct delayed_work *w
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (!detection_work_enabled(display))
 		return false;
@@ -208,7 +206,7 @@ queue_delayed_detection_work(struct intel_display *display, struct delayed_work
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (!detection_work_enabled(display))
 		return false;
@@ -221,7 +219,7 @@ queue_detection_work(struct intel_display *display, struct work_struct *work)
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (!detection_work_enabled(display))
 		return false;
@@ -232,12 +230,11 @@ queue_detection_work(struct intel_display *display, struct work_struct *work)
 static void
 intel_hpd_irq_storm_switch_to_polling(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct drm_connector_list_iter conn_iter;
 	struct intel_connector *connector;
 	bool hpd_disabled = false;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	drm_connector_list_iter_begin(display->drm, &conn_iter);
 	for_each_intel_connector_iter(connector, &conn_iter) {
@@ -276,7 +273,6 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
 {
 	struct intel_display *display =
 		container_of(work, typeof(*display), hotplug.reenable_work.work);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct drm_connector_list_iter conn_iter;
 	struct intel_connector *connector;
 	struct ref_tracker *wakeref;
@@ -284,7 +280,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
 
 	wakeref = intel_display_rpm_get(display);
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	drm_connector_list_iter_begin(display->drm, &conn_iter);
 	for_each_intel_connector_iter(connector, &conn_iter) {
@@ -308,7 +304,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
 
 	intel_hpd_irq_setup(display);
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	intel_display_rpm_put(display, wakeref);
 }
@@ -376,9 +372,7 @@ static bool hpd_pin_has_pulse(struct intel_display *display, enum hpd_pin pin)
 
 static bool hpd_pin_is_blocked(struct intel_display *display, enum hpd_pin pin)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	return display->hotplug.stats[pin].blocked_count;
 }
@@ -400,14 +394,13 @@ static void i915_digport_work_func(struct work_struct *work)
 {
 	struct intel_display *display =
 		container_of(work, struct intel_display, hotplug.dig_port_work);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	u32 long_hpd_pin_mask, short_hpd_pin_mask;
 	struct intel_encoder *encoder;
 	u32 blocked_hpd_pin_mask;
 	u32 old_bits = 0;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
 	long_hpd_pin_mask = hotplug->long_hpd_pin_mask & ~blocked_hpd_pin_mask;
@@ -415,7 +408,7 @@ static void i915_digport_work_func(struct work_struct *work)
 	short_hpd_pin_mask = hotplug->short_hpd_pin_mask & ~blocked_hpd_pin_mask;
 	hotplug->short_hpd_pin_mask &= ~short_hpd_pin_mask;
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	for_each_intel_encoder(display->drm, encoder) {
 		struct intel_digital_port *dig_port;
@@ -442,11 +435,11 @@ static void i915_digport_work_func(struct work_struct *work)
 	}
 
 	if (old_bits) {
-		spin_lock_irq(&dev_priv->irq_lock);
+		spin_lock_irq(&display->irq.lock);
 		display->hotplug.event_bits |= old_bits;
 		queue_delayed_detection_work(display,
 					     &display->hotplug.hotplug_work, 0);
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 	}
 }
 
@@ -460,17 +453,16 @@ static void i915_digport_work_func(struct work_struct *work)
 void intel_hpd_trigger_irq(struct intel_digital_port *dig_port)
 {
 	struct intel_display *display = to_intel_display(dig_port);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	struct intel_encoder *encoder = &dig_port->base;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	hotplug->short_hpd_pin_mask |= BIT(encoder->hpd_pin);
 	if (!hpd_pin_is_blocked(display, encoder->hpd_pin))
 		queue_work(hotplug->dp_wq, &hotplug->dig_port_work);
 
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 /*
@@ -480,7 +472,6 @@ static void i915_hotplug_work_func(struct work_struct *work)
 {
 	struct intel_display *display =
 		container_of(work, struct intel_display, hotplug.hotplug_work.work);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	struct drm_connector_list_iter conn_iter;
 	struct intel_connector *connector;
@@ -494,7 +485,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
 	mutex_lock(&display->drm->mode_config.mutex);
 	drm_dbg_kms(display->drm, "running encoder hotplug functions\n");
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
 	hpd_event_bits = hotplug->event_bits & ~blocked_hpd_pin_mask;
@@ -505,7 +496,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
 	/* Enable polling for connectors which had HPD IRQ storms */
 	intel_hpd_irq_storm_switch_to_polling(display);
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	/* Skip calling encode hotplug handlers if ignore long HPD set*/
 	if (display->hotplug.ignore_long_hpd) {
@@ -569,13 +560,13 @@ static void i915_hotplug_work_func(struct work_struct *work)
 	/* Remove shared HPD pins that have changed */
 	retry &= ~changed;
 	if (retry) {
-		spin_lock_irq(&dev_priv->irq_lock);
+		spin_lock_irq(&display->irq.lock);
 		display->hotplug.retry_bits |= retry;
 
 		mod_delayed_detection_work(display,
 					   &display->hotplug.hotplug_work,
 					   msecs_to_jiffies(HPD_RETRY_DELAY));
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 	}
 }
 
@@ -599,7 +590,6 @@ static void i915_hotplug_work_func(struct work_struct *work)
 void intel_hpd_irq_handler(struct intel_display *display,
 			   u32 pin_mask, u32 long_mask)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_encoder *encoder;
 	bool storm_detected = false;
 	bool queue_dig = false, queue_hp = false;
@@ -610,7 +600,7 @@ void intel_hpd_irq_handler(struct intel_display *display,
 	if (!pin_mask)
 		return;
 
-	spin_lock(&dev_priv->irq_lock);
+	spin_lock(&display->irq.lock);
 
 	/*
 	 * Determine whether ->hpd_pulse() exists for each pin, and
@@ -711,7 +701,7 @@ void intel_hpd_irq_handler(struct intel_display *display,
 		queue_delayed_detection_work(display,
 					     &display->hotplug.hotplug_work, 0);
 
-	spin_unlock(&dev_priv->irq_lock);
+	spin_unlock(&display->irq.lock);
 }
 
 /**
@@ -730,7 +720,6 @@ void intel_hpd_irq_handler(struct intel_display *display,
  */
 void intel_hpd_init(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	int i;
 
 	if (!HAS_DISPLAY(display))
@@ -745,9 +734,9 @@ void intel_hpd_init(struct intel_display *display)
 	 * Interrupt setup is already guaranteed to be single-threaded, this is
 	 * just to make the assert_spin_locked checks happy.
 	 */
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	intel_hpd_irq_setup(display);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void i915_hpd_poll_detect_connectors(struct intel_display *display)
@@ -797,7 +786,6 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
 {
 	struct intel_display *display =
 		container_of(work, typeof(*display), hotplug.poll_init_work);
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct drm_connector_list_iter conn_iter;
 	struct intel_connector *connector;
 	intel_wakeref_t wakeref;
@@ -820,7 +808,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
 		cancel_work(&display->hotplug.poll_init_work);
 	}
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	drm_connector_list_iter_begin(display->drm, &conn_iter);
 	for_each_intel_connector_iter(connector, &conn_iter) {
@@ -841,7 +829,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
 	}
 	drm_connector_list_iter_end(&conn_iter);
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	if (enabled)
 		drm_kms_helper_poll_reschedule(display->drm);
@@ -879,8 +867,6 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
  */
 void intel_hpd_poll_enable(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	if (!HAS_DISPLAY(display) || !intel_display_device_enabled(display))
 		return;
 
@@ -892,10 +878,10 @@ void intel_hpd_poll_enable(struct intel_display *display)
 	 * As well, there's no issue if we race here since we always reschedule
 	 * this worker anyway
 	 */
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	queue_detection_work(display,
 			     &display->hotplug.poll_init_work);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 /**
@@ -919,17 +905,15 @@ void intel_hpd_poll_enable(struct intel_display *display)
  */
 void intel_hpd_poll_disable(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	if (!HAS_DISPLAY(display))
 		return;
 
 	WRITE_ONCE(display->hotplug.poll_enabled, false);
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	queue_detection_work(display,
 			     &display->hotplug.poll_init_work);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void intel_hpd_poll_fini(struct intel_display *display)
@@ -981,12 +965,10 @@ static bool cancel_all_detection_work(struct intel_display *display)
 
 void intel_hpd_cancel_work(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
 	if (!HAS_DISPLAY(display))
 		return;
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	drm_WARN_ON(display->drm, get_blocked_hpd_pin_mask(display));
 
@@ -995,7 +977,7 @@ void intel_hpd_cancel_work(struct intel_display *display)
 	display->hotplug.event_bits = 0;
 	display->hotplug.retry_bits = 0;
 
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	cancel_work_sync(&display->hotplug.dig_port_work);
 
@@ -1009,13 +991,12 @@ void intel_hpd_cancel_work(struct intel_display *display)
 
 static void queue_work_for_missed_irqs(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	bool queue_hp_work = false;
 	u32 blocked_hpd_pin_mask;
 	enum hpd_pin pin;
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
 	if ((hotplug->event_bits | hotplug->retry_bits) & ~blocked_hpd_pin_mask)
@@ -1043,10 +1024,9 @@ static void queue_work_for_missed_irqs(struct intel_display *display)
 
 static bool block_hpd_pin(struct intel_display *display, enum hpd_pin pin)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	hotplug->stats[pin].blocked_count++;
 
@@ -1055,10 +1035,9 @@ static bool block_hpd_pin(struct intel_display *display, enum hpd_pin pin)
 
 static bool unblock_hpd_pin(struct intel_display *display, enum hpd_pin pin)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 
-	lockdep_assert_held(&i915->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	if (drm_WARN_ON(display->drm, hotplug->stats[pin].blocked_count == 0))
 		return true;
@@ -1095,19 +1074,18 @@ static bool unblock_hpd_pin(struct intel_display *display, enum hpd_pin pin)
 void intel_hpd_block(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	bool do_flush = false;
 
 	if (encoder->hpd_pin == HPD_NONE)
 		return;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (block_hpd_pin(display, encoder->hpd_pin))
 		do_flush = true;
 
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	if (do_flush && hpd_pin_has_pulse(display, encoder->hpd_pin))
 		flush_work(&hotplug->dig_port_work);
@@ -1125,17 +1103,16 @@ void intel_hpd_block(struct intel_encoder *encoder)
 void intel_hpd_unblock(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (encoder->hpd_pin == HPD_NONE)
 		return;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (unblock_hpd_pin(display, encoder->hpd_pin))
 		queue_work_for_missed_irqs(display);
 
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 /**
@@ -1149,14 +1126,13 @@ void intel_hpd_unblock(struct intel_encoder *encoder)
 void intel_hpd_clear_and_unblock(struct intel_encoder *encoder)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	enum hpd_pin pin = encoder->hpd_pin;
 
 	if (pin == HPD_NONE)
 		return;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 
 	if (unblock_hpd_pin(display, pin)) {
 		hotplug->event_bits &= ~BIT(pin);
@@ -1165,39 +1141,34 @@ void intel_hpd_clear_and_unblock(struct intel_encoder *encoder)
 		hotplug->long_hpd_pin_mask &= ~BIT(pin);
 	}
 
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void intel_hpd_enable_detection_work(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	display->hotplug.detection_work_enabled = true;
 	queue_work_for_missed_irqs(display);
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 void intel_hpd_disable_detection_work(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
-
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	display->hotplug.detection_work_enabled = false;
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	cancel_all_detection_work(display);
 }
 
 bool intel_hpd_schedule_detection(struct intel_display *display)
 {
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	unsigned long flags;
 	bool ret;
 
-	spin_lock_irqsave(&i915->irq_lock, flags);
+	spin_lock_irqsave(&display->irq.lock, flags);
 	ret = queue_delayed_detection_work(display, &display->hotplug.hotplug_work, 0);
-	spin_unlock_irqrestore(&i915->irq_lock, flags);
+	spin_unlock_irqrestore(&display->irq.lock, flags);
 
 	return ret;
 }
@@ -1228,7 +1199,6 @@ static ssize_t i915_hpd_storm_ctl_write(struct file *file,
 {
 	struct seq_file *m = file->private_data;
 	struct intel_display *display = m->private;
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	unsigned int new_threshold;
 	int i;
@@ -1260,12 +1230,12 @@ static ssize_t i915_hpd_storm_ctl_write(struct file *file,
 	else
 		drm_dbg_kms(display->drm, "Disabling HPD storm detection\n");
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	hotplug->hpd_storm_threshold = new_threshold;
 	/* Reset the HPD storm stats so we don't accidentally trigger a storm */
 	for_each_hpd_pin(i)
 		hotplug->stats[i].count = 0;
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	/* Re-enable hpd immediately if we were in an irq storm */
 	flush_delayed_work(&display->hotplug.reenable_work);
@@ -1310,7 +1280,6 @@ static ssize_t i915_hpd_short_storm_ctl_write(struct file *file,
 {
 	struct seq_file *m = file->private_data;
 	struct intel_display *display = m->private;
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	struct intel_hotplug *hotplug = &display->hotplug;
 	char *newline;
 	char tmp[16];
@@ -1339,12 +1308,12 @@ static ssize_t i915_hpd_short_storm_ctl_write(struct file *file,
 	drm_dbg_kms(display->drm, "%sabling HPD short storm detection\n",
 		    new_state ? "En" : "Dis");
 
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	hotplug->hpd_short_storm_enabled = new_state;
 	/* Reset the HPD storm stats so we don't accidentally trigger a storm */
 	for_each_hpd_pin(i)
 		hotplug->stats[i].count = 0;
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 
 	/* Re-enable hpd immediately if we were in an irq storm */
 	flush_delayed_work(&display->hotplug.reenable_work);
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
index c841399e5c88..c024b42369c8 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
@@ -3,8 +3,10 @@
  * Copyright © 2023 Intel Corporation
  */
 
-#include "i915_drv.h"
+#include <drm/drm_print.h>
+
 #include "i915_reg.h"
+#include "i915_utils.h"
 #include "intel_de.h"
 #include "intel_display_irq.h"
 #include "intel_display_types.h"
@@ -183,9 +185,7 @@ static void intel_hpd_init_pins(struct intel_display *display)
 void i915_hotplug_interrupt_update_locked(struct intel_display *display,
 					  u32 mask, u32 bits)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 	drm_WARN_ON(display->drm, bits & ~mask);
 
 	intel_de_rmw(display, PORT_HOTPLUG_EN(display), mask, bits);
@@ -207,11 +207,9 @@ void i915_hotplug_interrupt_update(struct intel_display *display,
 				   u32 mask,
 				   u32 bits)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
-
-	spin_lock_irq(&dev_priv->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	i915_hotplug_interrupt_update_locked(display, mask, bits);
-	spin_unlock_irq(&dev_priv->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
@@ -556,7 +554,6 @@ void xelpdp_pica_irq_handler(struct intel_display *display, u32 iir)
 
 void icp_irq_handler(struct intel_display *display, u32 pch_iir)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_HOTPLUG_MASK_ICP;
 	u32 tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_MASK_ICP;
 	u32 pin_mask = 0, long_mask = 0;
@@ -565,9 +562,9 @@ void icp_irq_handler(struct intel_display *display, u32 pch_iir)
 		u32 dig_hotplug_reg;
 
 		/* Locking due to DSI native GPIO sequences */
-		spin_lock(&dev_priv->irq_lock);
+		spin_lock(&display->irq.lock);
 		dig_hotplug_reg = intel_de_rmw(display, SHOTPLUG_CTL_DDI, 0, 0);
-		spin_unlock(&dev_priv->irq_lock);
+		spin_unlock(&display->irq.lock);
 
 		intel_get_hpd_pins(display, &pin_mask, &long_mask,
 				   ddi_hotplug_trigger, dig_hotplug_reg,
@@ -1395,10 +1392,9 @@ static void i915_hpd_enable_detection(struct intel_encoder *encoder)
 
 static void i915_hpd_irq_setup(struct intel_display *display)
 {
-	struct drm_i915_private *dev_priv = to_i915(display->drm);
 	u32 hotplug_en;
 
-	lockdep_assert_held(&dev_priv->irq_lock);
+	lockdep_assert_held(&display->irq.lock);
 
 	/*
 	 * Note HDMI and DP share hotplug bits. Enable bits are the same for all
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index 2e3f3f0207e8..acf0b3733908 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -33,15 +33,15 @@
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc.h>
 #include <drm/drm_edid.h>
+#include <drm/drm_print.h>
 #include <drm/drm_probe_helper.h>
 
-#include "i915_drv.h"
 #include "i915_reg.h"
 #include "intel_connector.h"
 #include "intel_crtc.h"
 #include "intel_de.h"
-#include "intel_display_irq.h"
 #include "intel_display_driver.h"
+#include "intel_display_irq.h"
 #include "intel_display_types.h"
 #include "intel_dpll.h"
 #include "intel_hotplug.h"
@@ -1585,19 +1585,17 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
 {
 	struct intel_display *display = to_intel_display(connector->dev);
 	struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);
-	struct drm_device *dev = connector->dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
 	u32 tv_ctl, save_tv_ctl;
 	u32 tv_dac, save_tv_dac;
 	int type;
 
 	/* Disable TV interrupts around load detect or we'll recurse */
 	if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
-		spin_lock_irq(&dev_priv->irq_lock);
+		spin_lock_irq(&display->irq.lock);
 		i915_disable_pipestat(display, 0,
 				      PIPE_HOTPLUG_INTERRUPT_STATUS |
 				      PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 	}
 
 	save_tv_dac = tv_dac = intel_de_read(display, TV_DAC);
@@ -1668,11 +1666,11 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
 
 	/* Restore interrupt config */
 	if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
-		spin_lock_irq(&dev_priv->irq_lock);
+		spin_lock_irq(&display->irq.lock);
 		i915_enable_pipestat(display, 0,
 				     PIPE_HOTPLUG_INTERRUPT_STATUS |
 				     PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
-		spin_unlock_irq(&dev_priv->irq_lock);
+		spin_unlock_irq(&display->irq.lock);
 	}
 
 	return type;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 8739195aba69..844519286b1c 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2690,24 +2690,22 @@ static void
 skl_plane_enable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	bdw_enable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static void
 skl_plane_disable_flip_done(struct intel_plane *plane)
 {
 	struct intel_display *display = to_intel_display(plane);
-	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe = plane->pipe;
 
-	spin_lock_irq(&i915->irq_lock);
+	spin_lock_irq(&display->irq.lock);
 	bdw_disable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
-	spin_unlock_irq(&i915->irq_lock);
+	spin_unlock_irq(&display->irq.lock);
 }
 
 static bool skl_plane_has_rc_ccs(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 96a52f963475..273bc43468a0 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -234,7 +234,6 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
 
 	intel_uncore_mmio_debug_init_early(dev_priv);
 
-	spin_lock_init(&dev_priv->irq_lock);
 	spin_lock_init(&dev_priv->gpu_error.lock);
 
 	intel_sbi_init(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c0eec8fe5cad..d0e1980dcba2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -222,8 +222,6 @@ struct drm_i915_private {
 	};
 	unsigned int engine_uabi_class_count[I915_LAST_UABI_ENGINE_CLASS + 1];
 
-	/* protects the irq masks */
-	spinlock_t irq_lock;
 	bool irqs_enabled;
 
 	/* LPT/WPT IOSF sideband protection */
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index dd36f9b06b89..9b7572e06f34 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -60,15 +60,4 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
 #define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))
 #define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
 
-#ifdef CONFIG_ARM64
-/*
- * arm64 indirectly includes linux/rtc.h,
- * which defines a irq_lock, so include it
- * here before #define-ing it
- */
-#include <linux/rtc.h>
-#endif
-
-#define irq_lock irq.lock
-
 #endif
-- 
2.39.5

✗ Fi.CI.CHECKPATCH: warning for drm/i915: irq_lock refactoring, move to display

[Patchwork]

== Series Details ==

Series: drm/i915: irq_lock refactoring, move to display
URL   : https://patchwork.freedesktop.org/series/148638/
State : warning

== Summary ==

Error: dim checkpatch failed
2b2995ee212e drm/i915/irq: move locking inside vlv_display_irq_reset()
7bceb1a29160 drm/i915/irq: move locking inside valleyview_{enable, disable}_display_irqs()
be64b61c0853 drm/i915/irq: move locking inside vlv_display_irq_postinstall()
6a92198672f2 drm/i915/irq: split out i915_display_irq_postinstall()
722925dff335 drm/i915/irq: split out i965_display_irq_postinstall()
17d0ff49e4e5 drm/i915/irq: make i915_enable_asle_pipestat() static
059fbdd34ae3 drm/i915/rps: refactor display rps support
-:115: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#115: FILE: drivers/gpu/drm/i915/display/intel_display_rps.h:30:
+}
+static inline void intel_display_rps_mark_interactive(struct intel_display *display,

-:120: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#120: FILE: drivers/gpu/drm/i915/display/intel_display_rps.h:35:
+}
+static inline void ilk_display_rps_enable(struct intel_display *display)

-:123: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#123: FILE: drivers/gpu/drm/i915/display/intel_display_rps.h:38:
+}
+static inline void ilk_display_rps_disable(struct intel_display *display)

-:126: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#126: FILE: drivers/gpu/drm/i915/display/intel_display_rps.h:41:
+}
+static inline void ilk_display_rps_irq_handler(struct intel_display *display)

-:180: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#180: 
deleted file mode 100644

total: 0 errors, 1 warnings, 4 checks, 134 lines checked
b3d0f4345232 drm/i915/irq: move i915->irq_lock to display->irq.lock

✗ Fi.CI.SPARSE: warning for drm/i915: irq_lock refactoring, move to display

[Patchwork]

== Series Details ==

Series: drm/i915: irq_lock refactoring, move to display
URL   : https://patchwork.freedesktop.org/series/148638/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ i915.CI.BAT: success for drm/i915: irq_lock refactoring, move to display

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3180 bytes --]

== Series Details ==

Series: drm/i915: irq_lock refactoring, move to display
URL   : https://patchwork.freedesktop.org/series/148638/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_16507 -> Patchwork_148638v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/index.html

Participating hosts (44 -> 44)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_148638v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-dg2-8:          [PASS][1] -> [ABORT][2] ([i915#13696])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/bat-dg2-8/igt@i915_selftest@live.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/bat-dg2-8/igt@i915_selftest@live.html

  * igt@i915_selftest@live@client:
    - bat-dg2-8:          [PASS][3] -> [ABORT][4] ([i915#14201])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/bat-dg2-8/igt@i915_selftest@live@client.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/bat-dg2-8/igt@i915_selftest@live@client.html

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-11:         [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/bat-dg2-11/igt@i915_selftest@live@workarounds.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html
    - bat-dg2-14:         [PASS][7] -> [DMESG-FAIL][8] ([i915#12061]) +1 other test dmesg-fail
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/bat-dg2-14/igt@i915_selftest@live@workarounds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/bat-dg2-14/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@i915_module_load@load:
    - bat-twl-1:          [DMESG-WARN][9] ([i915#13736]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/bat-twl-1/igt@i915_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/bat-twl-1/igt@i915_module_load@load.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13696]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13696
  [i915#13736]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13736
  [i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201


Build changes
-------------

  * Linux: CI_DRM_16507 -> Patchwork_148638v1

  CI-20190529: 20190529
  CI_DRM_16507: 9f365ea4cf81b0d81ad82903e5605894ca4aba98 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8354: 59f7153426484367f58edfafb6567ce4e6a9e499 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_148638v1: 9f365ea4cf81b0d81ad82903e5605894ca4aba98 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/index.html

[-- Attachment #2: Type: text/html, Size: 3935 bytes --]

✗ i915.CI.Full: failure for drm/i915: irq_lock refactoring, move to display

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 97942 bytes --]

== Series Details ==

Series: drm/i915: irq_lock refactoring, move to display
URL   : https://patchwork.freedesktop.org/series/148638/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_16507_full -> Patchwork_148638v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_148638v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_148638v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 11)
------------------------------

  Additional (1): shard-dg2-set2 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_148638v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk4/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html

  
Known issues
------------

  Here are the changes found in Patchwork_148638v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@crc32:
    - shard-tglu-1:       NOTRUN -> [SKIP][2] ([i915#6230])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@api_intel_bb@crc32.html

  * igt@api_intel_bb@object-reloc-keep-cache:
    - shard-mtlp:         NOTRUN -> [SKIP][3] ([i915#8411])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@api_intel_bb@object-reloc-keep-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-mtlp:         NOTRUN -> [SKIP][4] ([i915#11078])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-tglu:         NOTRUN -> [SKIP][6] ([i915#7697])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
    - shard-tglu-1:       NOTRUN -> [SKIP][7] ([i915#6335])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@gem_create@create-ext-cpu-access-sanity-check.html

  * igt@gem_eio@hibernate:
    - shard-tglu:         [PASS][8] -> [ABORT][9] ([i915#10030] / [i915#7975] / [i915#8213])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-2/igt@gem_eio@hibernate.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-10/igt@gem_eio@hibernate.html
    - shard-mtlp:         [PASS][10] -> [ABORT][11] ([i915#13193] / [i915#13723] / [i915#7975])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-2/igt@gem_eio@hibernate.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-7/igt@gem_eio@hibernate.html
    - shard-rkl:          [PASS][12] -> [ABORT][13] ([i915#7975] / [i915#8213])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@gem_eio@hibernate.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@gem_eio@hibernate.html

  * igt@gem_eio@in-flight-external:
    - shard-mtlp:         [PASS][14] -> [ABORT][15] ([i915#13193] / [i915#13723]) +1 other test abort
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-1/igt@gem_eio@in-flight-external.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-7/igt@gem_eio@in-flight-external.html

  * igt@gem_exec_balancer@bonded-sync:
    - shard-mtlp:         NOTRUN -> [SKIP][16] ([i915#4771])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@gem_exec_balancer@bonded-sync.html

  * igt@gem_exec_balancer@bonded-true-hang:
    - shard-dg2-9:        NOTRUN -> [SKIP][17] ([i915#4812])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_exec_balancer@bonded-true-hang.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#4525])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_big@single:
    - shard-tglu:         NOTRUN -> [ABORT][19] ([i915#11713])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gem_exec_big@single.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-glk:          NOTRUN -> [SKIP][20] ([i915#6334]) +1 other test skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk4/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_fence@submit67:
    - shard-dg2:          NOTRUN -> [SKIP][21] ([i915#4812]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_exec_fence@submit67.html

  * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
    - shard-dg2:          NOTRUN -> [SKIP][22] ([i915#3281]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-cpu-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#3281]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@gem_exec_reloc@basic-cpu-noreloc.html

  * igt@gem_exec_reloc@basic-range:
    - shard-mtlp:         NOTRUN -> [SKIP][24] ([i915#3281]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_exec_reloc@basic-range.html

  * igt@gem_exec_reloc@basic-wc-gtt-noreloc:
    - shard-dg2-9:        NOTRUN -> [SKIP][25] ([i915#3281]) +4 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_exec_reloc@basic-wc-gtt-noreloc.html

  * igt@gem_exec_schedule@preempt-queue-contexts:
    - shard-dg2:          NOTRUN -> [SKIP][26] ([i915#4537] / [i915#4812])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_exec_schedule@preempt-queue-contexts.html

  * igt@gem_exec_whisper@basic-forked-all:
    - shard-rkl:          [PASS][27] -> [DMESG-WARN][28] ([i915#12964])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@gem_exec_whisper@basic-forked-all.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@gem_exec_whisper@basic-forked-all.html

  * igt@gem_fence_thrash@bo-write-verify-y:
    - shard-dg2-9:        NOTRUN -> [SKIP][29] ([i915#4860])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_fence_thrash@bo-write-verify-y.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy:
    - shard-dg2:          NOTRUN -> [SKIP][30] ([i915#4860])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@gem_fenced_exec_thrash@no-spare-fences-busy.html

  * igt@gem_lmem_swapping@heavy-random:
    - shard-rkl:          NOTRUN -> [SKIP][31] ([i915#4613]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@gem_lmem_swapping@heavy-random.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
    - shard-glk:          NOTRUN -> [SKIP][32] ([i915#4613])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk4/igt@gem_lmem_swapping@heavy-verify-multi.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-mtlp:         NOTRUN -> [SKIP][33] ([i915#4613]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-tglu-1:       NOTRUN -> [SKIP][34] ([i915#4613]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_lmem_swapping@random-engines:
    - shard-tglu:         NOTRUN -> [SKIP][35] ([i915#4613])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_madvise@dontneed-before-exec:
    - shard-mtlp:         NOTRUN -> [SKIP][36] ([i915#3282]) +1 other test skip
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_madvise@dontneed-before-exec.html

  * igt@gem_media_vme:
    - shard-rkl:          NOTRUN -> [SKIP][37] ([i915#284])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@gem_media_vme.html

  * igt@gem_mmap@pf-nonblock:
    - shard-dg2:          NOTRUN -> [SKIP][38] ([i915#4083]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_mmap@pf-nonblock.html

  * igt@gem_mmap@short-mmap:
    - shard-mtlp:         NOTRUN -> [SKIP][39] ([i915#4083])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_mmap@short-mmap.html

  * igt@gem_mmap_gtt@hang-busy:
    - shard-dg2-9:        NOTRUN -> [SKIP][40] ([i915#4077])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_mmap_gtt@hang-busy.html

  * igt@gem_mmap_wc@write:
    - shard-dg2-9:        NOTRUN -> [SKIP][41] ([i915#4083]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_mmap_wc@write.html

  * igt@gem_partial_pwrite_pread@reads-snoop:
    - shard-rkl:          NOTRUN -> [SKIP][42] ([i915#3282]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@gem_partial_pwrite_pread@reads-snoop.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-dg2:          NOTRUN -> [SKIP][43] ([i915#3282]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_pxp@hw-rejects-pxp-context:
    - shard-mtlp:         NOTRUN -> [SKIP][44] ([i915#13398])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_pxp@hw-rejects-pxp-context.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-dg2:          NOTRUN -> [SKIP][45] ([i915#4270])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
    - shard-rkl:          [PASS][46] -> [TIMEOUT][47] ([i915#12964])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@gem_pxp@regular-baseline-src-copy-readible.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-4/igt@gem_pxp@regular-baseline-src-copy-readible.html

  * igt@gem_pxp@reject-modify-context-protection-off-1:
    - shard-rkl:          [PASS][48] -> [TIMEOUT][49] ([i915#12917] / [i915#12964]) +1 other test timeout
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-off-1.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@gem_pxp@reject-modify-context-protection-off-1.html

  * igt@gem_pxp@verify-pxp-key-change-after-suspend-resume:
    - shard-rkl:          NOTRUN -> [TIMEOUT][50] ([i915#12917] / [i915#12964]) +1 other test timeout
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@gem_pxp@verify-pxp-key-change-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-dg2-9:        NOTRUN -> [SKIP][51] ([i915#4270])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_render_copy@linear-to-vebox-y-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][52] ([i915#8428]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_render_copy@linear-to-vebox-y-tiled.html

  * igt@gem_render_copy@mixed-tiled-to-yf-tiled-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#5190] / [i915#8428]) +4 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-7/igt@gem_render_copy@mixed-tiled-to-yf-tiled-ccs.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs:
    - shard-dg2-9:        NOTRUN -> [SKIP][54] ([i915#5190] / [i915#8428])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-mc-ccs.html

  * igt@gem_softpin@evict-snoop-interruptible:
    - shard-dg2-9:        NOTRUN -> [SKIP][55] ([i915#4885])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_softpin@evict-snoop-interruptible.html

  * igt@gem_tiling_max_stride:
    - shard-dg2:          NOTRUN -> [SKIP][56] ([i915#4077]) +5 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@gem_tiling_max_stride.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][57] ([i915#3297])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-dg2:          NOTRUN -> [SKIP][58] ([i915#3297])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-mtlp:         NOTRUN -> [SKIP][59] ([i915#3297])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@readonly-pwrite-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][60] ([i915#3297]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gem_userptr_blits@readonly-pwrite-unsync.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg2-9:        NOTRUN -> [SKIP][61] ([i915#3297])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-rkl:          [PASS][62] -> [INCOMPLETE][63] ([i915#13356])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-5/igt@gem_workarounds@suspend-resume-fd.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-3/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen9_exec_parse@bb-large:
    - shard-tglu:         NOTRUN -> [SKIP][64] ([i915#2527] / [i915#2856]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-secure:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#2856]) +3 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@gen9_exec_parse@bb-secure.html

  * igt@gen9_exec_parse@bb-start-cmd:
    - shard-tglu-1:       NOTRUN -> [SKIP][66] ([i915#2527] / [i915#2856])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@gen9_exec_parse@bb-start-cmd.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-dg2-9:        NOTRUN -> [SKIP][67] ([i915#2856]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gen9_exec_parse@secure-batches.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          NOTRUN -> [SKIP][68] ([i915#2527]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@gen9_exec_parse@shadow-peek.html
    - shard-mtlp:         NOTRUN -> [SKIP][69] ([i915#2856])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_drm_fdinfo@most-busy-check-all@vecs0:
    - shard-dg2:          NOTRUN -> [SKIP][70] ([i915#14073]) +7 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-7/igt@i915_drm_fdinfo@most-busy-check-all@vecs0.html

  * igt@i915_drm_fdinfo@virtual-busy-hang:
    - shard-dg2-9:        NOTRUN -> [SKIP][71] ([i915#14118])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@i915_drm_fdinfo@virtual-busy-hang.html

  * igt@i915_fb_tiling@basic-x-tiling:
    - shard-mtlp:         NOTRUN -> [SKIP][72] ([i915#13786])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@i915_fb_tiling@basic-x-tiling.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#8399])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
    - shard-dg1:          [PASS][74] -> [FAIL][75] ([i915#3591]) +2 other tests fail
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html

  * igt@i915_pm_rps@thresholds-idle:
    - shard-mtlp:         NOTRUN -> [SKIP][76] ([i915#11681])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@i915_pm_rps@thresholds-idle.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-mtlp:         NOTRUN -> [SKIP][77] ([i915#4077]) +5 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          NOTRUN -> [SKIP][78] ([i915#7707])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
    - shard-dg2-9:        NOTRUN -> [SKIP][79] ([i915#4212])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_addfb_basic@tile-pitch-mismatch.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-1-y-rc-ccs-cc:
    - shard-tglu-1:       NOTRUN -> [SKIP][80] ([i915#8709]) +3 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-1-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-c-hdmi-a-1-y-rc-ccs-cc:
    - shard-tglu:         NOTRUN -> [SKIP][81] ([i915#8709]) +3 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-c-hdmi-a-1-y-rc-ccs-cc.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#9531])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][83] +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-tglu:         NOTRUN -> [SKIP][84] ([i915#5286]) +2 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-tglu-1:       NOTRUN -> [SKIP][85] ([i915#5286]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-glk:          NOTRUN -> [SKIP][86] +66 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-rkl:          NOTRUN -> [SKIP][87] ([i915#5286])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-270:
    - shard-dg2-9:        NOTRUN -> [SKIP][88] ([i915#4538] / [i915#5190])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#5190]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#4538] / [i915#5190]) +4 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-dg2-9:        NOTRUN -> [SKIP][91] ([i915#5190]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-mtlp:         NOTRUN -> [SKIP][92] +7 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][93] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][94] ([i915#6095]) +29 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs:
    - shard-dg2-9:        NOTRUN -> [SKIP][95] ([i915#10307] / [i915#6095]) +9 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#6095]) +51 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][97] ([i915#12313])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][98] ([i915#14098] / [i915#6095]) +50 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][99] ([i915#6095]) +44 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][100] ([i915#12313]) +2 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][101] ([i915#6095]) +14 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][102] ([i915#12805])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][103] ([i915#6095]) +20 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-10/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-dp-4.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#10307] / [i915#6095]) +147 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc@pipe-c-dp-3.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#12313])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][106] ([i915#6095]) +143 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][107] ([i915#3742])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg2-9:        NOTRUN -> [SKIP][108] +1 other test skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
    - shard-tglu:         NOTRUN -> [SKIP][109] ([i915#11151] / [i915#7828]) +6 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_frames@dp-crc-single:
    - shard-mtlp:         NOTRUN -> [SKIP][110] ([i915#11151] / [i915#7828]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_chamelium_frames@dp-crc-single.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-tglu-1:       NOTRUN -> [SKIP][111] ([i915#11151] / [i915#7828]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#11151] / [i915#7828]) +5 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_chamelium_hpd@vga-hpd-after-suspend:
    - shard-dg2-9:        NOTRUN -> [SKIP][113] ([i915#11151] / [i915#7828]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html

  * igt@kms_chamelium_hpd@vga-hpd-fast:
    - shard-rkl:          NOTRUN -> [SKIP][114] ([i915#11151] / [i915#7828]) +4 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_chamelium_hpd@vga-hpd-fast.html

  * igt@kms_content_protection@atomic:
    - shard-rkl:          NOTRUN -> [SKIP][115] ([i915#7118] / [i915#9424])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@content-type-change:
    - shard-dg2:          NOTRUN -> [SKIP][116] ([i915#9424]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-tglu:         NOTRUN -> [SKIP][117] ([i915#3116] / [i915#3299]) +1 other test skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy@pipe-a-dp-4:
    - shard-dg2:          NOTRUN -> [FAIL][118] ([i915#7173]) +2 other tests fail
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-10/igt@kms_content_protection@legacy@pipe-a-dp-4.html

  * igt@kms_content_protection@mei-interface:
    - shard-tglu-1:       NOTRUN -> [SKIP][119] ([i915#6944] / [i915#9424])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-offscreen-32x32:
    - shard-mtlp:         NOTRUN -> [SKIP][120] ([i915#3555] / [i915#8814])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_cursor_crc@cursor-offscreen-32x32.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#13049]) +1 other test skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#13049])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-256x85:
    - shard-rkl:          [PASS][123] -> [FAIL][124] ([i915#13566])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-4/igt@kms_cursor_crc@cursor-random-256x85.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_cursor_crc@cursor-random-256x85.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [FAIL][125] ([i915#13566]) +2 other tests fail
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-2.html

  * igt@kms_cursor_crc@cursor-random-64x21:
    - shard-tglu:         [PASS][126] -> [FAIL][127] ([i915#13566]) +1 other test fail
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-2/igt@kms_cursor_crc@cursor-random-64x21.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_cursor_crc@cursor-random-64x21.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#3555]) +1 other test skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-dg2:          NOTRUN -> [SKIP][129] ([i915#3555]) +1 other test skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#13046] / [i915#5354])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2-9:        NOTRUN -> [SKIP][131] ([i915#13046] / [i915#5354])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-rkl:          [PASS][132] -> [FAIL][133] ([i915#2346])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-tglu-1:       NOTRUN -> [SKIP][134] ([i915#9723])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([i915#13691])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][136] ([i915#3804])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-tglu:         NOTRUN -> [SKIP][137] ([i915#13749])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-dg2-9:        NOTRUN -> [SKIP][138] ([i915#13748])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2:          NOTRUN -> [SKIP][139] ([i915#13707])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-basic:
    - shard-tglu:         NOTRUN -> [SKIP][140] ([i915#3555] / [i915#3840])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-dg2:          NOTRUN -> [SKIP][141] ([i915#3840] / [i915#9688])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-tglu-1:       NOTRUN -> [SKIP][142] ([i915#3555] / [i915#3840])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-tglu:         NOTRUN -> [SKIP][143] ([i915#2575])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-tglu-1:       NOTRUN -> [SKIP][144] ([i915#3469])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-tglu:         NOTRUN -> [SKIP][145] ([i915#2065] / [i915#4854])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-4x:
    - shard-tglu:         NOTRUN -> [SKIP][146] ([i915#1839])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#9934]) +5 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][148] ([i915#9934]) +4 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_flip@2x-flip-vs-dpms.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-mtlp:         NOTRUN -> [SKIP][149] ([i915#3637] / [i915#9934]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-dg2-9:        NOTRUN -> [SKIP][150] ([i915#9934]) +2 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-tglu-1:       NOTRUN -> [SKIP][151] ([i915#3637] / [i915#9934]) +2 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][152] ([i915#3637] / [i915#9934]) +3 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][153] -> [FAIL][154] ([i915#13734]) +2 other tests fail
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb7/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb4/igt@kms_flip@2x-plain-flip-fb-recreate@ab-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1:
    - shard-mtlp:         [PASS][155] -> [FAIL][156] ([i915#13734]) +5 other tests fail
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-6/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-snb:          [PASS][157] -> [FAIL][158] ([i915#13027]) +1 other test fail
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1:
    - shard-dg2:          NOTRUN -> [FAIL][159] ([i915#13734]) +2 other tests fail
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-4/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html
    - shard-rkl:          NOTRUN -> [FAIL][160] ([i915#13734]) +1 other test fail
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@d-hdmi-a1:
    - shard-tglu:         [PASS][161] -> [FAIL][162] ([i915#13734])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-3/igt@kms_flip@plain-flip-fb-recreate-interruptible@d-hdmi-a1.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-9/igt@kms_flip@plain-flip-fb-recreate-interruptible@d-hdmi-a1.html

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-dg1:          [PASS][163] -> [DMESG-WARN][164] ([i915#4423]) +1 other test dmesg-warn
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-15/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-17/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][165] ([i915#2672]) +2 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][166] ([i915#2672] / [i915#3555]) +1 other test skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][167] ([i915#2587] / [i915#2672] / [i915#3555])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][168] ([i915#2587] / [i915#2672]) +2 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][169] ([i915#2672] / [i915#3555]) +1 other test skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][170] ([i915#2587] / [i915#2672]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][171] ([i915#2672] / [i915#3555]) +2 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][172] ([i915#2672] / [i915#3555])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][173] ([i915#2672])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-dg2-9:        NOTRUN -> [SKIP][174] ([i915#2672] / [i915#3555] / [i915#5190])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2-9:        NOTRUN -> [SKIP][175] ([i915#2672])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          [PASS][176] -> [FAIL][177] ([i915#6880])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu.html
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][178] ([i915#8708]) +4 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-2p-indfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][179] ([i915#5354]) +17 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#8708]) +7 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc:
    - shard-dg2-9:        NOTRUN -> [SKIP][181] ([i915#8708]) +1 other test skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-tglu-1:       NOTRUN -> [SKIP][182] ([i915#5439])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen:
    - shard-dg2-9:        NOTRUN -> [SKIP][183] ([i915#3458]) +5 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render:
    - shard-mtlp:         NOTRUN -> [SKIP][184] ([i915#1825]) +7 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move:
    - shard-dg2-9:        NOTRUN -> [SKIP][185] ([i915#5354]) +6 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][186] +40 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][187] ([i915#3458]) +4 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-tglu:         NOTRUN -> [SKIP][188] +46 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][189] ([i915#1825]) +18 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-rkl:          NOTRUN -> [SKIP][190] ([i915#3023]) +12 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_getfb@getfb-reject-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][191] ([i915#6118])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_getfb@getfb-reject-ccs.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][192] ([i915#12713])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-hdr:
    - shard-tglu-1:       NOTRUN -> [SKIP][193] ([i915#3555] / [i915#8228])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-toggle:
    - shard-dg2-9:        NOTRUN -> [SKIP][194] ([i915#3555] / [i915#8228])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_hdr@static-toggle.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][195] ([i915#3555] / [i915#8228])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-dg2:          [PASS][196] -> [SKIP][197] ([i915#3555] / [i915#8228])
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-11/igt@kms_hdr@static-toggle-suspend.html
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-1/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#10656])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][199] ([i915#12339])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-mtlp:         NOTRUN -> [SKIP][200] ([i915#10656])
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-rkl:          NOTRUN -> [SKIP][201] +9 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-glk:          NOTRUN -> [INCOMPLETE][202] ([i915#12756] / [i915#13409] / [i915#13476])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk4/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#13958])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-mtlp:         NOTRUN -> [SKIP][204] ([i915#13958])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-tglu-1:       NOTRUN -> [SKIP][205] ([i915#3555]) +2 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c:
    - shard-tglu:         NOTRUN -> [SKIP][206] ([i915#12247]) +14 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][207] ([i915#12247] / [i915#6953]) +1 other test skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_plane_scaling@planes-downscale-factor-0-25.html
    - shard-mtlp:         NOTRUN -> [SKIP][208] ([i915#12247] / [i915#6953]) +1 other test skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_plane_scaling@planes-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b:
    - shard-rkl:          NOTRUN -> [SKIP][209] ([i915#12247]) +7 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d:
    - shard-mtlp:         NOTRUN -> [SKIP][210] ([i915#12247]) +9 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
    - shard-rkl:          NOTRUN -> [SKIP][211] ([i915#12247] / [i915#3555])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][212] ([i915#12343])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][213] ([i915#9812])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-tglu-1:       NOTRUN -> [SKIP][214] ([i915#9685])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-mtlp:         NOTRUN -> [SKIP][215] ([i915#3828])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [PASS][216] -> [FAIL][217] ([i915#9295])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-7/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][218] ([i915#9340])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [PASS][219] -> [SKIP][220] ([i915#9519]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-7/igt@kms_pm_rpm@dpms-lpsp.html
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-mtlp:         NOTRUN -> [SKIP][221] ([i915#9519])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [PASS][222] -> [SKIP][223] ([i915#9519])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp.html
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-5/igt@kms_pm_rpm@modeset-lpsp.html
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#9519])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-glk:          [PASS][225] -> [INCOMPLETE][226] ([i915#10553])
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-glk1/igt@kms_pm_rpm@system-suspend-modeset.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk8/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-mtlp:         NOTRUN -> [SKIP][227] ([i915#12316])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-dg2-9:        NOTRUN -> [SKIP][228] ([i915#11520]) +1 other test skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-dg2:          NOTRUN -> [SKIP][229] ([i915#11520]) +5 other tests skip
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          NOTRUN -> [SKIP][230] ([i915#11520]) +3 other tests skip
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][231] ([i915#11520]) +3 other tests skip
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][232] ([i915#11520]) +4 other tests skip
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-tglu-1:       NOTRUN -> [SKIP][233] ([i915#9683])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-tglu:         NOTRUN -> [SKIP][234] ([i915#9683])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-rkl:          NOTRUN -> [SKIP][235] ([i915#9683]) +1 other test skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-no-drrs:
    - shard-tglu:         NOTRUN -> [SKIP][236] ([i915#9732]) +10 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_psr@fbc-psr-no-drrs.html

  * igt@kms_psr@fbc-psr-primary-mmap-gtt:
    - shard-dg2-9:        NOTRUN -> [SKIP][237] ([i915#1072] / [i915#9732]) +5 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_psr@fbc-psr-primary-mmap-gtt.html

  * igt@kms_psr@fbc-psr-primary-page-flip:
    - shard-dg2:          NOTRUN -> [SKIP][238] ([i915#1072] / [i915#9732]) +9 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_psr@fbc-psr-primary-page-flip.html

  * igt@kms_psr@fbc-psr2-primary-render:
    - shard-mtlp:         NOTRUN -> [SKIP][239] ([i915#9688]) +11 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_psr@fbc-psr2-primary-render.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-rkl:          NOTRUN -> [SKIP][240] ([i915#1072] / [i915#9732]) +12 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_psr@psr2-sprite-mmap-cpu:
    - shard-tglu-1:       NOTRUN -> [SKIP][241] ([i915#9732]) +8 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_psr@psr2-sprite-mmap-cpu.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][242] ([i915#5289])
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-tglu:         NOTRUN -> [SKIP][243] ([i915#5289])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-dg2:          NOTRUN -> [SKIP][244] ([i915#12755])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-mtlp:         NOTRUN -> [SKIP][245] ([i915#12755])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-tglu:         NOTRUN -> [SKIP][246] ([i915#3555]) +5 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free:
    - shard-dg2:          NOTRUN -> [ABORT][247] ([i915#13179]) +1 other test abort
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_selftest@drm_framebuffer@drm_test_framebuffer_free.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-dg2-9:        NOTRUN -> [SKIP][248] ([i915#3555])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-tglu:         NOTRUN -> [SKIP][249] ([i915#8623])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vblank@query-forked-busy@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][250] ([i915#12964]) +2 other tests dmesg-warn
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@kms_vblank@query-forked-busy@pipe-b-hdmi-a-2.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-tglu:         NOTRUN -> [SKIP][251] ([i915#9906])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-4/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@lobf:
    - shard-dg2:          NOTRUN -> [SKIP][252] ([i915#11920])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@kms_vrr@lobf.html

  * igt@kms_vrr@negative-basic:
    - shard-tglu-1:       NOTRUN -> [SKIP][253] ([i915#3555] / [i915#9906])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_vrr@negative-basic.html

  * igt@kms_writeback@writeback-check-output:
    - shard-mtlp:         NOTRUN -> [SKIP][254] ([i915#2437])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-tglu-1:       NOTRUN -> [SKIP][255] ([i915#2437] / [i915#9412])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-1/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf@mi-rpc:
    - shard-dg2:          NOTRUN -> [SKIP][256] ([i915#2434])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@perf@mi-rpc.html

  * igt@perf_pmu@frequency:
    - shard-dg2:          NOTRUN -> [FAIL][257] ([i915#12549] / [i915#6806]) +1 other test fail
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@perf_pmu@frequency.html

  * igt@perf_pmu@module-unload:
    - shard-dg2:          [PASS][258] -> [INCOMPLETE][259] ([i915#13520])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-5/igt@perf_pmu@module-unload.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-10/igt@perf_pmu@module-unload.html
    - shard-dg1:          [PASS][260] -> [INCOMPLETE][261] ([i915#13520])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-12/igt@perf_pmu@module-unload.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-19/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-dg2-9:        NOTRUN -> [SKIP][262] ([i915#8516])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@perf_pmu@rc6-all-gts.html

  * igt@prime_vgem@basic-fence-mmap:
    - shard-dg2:          NOTRUN -> [SKIP][263] ([i915#3708] / [i915#4077])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-2/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@fence-read-hang:
    - shard-dg2-9:        NOTRUN -> [SKIP][264] ([i915#3708])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@prime_vgem@fence-read-hang.html

  * igt@prime_vgem@fence-write-hang:
    - shard-dg2:          NOTRUN -> [SKIP][265] ([i915#3708])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@prime_vgem@fence-write-hang.html

  * igt@sriov_basic@bind-unbind-vf@vf-4:
    - shard-tglu:         NOTRUN -> [FAIL][266] ([i915#12910]) +9 other tests fail
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@sriov_basic@bind-unbind-vf@vf-4.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each:
    - shard-rkl:          NOTRUN -> [SKIP][267] ([i915#9917])
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-6/igt@sriov_basic@enable-vfs-bind-unbind-each.html

  
#### Possible fixes ####

  * igt@gem_eio@banned:
    - shard-mtlp:         [ABORT][268] ([i915#13193] / [i915#13723]) -> [PASS][269] +2 other tests pass
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-7/igt@gem_eio@banned.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-4/igt@gem_eio@banned.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          [ABORT][270] ([i915#10030] / [i915#7975] / [i915#8213]) -> [PASS][271]
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-3/igt@gem_eio@hibernate.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@gem_eio@hibernate.html

  * igt@gem_eio@kms:
    - shard-dg2:          [FAIL][272] ([i915#5784]) -> [PASS][273]
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-2/igt@gem_eio@kms.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-6/igt@gem_eio@kms.html

  * igt@gem_eio@reset-stress:
    - shard-dg1:          [FAIL][274] ([i915#12543] / [i915#5784]) -> [PASS][275]
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-12/igt@gem_eio@reset-stress.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-16/igt@gem_eio@reset-stress.html

  * igt@gem_exec_schedule@wide:
    - shard-rkl:          [DMESG-WARN][276] ([i915#12964]) -> [PASS][277] +8 other tests pass
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-4/igt@gem_exec_schedule@wide.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@gem_exec_schedule@wide.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          [INCOMPLETE][278] ([i915#11441] / [i915#13304]) -> [PASS][279] +1 other test pass
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-10/igt@gem_exec_suspend@basic-s0.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-rkl:          [TIMEOUT][280] ([i915#12964]) -> [PASS][281] +1 other test pass
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-4/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-rkl:          [TIMEOUT][282] ([i915#12917] / [i915#12964]) -> [PASS][283]
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-4/igt@gem_pxp@reject-modify-context-protection-off-2.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@i915_pm_rpm@reg-read-ioctl:
    - shard-dg1:          [SKIP][284] ([i915#4423]) -> [PASS][285]
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@i915_pm_rpm@reg-read-ioctl.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@i915_pm_rpm@reg-read-ioctl.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-mtlp:         [FAIL][286] ([i915#5138]) -> [PASS][287]
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-snb:          [SKIP][288] -> [PASS][289] +1 other test pass
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb7/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [TIMEOUT][290] ([i915#14033]) -> [PASS][291] +1 other test pass
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1:
    - shard-tglu:         [FAIL][292] ([i915#13734]) -> [PASS][293] +3 other tests pass
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-9/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-8/igt@kms_flip@flip-vs-absolute-wf_vblank@b-hdmi-a1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
    - shard-mtlp:         [FAIL][294] ([i915#13734]) -> [PASS][295]
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-5/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
    - shard-glk:          [SKIP][296] -> [PASS][297] +4 other tests pass
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-glk4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_hdr@bpc-switch:
    - shard-dg2:          [SKIP][298] ([i915#3555] / [i915#8228]) -> [PASS][299]
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-7/igt@kms_hdr@bpc-switch.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_hdr@bpc-switch.html

  * igt@kms_invalid_mode@bad-htotal:
    - shard-dg1:          [DMESG-WARN][300] ([i915#4423]) -> [PASS][301] +11 other tests pass
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_invalid_mode@bad-htotal.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_invalid_mode@bad-htotal.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a:
    - shard-rkl:          [INCOMPLETE][302] -> [PASS][303] +1 other test pass
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg2:          [SKIP][304] ([i915#9519]) -> [PASS][305]
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-8/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-5/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [SKIP][306] ([i915#9519]) -> [PASS][307]
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@perf_pmu@module-unload:
    - shard-tglu:         [INCOMPLETE][308] ([i915#13520]) -> [PASS][309]
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-10/igt@perf_pmu@module-unload.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-6/igt@perf_pmu@module-unload.html

  * igt@perf_pmu@most-busy-check-all:
    - shard-rkl:          [FAIL][310] ([i915#4349]) -> [PASS][311] +1 other test pass
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-4/igt@perf_pmu@most-busy-check-all.html
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-8/igt@perf_pmu@most-busy-check-all.html

  
#### Warnings ####

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2-9:        [ABORT][312] ([i915#13427]) -> [INCOMPLETE][313] ([i915#13427])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-9/igt@gem_create@create-ext-cpu-access-big.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-9/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][314] ([i915#14044] / [i915#5493]) -> [DMESG-WARN][315] ([i915#5493]) +1 other test dmesg-warn
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-dg1:          [SKIP][316] ([i915#4423] / [i915#4538] / [i915#5286]) -> [SKIP][317] ([i915#4538] / [i915#5286])
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
    - shard-dg1:          [SKIP][318] ([i915#4423] / [i915#6095]) -> [SKIP][319] ([i915#6095])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-dg1:          [SKIP][320] ([i915#12313] / [i915#4423]) -> [SKIP][321] ([i915#12313])
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          [SKIP][322] ([i915#6095]) -> [SKIP][323] ([i915#14098] / [i915#6095]) +6 other tests skip
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
    - shard-dg1:          [SKIP][324] ([i915#11151] / [i915#4423] / [i915#7828]) -> [SKIP][325] ([i915#11151] / [i915#7828])
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          [SKIP][326] ([i915#7118]) -> [FAIL][327] ([i915#7173])
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-1/igt@kms_content_protection@srm.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-11/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          [SKIP][328] ([i915#7118] / [i915#7162] / [i915#9424]) -> [SKIP][329] ([i915#7118] / [i915#9424])
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-11/igt@kms_content_protection@type1.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-1/igt@kms_content_protection@type1.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-dg1:          [SKIP][330] ([i915#13749] / [i915#4423]) -> [SKIP][331] ([i915#13749])
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_dp_link_training@non-uhbr-sst.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-snb:          [FAIL][332] ([i915#13734]) -> [FAIL][333] ([i915#10826] / [i915#13734])
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-vga1:
    - shard-snb:          [FAIL][334] ([i915#13734]) -> [FAIL][335] ([i915#10826])
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-snb7/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-vga1.html
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-snb4/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-vga1.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
    - shard-dg2:          [SKIP][336] ([i915#10433] / [i915#3458]) -> [SKIP][337] ([i915#3458]) +1 other test skip
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-dg2:          [SKIP][338] ([i915#3458]) -> [SKIP][339] ([i915#10433] / [i915#3458])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg1:          [SKIP][340] ([i915#3458] / [i915#4423]) -> [SKIP][341] ([i915#3458]) +2 other tests skip
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
    - shard-dg1:          [SKIP][342] ([i915#3458]) -> [SKIP][343] ([i915#3458] / [i915#4423])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt:
    - shard-dg1:          [SKIP][344] ([i915#4423]) -> [SKIP][345] +2 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-mtlp:         [SKIP][346] ([i915#12713]) -> [SKIP][347] ([i915#1187] / [i915#12713])
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-mtlp-7/igt@kms_hdr@brightness-with-hdr.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-mtlp-1/igt@kms_hdr@brightness-with-hdr.html
    - shard-tglu:         [SKIP][348] ([i915#1187] / [i915#12713]) -> [SKIP][349] ([i915#12713])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-tglu-2/igt@kms_hdr@brightness-with-hdr.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-tglu-5/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-dg1:          [SKIP][350] ([i915#12339] / [i915#4423]) -> [SKIP][351] ([i915#12339])
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_joiner@invalid-modeset-ultra-joiner.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
    - shard-dg1:          [SKIP][352] ([i915#12247] / [i915#4423] / [i915#6953]) -> [SKIP][353] ([i915#12247] / [i915#6953])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-17/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-12/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c:
    - shard-dg1:          [SKIP][354] ([i915#12247] / [i915#4423]) -> [SKIP][355] ([i915#12247]) +1 other test skip
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-17/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-12/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          [SKIP][356] ([i915#3361]) -> [SKIP][357] ([i915#4281])
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-8/igt@kms_pm_dc@dc9-dpms.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-3/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-rkl:          [DMESG-WARN][358] ([i915#12964]) -> [SKIP][359] ([i915#9519])
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-rkl-5/igt@kms_pm_rpm@dpms-non-lpsp.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-rkl-7/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-dg1:          [SKIP][360] ([i915#11520] / [i915#4423]) -> [SKIP][361] ([i915#11520])
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr@fbc-pr-sprite-render:
    - shard-dg1:          [SKIP][362] ([i915#1072] / [i915#4423] / [i915#9732]) -> [SKIP][363] ([i915#1072] / [i915#9732]) +1 other test skip
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16507/shard-dg1-13/igt@kms_psr@fbc-pr-sprite-render.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/shard-dg1-15/igt@kms_psr@fbc-pr-sprite-render.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10030
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12543]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12543
  [i915#12549]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12549
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
  [i915#13304]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13304
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
  [i915#13409]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13409
  [i915#13427]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13427
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13691]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13691
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
  [i915#13734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13786]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13786
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
  [i915#14044]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14044
  [i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6118
  [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6806
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_16507 -> Patchwork_148638v1

  CI-20190529: 20190529
  CI_DRM_16507: 9f365ea4cf81b0d81ad82903e5605894ca4aba98 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8354: 59f7153426484367f58edfafb6567ce4e6a9e499 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_148638v1: 9f365ea4cf81b0d81ad82903e5605894ca4aba98 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_148638v1/index.html

[-- Attachment #2: Type: text/html, Size: 124427 bytes --]

Re: [PATCH 8/8] drm/i915/irq: move i915->irq_lock to display->irq.lock

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:50-03:00)
>Observe that i915->irq_lock is no longer used to protect anything
>outside of display. Make it a display thing.
>
>This allows us to remove the ugly #define irq_lock irq.lock hack from xe
>compat header.
>
>Note that this is slightly more subtle than it first looks. For i915,
>there's no functional change here. The lock is moved. However, for xe,
>we'll now have *two* locks, xe->irq.lock and display->irq.lock. These
>should protect different things, though. Indeed, nesting in the past
>would've lead to a deadlock because they were the same lock.
>
>With the i915 references gone, we can make a handful more files
>independent of i915_drv.h.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Besides reviewing the patch itself, I also did a git-grep to check for
lexical references to irq_lock in the code after this patch is applied.

I found 2 references in comments:

 (1) A reference to "drm_i915_private::irq_lock" in the comment for member
     detection_work_enabled of struct intel_hotplug. I think we can
     simply refer to "intel_display::irq::lock" now.

 (2) A reference to "i915->irq_lock" in a comment inside struct intel_rps.
     Looking at the history, it looks like we started using gt->irq_lock
     with commit d762043f7ab1 ("drm/i915: Extract GT powermanagement
     interrupt handling"), which failed to update the comment. I think
     we can update the comment to make it more accurate. I guess that
     could be on a patch of its own...

So, with the small tweak suggested in (1),

  Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/i9xx_plane.c     |  43 +++---
> .../gpu/drm/i915/display/intel_display_core.h |   3 +
> .../gpu/drm/i915/display/intel_display_irq.c  | 114 +++++++---------
> .../gpu/drm/i915/display/intel_display_rps.c  |  12 +-
> .../drm/i915/display/intel_display_types.h    |   2 +-
> drivers/gpu/drm/i915/display/intel_dp.c       |  10 +-
> drivers/gpu/drm/i915/display/intel_dsi_vbt.c  |   9 +-
> .../drm/i915/display/intel_fifo_underrun.c    |  44 +++---
> drivers/gpu/drm/i915/display/intel_hotplug.c  | 129 +++++++-----------
> .../gpu/drm/i915/display/intel_hotplug_irq.c  |  22 ++-
> drivers/gpu/drm/i915/display/intel_tv.c       |  14 +-
> .../drm/i915/display/skl_universal_plane.c    |  10 +-
> drivers/gpu/drm/i915/i915_driver.c            |   1 -
> drivers/gpu/drm/i915/i915_drv.h               |   2 -
> .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  11 --
> 15 files changed, 168 insertions(+), 258 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
>index 5e8344fdfc28..83778a6ff007 100644
>--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
>+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
>@@ -7,9 +7,10 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_blend.h>
> #include <drm/drm_fourcc.h>
>+#include <drm/drm_print.h>
> 
>-#include "i915_drv.h"
> #include "i915_reg.h"
>+#include "i915_utils.h"
> #include "i9xx_plane.h"
> #include "i9xx_plane_regs.h"
> #include "intel_atomic.h"
>@@ -631,92 +632,84 @@ static void
> bdw_primary_enable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> bdw_primary_disable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_PRIMARY_FLIP_DONE);
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> ivb_primary_enable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> ivb_primary_disable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE_IVB(plane->i9xx_plane));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> ilk_primary_enable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         ilk_enable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> ilk_primary_disable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         ilk_disable_display_irq(display, DE_PLANE_FLIP_DONE(plane->i9xx_plane));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> vlv_primary_enable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         i915_enable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> vlv_primary_disable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         i915_disable_pipestat(display, pipe, PLANE_FLIP_DONE_INT_STATUS_VLV);
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static bool i9xx_plane_can_async_flip(u64 modifier)
>diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
>index dc834cef75c7..ebbd3618260c 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_core.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
>@@ -458,6 +458,9 @@ struct intel_display {
>         } ips;
> 
>         struct {
>+                /* protects the irq masks */
>+                spinlock_t lock;
>+
>                 /*
>                  * Most platforms treat the display irq block as an always-on
>                  * power domain. vlv/chv can disable it at runtime and need
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 264ddeba121b..3e73832e5e81 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -135,7 +135,7 @@ void ilk_update_display_irq(struct intel_display *display,
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 new_val;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
>         drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
> 
>         new_val = dev_priv->irq_mask;
>@@ -173,7 +173,7 @@ void bdw_update_port_irq(struct intel_display *display,
>         u32 new_val;
>         u32 old_val;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
> 
>@@ -206,7 +206,7 @@ static void bdw_update_pipe_irq(struct intel_display *display,
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 new_val;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
> 
>@@ -254,7 +254,7 @@ void ibx_display_interrupt_update(struct intel_display *display,
> 
>         drm_WARN_ON(display->drm, enabled_irq_mask & ~interrupt_mask);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv)))
>                 return;
>@@ -276,11 +276,10 @@ void ibx_disable_display_interrupt(struct intel_display *display, u32 bits)
> u32 i915_pipestat_enable_mask(struct intel_display *display,
>                               enum pipe pipe)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 status_mask = display->irq.pipestat_irq_mask[pipe];
>         u32 enable_mask = status_mask << 16;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (DISPLAY_VER(display) < 5)
>                 goto out;
>@@ -329,7 +328,7 @@ void i915_enable_pipestat(struct intel_display *display,
>                       "pipe %c: status_mask=0x%x\n",
>                       pipe_name(pipe), status_mask);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
>         drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> 
>         if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == status_mask)
>@@ -353,7 +352,7 @@ void i915_disable_pipestat(struct intel_display *display,
>                       "pipe %c: status_mask=0x%x\n",
>                       pipe_name(pipe), status_mask);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
>         drm_WARN_ON(display->drm, !intel_irqs_enabled(dev_priv));
> 
>         if ((display->irq.pipestat_irq_mask[pipe] & status_mask) == 0)
>@@ -380,22 +379,20 @@ static bool i915_has_legacy_blc_interrupt(struct intel_display *display)
> /* enable ASLE pipestat for OpRegion */
> static void i915_enable_asle_pipestat(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         if (!intel_opregion_asle_present(display))
>                 return;
> 
>         if (!i915_has_legacy_blc_interrupt(display))
>                 return;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         i915_enable_pipestat(display, PIPE_B, PIPE_LEGACY_BLC_EVENT_STATUS);
>         if (DISPLAY_VER(display) >= 4)
>                 i915_enable_pipestat(display, PIPE_A,
>                                      PIPE_LEGACY_BLC_EVENT_STATUS);
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> #if IS_ENABLED(CONFIG_DEBUG_FS)
>@@ -514,14 +511,13 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display)
> void i9xx_pipestat_irq_ack(struct intel_display *display,
>                            u32 iir, u32 pipe_stats[I915_MAX_PIPES])
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         enum pipe pipe;
> 
>-        spin_lock(&dev_priv->irq_lock);
>+        spin_lock(&display->irq.lock);
> 
>         if ((display->platform.valleyview || display->platform.cherryview) &&
>             !display->irq.vlv_display_irqs_enabled) {
>-                spin_unlock(&dev_priv->irq_lock);
>+                spin_unlock(&display->irq.lock);
>                 return;
>         }
> 
>@@ -576,7 +572,7 @@ void i9xx_pipestat_irq_ack(struct intel_display *display,
>                         intel_de_write(display, reg, enable_mask);
>                 }
>         }
>-        spin_unlock(&dev_priv->irq_lock);
>+        spin_unlock(&display->irq.lock);
> }
> 
> void i915_pipestat_irq_handler(struct intel_display *display,
>@@ -1566,13 +1562,12 @@ void i915gm_irq_cstate_wa(struct intel_display *display, bool enable)
> int i8xx_enable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         i915_enable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> 
>         return 0;
> }
>@@ -1580,13 +1575,12 @@ int i8xx_enable_vblank(struct drm_crtc *crtc)
> void i8xx_disable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         i915_disable_pipestat(display, pipe, PIPE_VBLANK_INTERRUPT_STATUS);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> }
> 
> int i915gm_enable_vblank(struct drm_crtc *crtc)
>@@ -1610,14 +1604,13 @@ void i915gm_disable_vblank(struct drm_crtc *crtc)
> int i965_enable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         i915_enable_pipestat(display, pipe,
>                              PIPE_START_VBLANK_INTERRUPT_STATUS);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> 
>         return 0;
> }
>@@ -1625,28 +1618,26 @@ int i965_enable_vblank(struct drm_crtc *crtc)
> void i965_disable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         i915_disable_pipestat(display, pipe,
>                               PIPE_START_VBLANK_INTERRUPT_STATUS);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> }
> 
> int ilk_enable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
>         u32 bit = DISPLAY_VER(display) >= 7 ?
>                 DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         ilk_enable_display_irq(display, bit);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> 
>         /* Even though there is no DMC, frame counter can get stuck when
>          * PSR is active as no frames are generated.
>@@ -1660,15 +1651,14 @@ int ilk_enable_vblank(struct drm_crtc *crtc)
> void ilk_disable_vblank(struct drm_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc->dev);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>         enum pipe pipe = to_intel_crtc(crtc)->pipe;
>         unsigned long irqflags;
>         u32 bit = DISPLAY_VER(display) >= 7 ?
>                 DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         ilk_disable_display_irq(display, bit);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> }
> 
> static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
>@@ -1707,7 +1697,6 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
> {
>         struct intel_crtc *crtc = to_intel_crtc(_crtc);
>         struct intel_display *display = to_intel_display(crtc);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         enum pipe pipe = crtc->pipe;
>         unsigned long irqflags;
> 
>@@ -1717,9 +1706,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
>         if (crtc->vblank_psr_notify && display->irq.vblank_enable_count++ == 0)
>                 schedule_work(&display->irq.vblank_notify_work);
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         bdw_enable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> 
>         /* Even if there is no DMC, frame counter can get stuck when
>          * PSR is active as no frames are generated, so check only for PSR.
>@@ -1734,16 +1723,15 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
> {
>         struct intel_crtc *crtc = to_intel_crtc(_crtc);
>         struct intel_display *display = to_intel_display(crtc);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         enum pipe pipe = crtc->pipe;
>         unsigned long irqflags;
> 
>         if (gen11_dsi_configure_te(crtc, false))
>                 return;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>+        spin_lock_irqsave(&display->irq.lock, irqflags);
>         bdw_disable_pipe_irq(display, pipe, GEN8_PIPE_VBLANK);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>+        spin_unlock_irqrestore(&display->irq.lock, irqflags);
> 
>         if (crtc->vblank_psr_notify && --display->irq.vblank_enable_count == 0)
>                 schedule_work(&display->irq.vblank_notify_work);
>@@ -1880,12 +1868,10 @@ static void _vlv_display_irq_reset(struct intel_display *display)
> 
> void vlv_display_irq_reset(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         if (display->irq.vlv_display_irqs_enabled)
>                 _vlv_display_irq_reset(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void i9xx_display_irq_reset(struct intel_display *display)
>@@ -1900,33 +1886,29 @@ void i9xx_display_irq_reset(struct intel_display *display)
> 
> void i915_display_irq_postinstall(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         /*
>          * Interrupt setup is already guaranteed to be single-threaded, this is
>          * just to make the assert_spin_locked check happy.
>          */
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>         i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         i915_enable_asle_pipestat(display);
> }
> 
> void i965_display_irq_postinstall(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         /*
>          * Interrupt setup is already guaranteed to be single-threaded, this is
>          * just to make the assert_spin_locked check happy.
>          */
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
>         i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>         i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         i915_enable_asle_pipestat(display);
> }
>@@ -1982,12 +1964,10 @@ static void _vlv_display_irq_postinstall(struct intel_display *display)
> 
> void vlv_display_irq_postinstall(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         if (display->irq.vlv_display_irqs_enabled)
>                 _vlv_display_irq_postinstall(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void ibx_display_irq_reset(struct intel_display *display)
>@@ -2084,10 +2064,10 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
>                 gen8_de_pipe_flip_done_mask(display);
>         enum pipe pipe;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (!intel_irqs_enabled(dev_priv)) {
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>                 return;
>         }
> 
>@@ -2096,7 +2076,7 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
>                                             display->irq.de_irq_mask[pipe],
>                                             ~display->irq.de_irq_mask[pipe] | extra_ier);
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void gen8_irq_power_well_pre_disable(struct intel_display *display,
>@@ -2105,17 +2085,17 @@ void gen8_irq_power_well_pre_disable(struct intel_display *display,
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
>         enum pipe pipe;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (!intel_irqs_enabled(dev_priv)) {
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>                 return;
>         }
> 
>         for_each_pipe_masked(display, pipe, pipe_mask)
>                 intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         /* make sure we're done processing display irqs */
>         intel_synchronize_irq(dev_priv);
>@@ -2153,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (display->irq.vlv_display_irqs_enabled)
>                 goto out;
>@@ -2166,14 +2146,14 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>         }
> 
> out:
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void valleyview_disable_display_irqs(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (!display->irq.vlv_display_irqs_enabled)
>                 goto out;
>@@ -2183,7 +2163,7 @@ void valleyview_disable_display_irqs(struct intel_display *display)
>         if (intel_irqs_enabled(dev_priv))
>                 _vlv_display_irq_reset(display);
> out:
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void ilk_de_irq_postinstall(struct intel_display *display)
>@@ -2371,6 +2351,8 @@ void dg1_de_irq_postinstall(struct intel_display *display)
> 
> void intel_display_irq_init(struct intel_display *display)
> {
>+        spin_lock_init(&display->irq.lock);
>+
>         display->drm->vblank_disable_immediate = true;
> 
>         intel_hotplug_irq_init(display);
>diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
>index 941bff5a5eb0..678b24115951 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
>@@ -86,20 +86,16 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
> 
> void ilk_display_rps_enable(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        spin_lock(&i915->irq_lock);
>+        spin_lock(&display->irq.lock);
>         ilk_enable_display_irq(display, DE_PCU_EVENT);
>-        spin_unlock(&i915->irq_lock);
>+        spin_unlock(&display->irq.lock);
> }
> 
> void ilk_display_rps_disable(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        spin_lock(&i915->irq_lock);
>+        spin_lock(&display->irq.lock);
>         ilk_disable_display_irq(display, DE_PCU_EVENT);
>-        spin_unlock(&i915->irq_lock);
>+        spin_unlock(&display->irq.lock);
> }
> 
> void ilk_display_rps_irq_handler(struct intel_display *display)
>diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>index 7415564d058a..d6d0440dcee9 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_types.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>@@ -1388,7 +1388,7 @@ struct intel_crtc {
>         /* armed event for DSB based updates */
>         struct drm_pending_vblank_event *dsb_event;
> 
>-        /* Access to these should be protected by dev_priv->irq_lock. */
>+        /* Access to these should be protected by display->irq.lock. */
>         bool cpu_fifo_underrun_disabled;
>         bool pch_fifo_underrun_disabled;
> 
>diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>index b299b5d8b68e..593b29b56714 100644
>--- a/drivers/gpu/drm/i915/display/intel_dp.c
>+++ b/drivers/gpu/drm/i915/display/intel_dp.c
>@@ -45,12 +45,13 @@
> #include <drm/drm_crtc.h>
> #include <drm/drm_edid.h>
> #include <drm/drm_fixed.h>
>+#include <drm/drm_print.h>
> #include <drm/drm_probe_helper.h>
> 
> #include "g4x_dp.h"
>-#include "i915_drv.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
>+#include "i915_utils.h"
> #include "intel_alpm.h"
> #include "intel_atomic.h"
> #include "intel_audio.h"
>@@ -58,6 +59,7 @@
> #include "intel_combo_phy_regs.h"
> #include "intel_connector.h"
> #include "intel_crtc.h"
>+#include "intel_crtc_state_dump.h"
> #include "intel_cx0_phy.h"
> #include "intel_ddi.h"
> #include "intel_de.h"
>@@ -92,7 +94,6 @@
> #include "intel_tc.h"
> #include "intel_vdsc.h"
> #include "intel_vrr.h"
>-#include "intel_crtc_state_dump.h"
> 
> /* DP DSC throughput values used for slice count calculations KPixels/s */
> #define DP_DSC_PEAK_PIXEL_RATE                        2720000
>@@ -6219,12 +6220,11 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector,
>         struct intel_connector *connector = to_intel_connector(_connector);
>         struct intel_display *display = to_intel_display(connector);
>         struct intel_encoder *encoder = intel_attached_encoder(connector);
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         bool hpd_high = hpd_state == connector_status_connected;
>         unsigned int hpd_pin = encoder->hpd_pin;
>         bool need_work = false;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         if (hpd_high != test_bit(hpd_pin, &display->hotplug.oob_hotplug_last_state)) {
>                 display->hotplug.event_bits |= BIT(hpd_pin);
> 
>@@ -6233,7 +6233,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *_connector,
>                              hpd_high);
>                 need_work = true;
>         }
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         if (need_work)
>                 intel_hpd_schedule_detection(display);
>diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
>index 4e92504f5c14..29c920983413 100644
>--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
>+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
>@@ -31,16 +31,16 @@
> #include <linux/pinctrl/machine.h>
> #include <linux/slab.h>
> #include <linux/string_helpers.h>
>-
> #include <linux/unaligned.h>
> 
> #include <drm/drm_crtc.h>
> #include <drm/drm_edid.h>
>+#include <drm/drm_print.h>
> 
> #include <video/mipi_display.h>
> 
>-#include "i915_drv.h"
> #include "i915_reg.h"
>+#include "i915_utils.h"
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_dsi.h"
>@@ -321,7 +321,6 @@ enum {
> static void icl_native_gpio_set_value(struct intel_display *display,
>                                       int gpio, bool value)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         int index;
> 
>         if (drm_WARN_ON(display->drm, DISPLAY_VER(display) == 11 && gpio >= MIPI_RESET_2))
>@@ -341,12 +340,12 @@ static void icl_native_gpio_set_value(struct intel_display *display,
>                  * The locking protects against concurrent SHOTPLUG_CTL_DDI
>                  * modifications in irq setup and handling.
>                  */
>-                spin_lock_irq(&dev_priv->irq_lock);
>+                spin_lock_irq(&display->irq.lock);
>                 intel_de_rmw(display, SHOTPLUG_CTL_DDI,
>                              SHOTPLUG_CTL_DDI_HPD_ENABLE(index) |
>                              SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index),
>                              value ? SHOTPLUG_CTL_DDI_HPD_OUTPUT_DATA(index) : 0);
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>                 break;
>         case MIPI_AVDD_EN_1:
>         case MIPI_AVDD_EN_2:
>diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
>index 7c7cd29b0944..2a787897b2d3 100644
>--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
>+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
>@@ -25,7 +25,8 @@
>  *
>  */
> 
>-#include "i915_drv.h"
>+#include <drm/drm_print.h>
>+
> #include "i915_reg.h"
> #include "intel_de.h"
> #include "intel_display_irq.h"
>@@ -57,11 +58,10 @@
> 
> static bool ivb_can_enable_err_int(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_crtc *crtc;
>         enum pipe pipe;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         for_each_pipe(display, pipe) {
>                 crtc = intel_crtc_for_pipe(display, pipe);
>@@ -75,11 +75,10 @@ static bool ivb_can_enable_err_int(struct intel_display *display)
> 
> static bool cpt_can_enable_serr_int(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         enum pipe pipe;
>         struct intel_crtc *crtc;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         for_each_pipe(display, pipe) {
>                 crtc = intel_crtc_for_pipe(display, pipe);
>@@ -94,11 +93,10 @@ static bool cpt_can_enable_serr_int(struct intel_display *display)
> static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         i915_reg_t reg = PIPESTAT(display, crtc->pipe);
>         u32 enable_mask;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if ((intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
>                 return;
>@@ -115,10 +113,9 @@ static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
>                                              enum pipe pipe,
>                                              bool enable, bool old)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         i915_reg_t reg = PIPESTAT(display, pipe);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (enable) {
>                 u32 enable_mask = i915_pipestat_enable_mask(display, pipe);
>@@ -148,11 +145,10 @@ static void ilk_set_fifo_underrun_reporting(struct intel_display *display,
> static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         enum pipe pipe = crtc->pipe;
>         u32 err_int = intel_de_read(display, GEN7_ERR_INT);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if ((err_int & ERR_INT_FIFO_UNDERRUN(pipe)) == 0)
>                 return;
>@@ -213,11 +209,10 @@ static void ibx_set_fifo_underrun_reporting(struct intel_display *display,
> static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)
> {
>         struct intel_display *display = to_intel_display(crtc);
>-        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>         enum pipe pch_transcoder = crtc->pipe;
>         u32 serr_int = intel_de_read(display, SERR_INT);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if ((serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) == 0)
>                 return;
>@@ -258,11 +253,10 @@ static void cpt_set_fifo_underrun_reporting(struct intel_display *display,
> static bool __intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
>                                                     enum pipe pipe, bool enable)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
>         bool old;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         old = !crtc->cpu_fifo_underrun_disabled;
>         crtc->cpu_fifo_underrun_disabled = !enable;
>@@ -298,13 +292,12 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct intel_display *displa
> bool intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
>                                            enum pipe pipe, bool enable)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         unsigned long flags;
>         bool ret;
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, flags);
>+        spin_lock_irqsave(&display->irq.lock, flags);
>         ret = __intel_set_cpu_fifo_underrun_reporting(display, pipe, enable);
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
>+        spin_unlock_irqrestore(&display->irq.lock, flags);
> 
>         return ret;
> }
>@@ -327,7 +320,6 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
>                                            enum pipe pch_transcoder,
>                                            bool enable)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_crtc *crtc = intel_crtc_for_pipe(display, pch_transcoder);
>         unsigned long flags;
>         bool old;
>@@ -341,7 +333,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
>          * crtc on LPT won't cause issues.
>          */
> 
>-        spin_lock_irqsave(&dev_priv->irq_lock, flags);
>+        spin_lock_irqsave(&display->irq.lock, flags);
> 
>         old = !crtc->pch_fifo_underrun_disabled;
>         crtc->pch_fifo_underrun_disabled = !enable;
>@@ -355,7 +347,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
>                                                 pch_transcoder,
>                                                 enable, old);
> 
>-        spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
>+        spin_unlock_irqrestore(&display->irq.lock, flags);
>         return old;
> }
> 
>@@ -422,10 +414,9 @@ void intel_pch_fifo_underrun_irq_handler(struct intel_display *display,
>  */
> void intel_check_cpu_fifo_underruns(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_crtc *crtc;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         for_each_intel_crtc(display->drm, crtc) {
>                 if (crtc->cpu_fifo_underrun_disabled)
>@@ -437,7 +428,7 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
>                         ivb_check_fifo_underruns(crtc);
>         }
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> /**
>@@ -450,10 +441,9 @@ void intel_check_cpu_fifo_underruns(struct intel_display *display)
>  */
> void intel_check_pch_fifo_underruns(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_crtc *crtc;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         for_each_intel_crtc(display->drm, crtc) {
>                 if (crtc->pch_fifo_underrun_disabled)
>@@ -463,7 +453,7 @@ void intel_check_pch_fifo_underruns(struct intel_display *display)
>                         cpt_check_pch_fifo_underruns(crtc);
>         }
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void intel_init_fifo_underrun_reporting(struct intel_display *display,
>diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
>index 6885e5a09079..fc5d8928c37e 100644
>--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
>+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
>@@ -183,9 +183,7 @@ static bool intel_hpd_irq_storm_detect(struct intel_display *display,
> 
> static bool detection_work_enabled(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         return display->hotplug.detection_work_enabled;
> }
>@@ -195,7 +193,7 @@ mod_delayed_detection_work(struct intel_display *display, struct delayed_work *w
> {
>         struct drm_i915_private *i915 = to_i915(display->drm);
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (!detection_work_enabled(display))
>                 return false;
>@@ -208,7 +206,7 @@ queue_delayed_detection_work(struct intel_display *display, struct delayed_work
> {
>         struct drm_i915_private *i915 = to_i915(display->drm);
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (!detection_work_enabled(display))
>                 return false;
>@@ -221,7 +219,7 @@ queue_detection_work(struct intel_display *display, struct work_struct *work)
> {
>         struct drm_i915_private *i915 = to_i915(display->drm);
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (!detection_work_enabled(display))
>                 return false;
>@@ -232,12 +230,11 @@ queue_detection_work(struct intel_display *display, struct work_struct *work)
> static void
> intel_hpd_irq_storm_switch_to_polling(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct drm_connector_list_iter conn_iter;
>         struct intel_connector *connector;
>         bool hpd_disabled = false;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         drm_connector_list_iter_begin(display->drm, &conn_iter);
>         for_each_intel_connector_iter(connector, &conn_iter) {
>@@ -276,7 +273,6 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
> {
>         struct intel_display *display =
>                 container_of(work, typeof(*display), hotplug.reenable_work.work);
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct drm_connector_list_iter conn_iter;
>         struct intel_connector *connector;
>         struct ref_tracker *wakeref;
>@@ -284,7 +280,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
> 
>         wakeref = intel_display_rpm_get(display);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         drm_connector_list_iter_begin(display->drm, &conn_iter);
>         for_each_intel_connector_iter(connector, &conn_iter) {
>@@ -308,7 +304,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
> 
>         intel_hpd_irq_setup(display);
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         intel_display_rpm_put(display, wakeref);
> }
>@@ -376,9 +372,7 @@ static bool hpd_pin_has_pulse(struct intel_display *display, enum hpd_pin pin)
> 
> static bool hpd_pin_is_blocked(struct intel_display *display, enum hpd_pin pin)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         return display->hotplug.stats[pin].blocked_count;
> }
>@@ -400,14 +394,13 @@ static void i915_digport_work_func(struct work_struct *work)
> {
>         struct intel_display *display =
>                 container_of(work, struct intel_display, hotplug.dig_port_work);
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         u32 long_hpd_pin_mask, short_hpd_pin_mask;
>         struct intel_encoder *encoder;
>         u32 blocked_hpd_pin_mask;
>         u32 old_bits = 0;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
>         long_hpd_pin_mask = hotplug->long_hpd_pin_mask & ~blocked_hpd_pin_mask;
>@@ -415,7 +408,7 @@ static void i915_digport_work_func(struct work_struct *work)
>         short_hpd_pin_mask = hotplug->short_hpd_pin_mask & ~blocked_hpd_pin_mask;
>         hotplug->short_hpd_pin_mask &= ~short_hpd_pin_mask;
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         for_each_intel_encoder(display->drm, encoder) {
>                 struct intel_digital_port *dig_port;
>@@ -442,11 +435,11 @@ static void i915_digport_work_func(struct work_struct *work)
>         }
> 
>         if (old_bits) {
>-                spin_lock_irq(&dev_priv->irq_lock);
>+                spin_lock_irq(&display->irq.lock);
>                 display->hotplug.event_bits |= old_bits;
>                 queue_delayed_detection_work(display,
>                                              &display->hotplug.hotplug_work, 0);
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>         }
> }
> 
>@@ -460,17 +453,16 @@ static void i915_digport_work_func(struct work_struct *work)
> void intel_hpd_trigger_irq(struct intel_digital_port *dig_port)
> {
>         struct intel_display *display = to_intel_display(dig_port);
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         struct intel_encoder *encoder = &dig_port->base;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         hotplug->short_hpd_pin_mask |= BIT(encoder->hpd_pin);
>         if (!hpd_pin_is_blocked(display, encoder->hpd_pin))
>                 queue_work(hotplug->dp_wq, &hotplug->dig_port_work);
> 
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> /*
>@@ -480,7 +472,6 @@ static void i915_hotplug_work_func(struct work_struct *work)
> {
>         struct intel_display *display =
>                 container_of(work, struct intel_display, hotplug.hotplug_work.work);
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         struct drm_connector_list_iter conn_iter;
>         struct intel_connector *connector;
>@@ -494,7 +485,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
>         mutex_lock(&display->drm->mode_config.mutex);
>         drm_dbg_kms(display->drm, "running encoder hotplug functions\n");
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
>         hpd_event_bits = hotplug->event_bits & ~blocked_hpd_pin_mask;
>@@ -505,7 +496,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
>         /* Enable polling for connectors which had HPD IRQ storms */
>         intel_hpd_irq_storm_switch_to_polling(display);
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         /* Skip calling encode hotplug handlers if ignore long HPD set*/
>         if (display->hotplug.ignore_long_hpd) {
>@@ -569,13 +560,13 @@ static void i915_hotplug_work_func(struct work_struct *work)
>         /* Remove shared HPD pins that have changed */
>         retry &= ~changed;
>         if (retry) {
>-                spin_lock_irq(&dev_priv->irq_lock);
>+                spin_lock_irq(&display->irq.lock);
>                 display->hotplug.retry_bits |= retry;
> 
>                 mod_delayed_detection_work(display,
>                                            &display->hotplug.hotplug_work,
>                                            msecs_to_jiffies(HPD_RETRY_DELAY));
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>         }
> }
> 
>@@ -599,7 +590,6 @@ static void i915_hotplug_work_func(struct work_struct *work)
> void intel_hpd_irq_handler(struct intel_display *display,
>                            u32 pin_mask, u32 long_mask)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_encoder *encoder;
>         bool storm_detected = false;
>         bool queue_dig = false, queue_hp = false;
>@@ -610,7 +600,7 @@ void intel_hpd_irq_handler(struct intel_display *display,
>         if (!pin_mask)
>                 return;
> 
>-        spin_lock(&dev_priv->irq_lock);
>+        spin_lock(&display->irq.lock);
> 
>         /*
>          * Determine whether ->hpd_pulse() exists for each pin, and
>@@ -711,7 +701,7 @@ void intel_hpd_irq_handler(struct intel_display *display,
>                 queue_delayed_detection_work(display,
>                                              &display->hotplug.hotplug_work, 0);
> 
>-        spin_unlock(&dev_priv->irq_lock);
>+        spin_unlock(&display->irq.lock);
> }
> 
> /**
>@@ -730,7 +720,6 @@ void intel_hpd_irq_handler(struct intel_display *display,
>  */
> void intel_hpd_init(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         int i;
> 
>         if (!HAS_DISPLAY(display))
>@@ -745,9 +734,9 @@ void intel_hpd_init(struct intel_display *display)
>          * Interrupt setup is already guaranteed to be single-threaded, this is
>          * just to make the assert_spin_locked checks happy.
>          */
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         intel_hpd_irq_setup(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void i915_hpd_poll_detect_connectors(struct intel_display *display)
>@@ -797,7 +786,6 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
> {
>         struct intel_display *display =
>                 container_of(work, typeof(*display), hotplug.poll_init_work);
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct drm_connector_list_iter conn_iter;
>         struct intel_connector *connector;
>         intel_wakeref_t wakeref;
>@@ -820,7 +808,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
>                 cancel_work(&display->hotplug.poll_init_work);
>         }
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         drm_connector_list_iter_begin(display->drm, &conn_iter);
>         for_each_intel_connector_iter(connector, &conn_iter) {
>@@ -841,7 +829,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
>         }
>         drm_connector_list_iter_end(&conn_iter);
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         if (enabled)
>                 drm_kms_helper_poll_reschedule(display->drm);
>@@ -879,8 +867,6 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
>  */
> void intel_hpd_poll_enable(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         if (!HAS_DISPLAY(display) || !intel_display_device_enabled(display))
>                 return;
> 
>@@ -892,10 +878,10 @@ void intel_hpd_poll_enable(struct intel_display *display)
>          * As well, there's no issue if we race here since we always reschedule
>          * this worker anyway
>          */
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         queue_detection_work(display,
>                              &display->hotplug.poll_init_work);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> /**
>@@ -919,17 +905,15 @@ void intel_hpd_poll_enable(struct intel_display *display)
>  */
> void intel_hpd_poll_disable(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         if (!HAS_DISPLAY(display))
>                 return;
> 
>         WRITE_ONCE(display->hotplug.poll_enabled, false);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         queue_detection_work(display,
>                              &display->hotplug.poll_init_work);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void intel_hpd_poll_fini(struct intel_display *display)
>@@ -981,12 +965,10 @@ static bool cancel_all_detection_work(struct intel_display *display)
> 
> void intel_hpd_cancel_work(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>         if (!HAS_DISPLAY(display))
>                 return;
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         drm_WARN_ON(display->drm, get_blocked_hpd_pin_mask(display));
> 
>@@ -995,7 +977,7 @@ void intel_hpd_cancel_work(struct intel_display *display)
>         display->hotplug.event_bits = 0;
>         display->hotplug.retry_bits = 0;
> 
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         cancel_work_sync(&display->hotplug.dig_port_work);
> 
>@@ -1009,13 +991,12 @@ void intel_hpd_cancel_work(struct intel_display *display)
> 
> static void queue_work_for_missed_irqs(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         bool queue_hp_work = false;
>         u32 blocked_hpd_pin_mask;
>         enum hpd_pin pin;
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         blocked_hpd_pin_mask = get_blocked_hpd_pin_mask(display);
>         if ((hotplug->event_bits | hotplug->retry_bits) & ~blocked_hpd_pin_mask)
>@@ -1043,10 +1024,9 @@ static void queue_work_for_missed_irqs(struct intel_display *display)
> 
> static bool block_hpd_pin(struct intel_display *display, enum hpd_pin pin)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         hotplug->stats[pin].blocked_count++;
> 
>@@ -1055,10 +1035,9 @@ static bool block_hpd_pin(struct intel_display *display, enum hpd_pin pin)
> 
> static bool unblock_hpd_pin(struct intel_display *display, enum hpd_pin pin)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
> 
>-        lockdep_assert_held(&i915->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         if (drm_WARN_ON(display->drm, hotplug->stats[pin].blocked_count == 0))
>                 return true;
>@@ -1095,19 +1074,18 @@ static bool unblock_hpd_pin(struct intel_display *display, enum hpd_pin pin)
> void intel_hpd_block(struct intel_encoder *encoder)
> {
>         struct intel_display *display = to_intel_display(encoder);
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         bool do_flush = false;
> 
>         if (encoder->hpd_pin == HPD_NONE)
>                 return;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (block_hpd_pin(display, encoder->hpd_pin))
>                 do_flush = true;
> 
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         if (do_flush && hpd_pin_has_pulse(display, encoder->hpd_pin))
>                 flush_work(&hotplug->dig_port_work);
>@@ -1125,17 +1103,16 @@ void intel_hpd_block(struct intel_encoder *encoder)
> void intel_hpd_unblock(struct intel_encoder *encoder)
> {
>         struct intel_display *display = to_intel_display(encoder);
>-        struct drm_i915_private *i915 = to_i915(display->drm);
> 
>         if (encoder->hpd_pin == HPD_NONE)
>                 return;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (unblock_hpd_pin(display, encoder->hpd_pin))
>                 queue_work_for_missed_irqs(display);
> 
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> /**
>@@ -1149,14 +1126,13 @@ void intel_hpd_unblock(struct intel_encoder *encoder)
> void intel_hpd_clear_and_unblock(struct intel_encoder *encoder)
> {
>         struct intel_display *display = to_intel_display(encoder);
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         enum hpd_pin pin = encoder->hpd_pin;
> 
>         if (pin == HPD_NONE)
>                 return;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
> 
>         if (unblock_hpd_pin(display, pin)) {
>                 hotplug->event_bits &= ~BIT(pin);
>@@ -1165,39 +1141,34 @@ void intel_hpd_clear_and_unblock(struct intel_encoder *encoder)
>                 hotplug->long_hpd_pin_mask &= ~BIT(pin);
>         }
> 
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void intel_hpd_enable_detection_work(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         display->hotplug.detection_work_enabled = true;
>         queue_work_for_missed_irqs(display);
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> void intel_hpd_disable_detection_work(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>-
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         display->hotplug.detection_work_enabled = false;
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         cancel_all_detection_work(display);
> }
> 
> bool intel_hpd_schedule_detection(struct intel_display *display)
> {
>-        struct drm_i915_private *i915 = to_i915(display->drm);
>         unsigned long flags;
>         bool ret;
> 
>-        spin_lock_irqsave(&i915->irq_lock, flags);
>+        spin_lock_irqsave(&display->irq.lock, flags);
>         ret = queue_delayed_detection_work(display, &display->hotplug.hotplug_work, 0);
>-        spin_unlock_irqrestore(&i915->irq_lock, flags);
>+        spin_unlock_irqrestore(&display->irq.lock, flags);
> 
>         return ret;
> }
>@@ -1228,7 +1199,6 @@ static ssize_t i915_hpd_storm_ctl_write(struct file *file,
> {
>         struct seq_file *m = file->private_data;
>         struct intel_display *display = m->private;
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         unsigned int new_threshold;
>         int i;
>@@ -1260,12 +1230,12 @@ static ssize_t i915_hpd_storm_ctl_write(struct file *file,
>         else
>                 drm_dbg_kms(display->drm, "Disabling HPD storm detection\n");
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         hotplug->hpd_storm_threshold = new_threshold;
>         /* Reset the HPD storm stats so we don't accidentally trigger a storm */
>         for_each_hpd_pin(i)
>                 hotplug->stats[i].count = 0;
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         /* Re-enable hpd immediately if we were in an irq storm */
>         flush_delayed_work(&display->hotplug.reenable_work);
>@@ -1310,7 +1280,6 @@ static ssize_t i915_hpd_short_storm_ctl_write(struct file *file,
> {
>         struct seq_file *m = file->private_data;
>         struct intel_display *display = m->private;
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_hotplug *hotplug = &display->hotplug;
>         char *newline;
>         char tmp[16];
>@@ -1339,12 +1308,12 @@ static ssize_t i915_hpd_short_storm_ctl_write(struct file *file,
>         drm_dbg_kms(display->drm, "%sabling HPD short storm detection\n",
>                     new_state ? "En" : "Dis");
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         hotplug->hpd_short_storm_enabled = new_state;
>         /* Reset the HPD storm stats so we don't accidentally trigger a storm */
>         for_each_hpd_pin(i)
>                 hotplug->stats[i].count = 0;
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> 
>         /* Re-enable hpd immediately if we were in an irq storm */
>         flush_delayed_work(&display->hotplug.reenable_work);
>diff --git a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
>index c841399e5c88..c024b42369c8 100644
>--- a/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_hotplug_irq.c
>@@ -3,8 +3,10 @@
>  * Copyright © 2023 Intel Corporation
>  */
> 
>-#include "i915_drv.h"
>+#include <drm/drm_print.h>
>+
> #include "i915_reg.h"
>+#include "i915_utils.h"
> #include "intel_de.h"
> #include "intel_display_irq.h"
> #include "intel_display_types.h"
>@@ -183,9 +185,7 @@ static void intel_hpd_init_pins(struct intel_display *display)
> void i915_hotplug_interrupt_update_locked(struct intel_display *display,
>                                           u32 mask, u32 bits)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
>         drm_WARN_ON(display->drm, bits & ~mask);
> 
>         intel_de_rmw(display, PORT_HOTPLUG_EN(display), mask, bits);
>@@ -207,11 +207,9 @@ void i915_hotplug_interrupt_update(struct intel_display *display,
>                                    u32 mask,
>                                    u32 bits)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>-
>-        spin_lock_irq(&dev_priv->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         i915_hotplug_interrupt_update_locked(display, mask, bits);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static bool gen11_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
>@@ -556,7 +554,6 @@ void xelpdp_pica_irq_handler(struct intel_display *display, u32 iir)
> 
> void icp_irq_handler(struct intel_display *display, u32 pch_iir)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 ddi_hotplug_trigger = pch_iir & SDE_DDI_HOTPLUG_MASK_ICP;
>         u32 tc_hotplug_trigger = pch_iir & SDE_TC_HOTPLUG_MASK_ICP;
>         u32 pin_mask = 0, long_mask = 0;
>@@ -565,9 +562,9 @@ void icp_irq_handler(struct intel_display *display, u32 pch_iir)
>                 u32 dig_hotplug_reg;
> 
>                 /* Locking due to DSI native GPIO sequences */
>-                spin_lock(&dev_priv->irq_lock);
>+                spin_lock(&display->irq.lock);
>                 dig_hotplug_reg = intel_de_rmw(display, SHOTPLUG_CTL_DDI, 0, 0);
>-                spin_unlock(&dev_priv->irq_lock);
>+                spin_unlock(&display->irq.lock);
> 
>                 intel_get_hpd_pins(display, &pin_mask, &long_mask,
>                                    ddi_hotplug_trigger, dig_hotplug_reg,
>@@ -1395,10 +1392,9 @@ static void i915_hpd_enable_detection(struct intel_encoder *encoder)
> 
> static void i915_hpd_irq_setup(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 hotplug_en;
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        lockdep_assert_held(&display->irq.lock);
> 
>         /*
>          * Note HDMI and DP share hotplug bits. Enable bits are the same for all
>diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
>index 2e3f3f0207e8..acf0b3733908 100644
>--- a/drivers/gpu/drm/i915/display/intel_tv.c
>+++ b/drivers/gpu/drm/i915/display/intel_tv.c
>@@ -33,15 +33,15 @@
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_crtc.h>
> #include <drm/drm_edid.h>
>+#include <drm/drm_print.h>
> #include <drm/drm_probe_helper.h>
> 
>-#include "i915_drv.h"
> #include "i915_reg.h"
> #include "intel_connector.h"
> #include "intel_crtc.h"
> #include "intel_de.h"
>-#include "intel_display_irq.h"
> #include "intel_display_driver.h"
>+#include "intel_display_irq.h"
> #include "intel_display_types.h"
> #include "intel_dpll.h"
> #include "intel_hotplug.h"
>@@ -1585,19 +1585,17 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
> {
>         struct intel_display *display = to_intel_display(connector->dev);
>         struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);
>-        struct drm_device *dev = connector->dev;
>-        struct drm_i915_private *dev_priv = to_i915(dev);
>         u32 tv_ctl, save_tv_ctl;
>         u32 tv_dac, save_tv_dac;
>         int type;
> 
>         /* Disable TV interrupts around load detect or we'll recurse */
>         if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
>-                spin_lock_irq(&dev_priv->irq_lock);
>+                spin_lock_irq(&display->irq.lock);
>                 i915_disable_pipestat(display, 0,
>                                       PIPE_HOTPLUG_INTERRUPT_STATUS |
>                                       PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>         }
> 
>         save_tv_dac = tv_dac = intel_de_read(display, TV_DAC);
>@@ -1668,11 +1666,11 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
> 
>         /* Restore interrupt config */
>         if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
>-                spin_lock_irq(&dev_priv->irq_lock);
>+                spin_lock_irq(&display->irq.lock);
>                 i915_enable_pipestat(display, 0,
>                                      PIPE_HOTPLUG_INTERRUPT_STATUS |
>                                      PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
>-                spin_unlock_irq(&dev_priv->irq_lock);
>+                spin_unlock_irq(&display->irq.lock);
>         }
> 
>         return type;
>diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>index 8739195aba69..844519286b1c 100644
>--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>@@ -2690,24 +2690,22 @@ static void
> skl_plane_enable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         bdw_enable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static void
> skl_plane_disable_flip_done(struct intel_plane *plane)
> {
>         struct intel_display *display = to_intel_display(plane);
>-        struct drm_i915_private *i915 = to_i915(plane->base.dev);
>         enum pipe pipe = plane->pipe;
> 
>-        spin_lock_irq(&i915->irq_lock);
>+        spin_lock_irq(&display->irq.lock);
>         bdw_disable_pipe_irq(display, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id));
>-        spin_unlock_irq(&i915->irq_lock);
>+        spin_unlock_irq(&display->irq.lock);
> }
> 
> static bool skl_plane_has_rc_ccs(struct intel_display *display,
>diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
>index 96a52f963475..273bc43468a0 100644
>--- a/drivers/gpu/drm/i915/i915_driver.c
>+++ b/drivers/gpu/drm/i915/i915_driver.c
>@@ -234,7 +234,6 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv)
> 
>         intel_uncore_mmio_debug_init_early(dev_priv);
> 
>-        spin_lock_init(&dev_priv->irq_lock);
>         spin_lock_init(&dev_priv->gpu_error.lock);
> 
>         intel_sbi_init(dev_priv);
>diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>index c0eec8fe5cad..d0e1980dcba2 100644
>--- a/drivers/gpu/drm/i915/i915_drv.h
>+++ b/drivers/gpu/drm/i915/i915_drv.h
>@@ -222,8 +222,6 @@ struct drm_i915_private {
>         };
>         unsigned int engine_uabi_class_count[I915_LAST_UABI_ENGINE_CLASS + 1];
> 
>-        /* protects the irq masks */
>-        spinlock_t irq_lock;
>         bool irqs_enabled;
> 
>         /* LPT/WPT IOSF sideband protection */
>diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
>index dd36f9b06b89..9b7572e06f34 100644
>--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
>+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
>@@ -60,15 +60,4 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
> #define HAS_FLAT_CCS(xe) (xe_device_has_flat_ccs(xe))
> #define HAS_128_BYTE_Y_TILING(xe) (xe || 1)
> 
>-#ifdef CONFIG_ARM64
>-/*
>- * arm64 indirectly includes linux/rtc.h,
>- * which defines a irq_lock, so include it
>- * here before #define-ing it
>- */
>-#include <linux/rtc.h>
>-#endif
>-
>-#define irq_lock irq.lock
>-
> #endif
>-- 
>2.39.5
>

Re: [PATCH 1/8] drm/i915/irq: move locking inside vlv_display_irq_reset()

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:43-03:00)
>All users of vlv_display_irq_reset() have a lock/unlock pair. Move the
>locking inside the function.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 4 ++++
> drivers/gpu/drm/i915/i915_irq.c                  | 4 ----
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 73b6254c5485..22bb0fc10736 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -1884,8 +1884,12 @@ static void _vlv_display_irq_reset(struct intel_display *display)
> 
> void vlv_display_irq_reset(struct intel_display *display)
> {
>+        struct drm_i915_private *dev_priv = to_i915(display->drm);
>+
>+        spin_lock_irq(&dev_priv->irq_lock);
>         if (display->irq.vlv_display_irqs_enabled)
>                 _vlv_display_irq_reset(display);
>+        spin_unlock_irq(&dev_priv->irq_lock);
> }
> 
> void i9xx_display_irq_reset(struct intel_display *display)
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index d06694d6531e..b918b440cbce 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -688,9 +688,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
> 
>         gen5_gt_irq_reset(to_gt(dev_priv));
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         vlv_display_irq_reset(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> }
> 
> static void gen8_irq_reset(struct drm_i915_private *dev_priv)
>@@ -752,9 +750,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
> 
>         gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         vlv_display_irq_reset(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> }
> 
> static void ilk_irq_postinstall(struct drm_i915_private *dev_priv)
>-- 
>2.39.5
>

Re: [PATCH 2/8] drm/i915/irq: move locking inside valleyview_{enable, disable}_display_irqs()

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:44-03:00)
>All users of valleyview_enable_display_irqs() and
>valleyview_disable_display_irqs() have a lock/unlock pair. Move the
>locking inside the functions.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_display_irq.c    | 13 +++++++++----
> .../gpu/drm/i915/display/intel_display_power_well.c |  5 -----
> 2 files changed, 9 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 22bb0fc10736..3d2294a4d83d 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -2117,10 +2117,10 @@ void valleyview_enable_display_irqs(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        spin_lock_irq(&dev_priv->irq_lock);
> 
>         if (display->irq.vlv_display_irqs_enabled)
>-                return;
>+                goto out;
> 
>         display->irq.vlv_display_irqs_enabled = true;
> 
>@@ -2128,21 +2128,26 @@ void valleyview_enable_display_irqs(struct intel_display *display)
>                 _vlv_display_irq_reset(display);
>                 vlv_display_irq_postinstall(display);
>         }
>+
>+out:
>+        spin_unlock_irq(&dev_priv->irq_lock);
> }
> 
> void valleyview_disable_display_irqs(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>-        lockdep_assert_held(&dev_priv->irq_lock);
>+        spin_lock_irq(&dev_priv->irq_lock);
> 
>         if (!display->irq.vlv_display_irqs_enabled)
>-                return;
>+                goto out;
> 
>         display->irq.vlv_display_irqs_enabled = false;
> 
>         if (intel_irqs_enabled(dev_priv))
>                 _vlv_display_irq_reset(display);
>+out:
>+        spin_unlock_irq(&dev_priv->irq_lock);
> }
> 
> void ilk_de_irq_postinstall(struct intel_display *display)
>diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>index 6335fa909a7b..b104bce0e14d 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
>@@ -1212,7 +1212,6 @@ static void vlv_init_display_clock_gating(struct intel_display *display)
> 
> static void vlv_display_power_well_init(struct intel_display *display)
> {
>-        struct drm_i915_private *dev_priv = to_i915(display->drm);
>         struct intel_encoder *encoder;
>         enum pipe pipe;
> 
>@@ -1236,9 +1235,7 @@ static void vlv_display_power_well_init(struct intel_display *display)
> 
>         vlv_init_display_clock_gating(display);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         valleyview_enable_display_irqs(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> 
>         /*
>          * During driver initialization/resume we can avoid restoring the
>@@ -1265,9 +1262,7 @@ static void vlv_display_power_well_deinit(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         valleyview_disable_display_irqs(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> 
>         /* make sure we're done processing display irqs */
>         intel_synchronize_irq(dev_priv);
>-- 
>2.39.5
>

Re: [PATCH 3/8] drm/i915/irq: move locking inside vlv_display_irq_postinstall()

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:45-03:00)
>All users of vlv_display_irq_postinstall() outside of
>intel_display_irq.c have a lock/unlock pair. Move the locking inside the
>function. Add an unlocked variant for internal use, similar to the
>_vlv_display_irq_reset() and vlv_display_irq_reset() functions.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> .../gpu/drm/i915/display/intel_display_irq.c    | 17 ++++++++++++-----
> drivers/gpu/drm/i915/i915_irq.c                 |  4 ----
> 2 files changed, 12 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 3d2294a4d83d..a0e08b8752e7 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -1908,16 +1908,13 @@ static u32 vlv_error_mask(void)
>         return VLV_ERROR_PAGE_TABLE;
> }
> 
>-void vlv_display_irq_postinstall(struct intel_display *display)
>+static void _vlv_display_irq_postinstall(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
>         u32 pipestat_mask;
>         u32 enable_mask;
>         enum pipe pipe;
> 
>-        if (!display->irq.vlv_display_irqs_enabled)
>-                return;
>-
>         if (display->platform.cherryview)
>                 intel_de_write(display, DPINVGTT,
>                                DPINVGTT_STATUS_MASK_CHV |
>@@ -1954,6 +1951,16 @@ void vlv_display_irq_postinstall(struct intel_display *display)
>         intel_display_irq_regs_init(display, VLV_IRQ_REGS, dev_priv->irq_mask, enable_mask);
> }
> 
>+void vlv_display_irq_postinstall(struct intel_display *display)
>+{
>+        struct drm_i915_private *dev_priv = to_i915(display->drm);
>+
>+        spin_lock_irq(&dev_priv->irq_lock);
>+        if (display->irq.vlv_display_irqs_enabled)
>+                _vlv_display_irq_postinstall(display);
>+        spin_unlock_irq(&dev_priv->irq_lock);
>+}
>+
> void ibx_display_irq_reset(struct intel_display *display)
> {
>         struct drm_i915_private *i915 = to_i915(display->drm);
>@@ -2126,7 +2133,7 @@ void valleyview_enable_display_irqs(struct intel_display *display)
> 
>         if (intel_irqs_enabled(dev_priv)) {
>                 _vlv_display_irq_reset(display);
>-                vlv_display_irq_postinstall(display);
>+                _vlv_display_irq_postinstall(display);
>         }
> 
> out:
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index b918b440cbce..19d8a7c29eac 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -768,9 +768,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
> 
>         gen5_gt_irq_postinstall(to_gt(dev_priv));
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         vlv_display_irq_postinstall(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> 
>         intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
>         intel_uncore_posting_read(&dev_priv->uncore, VLV_MASTER_IER);
>@@ -827,9 +825,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
> 
>         gen8_gt_irq_postinstall(to_gt(dev_priv));
> 
>-        spin_lock_irq(&dev_priv->irq_lock);
>         vlv_display_irq_postinstall(display);
>-        spin_unlock_irq(&dev_priv->irq_lock);
> 
>         intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
>         intel_uncore_posting_read(&dev_priv->uncore, GEN8_MASTER_IRQ);
>-- 
>2.39.5
>

Re: [PATCH 4/8] drm/i915/irq: split out i915_display_irq_postinstall()

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:46-03:00)
>Split out i915_display_irq_postinstall() similar to other platforms.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 16 ++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display_irq.h |  1 +
> drivers/gpu/drm/i915/i915_irq.c                  |  9 +--------
> 3 files changed, 18 insertions(+), 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index a0e08b8752e7..77cdd1ea5d00 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -1902,6 +1902,22 @@ void i9xx_display_irq_reset(struct intel_display *display)
>         i9xx_pipestat_irq_reset(display);
> }
> 
>+void i915_display_irq_postinstall(struct intel_display *display)
>+{
>+        struct drm_i915_private *dev_priv = to_i915(display->drm);
>+
>+        /*
>+         * Interrupt setup is already guaranteed to be single-threaded, this is
>+         * just to make the assert_spin_locked check happy.
>+         */
>+        spin_lock_irq(&dev_priv->irq_lock);
>+        i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>+        i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>+        spin_unlock_irq(&dev_priv->irq_lock);
>+
>+        i915_enable_asle_pipestat(display);
>+}
>+
> static u32 vlv_error_mask(void)
> {
>         /* TODO enable other errors too? */
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
>index 5422426c6843..8fdce804c9d7 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
>@@ -61,6 +61,7 @@ void vlv_display_irq_reset(struct intel_display *display);
> void gen8_display_irq_reset(struct intel_display *display);
> void gen11_display_irq_reset(struct intel_display *display);
> 
>+void i915_display_irq_postinstall(struct intel_display *display);
> void vlv_display_irq_postinstall(struct intel_display *display);
> void ilk_de_irq_postinstall(struct intel_display *display);
> void gen8_de_irq_postinstall(struct intel_display *display);
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 19d8a7c29eac..30c78177ae0d 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -935,14 +935,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
> 
>         gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
> 
>-        /* Interrupt setup is already guaranteed to be single-threaded, this is
>-         * just to make the assert_spin_locked check happy. */
>-        spin_lock_irq(&dev_priv->irq_lock);
>-        i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>-
>-        i915_enable_asle_pipestat(display);
>+        i915_display_irq_postinstall(display);
> }
> 
> static irqreturn_t i915_irq_handler(int irq, void *arg)
>-- 
>2.39.5
>

Re: [PATCH 5/8] drm/i915/irq: split out i965_display_irq_postinstall()

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:47-03:00)
>Split out i965_display_irq_postinstall() similar to other platforms.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> .../gpu/drm/i915/display/intel_display_irq.c    | 17 +++++++++++++++++
> .../gpu/drm/i915/display/intel_display_irq.h    |  1 +
> drivers/gpu/drm/i915/i915_irq.c                 | 10 +---------
> 3 files changed, 19 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 77cdd1ea5d00..989b78339aa4 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -1918,6 +1918,23 @@ void i915_display_irq_postinstall(struct intel_display *display)
>         i915_enable_asle_pipestat(display);
> }
> 
>+void i965_display_irq_postinstall(struct intel_display *display)
>+{
>+        struct drm_i915_private *dev_priv = to_i915(display->drm);
>+
>+        /*
>+         * Interrupt setup is already guaranteed to be single-threaded, this is
>+         * just to make the assert_spin_locked check happy.
>+         */
>+        spin_lock_irq(&dev_priv->irq_lock);
>+        i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
>+        i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>+        i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>+        spin_unlock_irq(&dev_priv->irq_lock);
>+
>+        i915_enable_asle_pipestat(display);
>+}
>+
> static u32 vlv_error_mask(void)
> {
>         /* TODO enable other errors too? */
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
>index 8fdce804c9d7..4c0ed476e568 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
>@@ -62,6 +62,7 @@ void gen8_display_irq_reset(struct intel_display *display);
> void gen11_display_irq_reset(struct intel_display *display);
> 
> void i915_display_irq_postinstall(struct intel_display *display);
>+void i965_display_irq_postinstall(struct intel_display *display);
> void vlv_display_irq_postinstall(struct intel_display *display);
> void ilk_de_irq_postinstall(struct intel_display *display);
> void gen8_de_irq_postinstall(struct intel_display *display);
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 30c78177ae0d..95042879bec4 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -1053,15 +1053,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
> 
>         gen2_irq_init(uncore, GEN2_IRQ_REGS, dev_priv->irq_mask, enable_mask);
> 
>-        /* Interrupt setup is already guaranteed to be single-threaded, this is
>-         * just to make the assert_spin_locked check happy. */
>-        spin_lock_irq(&dev_priv->irq_lock);
>-        i915_enable_pipestat(display, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
>-        i915_enable_pipestat(display, PIPE_A, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        i915_enable_pipestat(display, PIPE_B, PIPE_CRC_DONE_INTERRUPT_STATUS);
>-        spin_unlock_irq(&dev_priv->irq_lock);
>-
>-        i915_enable_asle_pipestat(display);
>+        i965_display_irq_postinstall(display);
> }
> 
> static irqreturn_t i965_irq_handler(int irq, void *arg)
>-- 
>2.39.5
>

Re: [PATCH 6/8] drm/i915/irq: make i915_enable_asle_pipestat() static

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:48-03:00)
>With all users of i915_enable_asle_pipestat() inside
>intel_display_irq.c, we can make the function static.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 7 ++-----
> drivers/gpu/drm/i915/display/intel_display_irq.h | 1 -
> 2 files changed, 2 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 989b78339aa4..0d72964694ce 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -377,11 +377,8 @@ static bool i915_has_legacy_blc_interrupt(struct intel_display *display)
>         return IS_DISPLAY_VER(display, 3, 4) && display->platform.mobile;
> }
> 
>-/**
>- * i915_enable_asle_pipestat - enable ASLE pipestat for OpRegion
>- * @display: display device
>- */
>-void i915_enable_asle_pipestat(struct intel_display *display)
>+/* enable ASLE pipestat for OpRegion */
>+static void i915_enable_asle_pipestat(struct intel_display *display)
> {
>         struct drm_i915_private *dev_priv = to_i915(display->drm);
> 
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
>index 4c0ed476e568..c66db3851da4 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
>@@ -72,7 +72,6 @@ void dg1_de_irq_postinstall(struct intel_display *display);
> u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
> void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
> void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
>-void i915_enable_asle_pipestat(struct intel_display *display);
> 
> void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
> 
>-- 
>2.39.5
>

Re: [PATCH 7/8] drm/i915/rps: refactor display rps support

[Gustavo Sousa]

Quoting Jani Nikula (2025-05-06 10:06:49-03:00)
>Make the gt rps code and display irq code interact via
>intel_display_rps.[ch], instead of direct access. Add no-op static
>inline stubs for xe instead of having a separate build unit doing
>nothing. All of this clarifies the interfaces between i915 core and
>display.
>
>Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> .../gpu/drm/i915/display/intel_display_irq.c  |  5 ++--
> .../gpu/drm/i915/display/intel_display_rps.c  | 27 +++++++++++++++++++
> .../gpu/drm/i915/display/intel_display_rps.h  | 24 +++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_rps.c           | 10 +++----
> drivers/gpu/drm/xe/Makefile                   |  1 -
> .../drm/xe/compat-i915-headers/gt/intel_rps.h | 11 --------
> drivers/gpu/drm/xe/display/xe_display_rps.c   | 17 ------------
> 7 files changed, 56 insertions(+), 39 deletions(-)
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
> delete mode 100644 drivers/gpu/drm/xe/display/xe_display_rps.c
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
>index 0d72964694ce..264ddeba121b 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
>@@ -5,7 +5,6 @@
> 
> #include <drm/drm_vblank.h>
> 
>-#include "gt/intel_rps.h"
> #include "i915_drv.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
>@@ -15,6 +14,7 @@
> #include "intel_de.h"
> #include "intel_display_irq.h"
> #include "intel_display_rpm.h"
>+#include "intel_display_rps.h"
> #include "intel_display_trace.h"
> #include "intel_display_types.h"
> #include "intel_dmc_wl.h"
>@@ -876,7 +876,6 @@ static void ilk_gtt_fault_irq_handler(struct intel_display *display)
> 
> void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
> {
>-        struct drm_i915_private __maybe_unused *dev_priv = to_i915(display->drm);
>         enum pipe pipe;
>         u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG;
> 
>@@ -923,7 +922,7 @@ void ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
>         }
> 
>         if (DISPLAY_VER(display) == 5 && de_iir & DE_PCU_EVENT)
>-                gen5_rps_irq_handler(&to_gt(dev_priv)->rps);
>+                ilk_display_rps_irq_handler(display);
> }
> 
> void ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
>diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
>index 4074a1879828..941bff5a5eb0 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
>@@ -8,6 +8,8 @@
> 
> #include "gt/intel_rps.h"
> #include "i915_drv.h"
>+#include "i915_reg.h"
>+#include "intel_display_irq.h"
> #include "intel_display_rps.h"
> #include "intel_display_types.h"
> 
>@@ -81,3 +83,28 @@ void intel_display_rps_mark_interactive(struct intel_display *display,
>         intel_rps_mark_interactive(&to_gt(i915)->rps, interactive);
>         state->rps_interactive = interactive;
> }
>+
>+void ilk_display_rps_enable(struct intel_display *display)
>+{
>+        struct drm_i915_private *i915 = to_i915(display->drm);
>+
>+        spin_lock(&i915->irq_lock);
>+        ilk_enable_display_irq(display, DE_PCU_EVENT);
>+        spin_unlock(&i915->irq_lock);
>+}
>+
>+void ilk_display_rps_disable(struct intel_display *display)
>+{
>+        struct drm_i915_private *i915 = to_i915(display->drm);
>+
>+        spin_lock(&i915->irq_lock);
>+        ilk_disable_display_irq(display, DE_PCU_EVENT);
>+        spin_unlock(&i915->irq_lock);
>+}
>+
>+void ilk_display_rps_irq_handler(struct intel_display *display)
>+{
>+        struct drm_i915_private *i915 = to_i915(display->drm);
>+
>+        gen5_rps_irq_handler(&to_gt(i915)->rps);
>+}
>diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.h b/drivers/gpu/drm/i915/display/intel_display_rps.h
>index 556891edb2dd..183d154f2c7c 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_rps.h
>+++ b/drivers/gpu/drm/i915/display/intel_display_rps.h
>@@ -13,10 +13,34 @@ struct drm_crtc;
> struct intel_atomic_state;
> struct intel_display;
> 
>+#ifdef I915
> void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>                                           struct dma_fence *fence);
> void intel_display_rps_mark_interactive(struct intel_display *display,
>                                         struct intel_atomic_state *state,
>                                         bool interactive);
>+void ilk_display_rps_enable(struct intel_display *display);
>+void ilk_display_rps_disable(struct intel_display *display);
>+void ilk_display_rps_irq_handler(struct intel_display *display);
>+#else
>+static inline void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>+                                                        struct dma_fence *fence)
>+{
>+}
>+static inline void intel_display_rps_mark_interactive(struct intel_display *display,
>+                                                      struct intel_atomic_state *state,
>+                                                      bool interactive)
>+{
>+}
>+static inline void ilk_display_rps_enable(struct intel_display *display)
>+{
>+}
>+static inline void ilk_display_rps_disable(struct intel_display *display)
>+{
>+}
>+static inline void ilk_display_rps_irq_handler(struct intel_display *display)
>+{
>+}
>+#endif
> 
> #endif /* __INTEL_DISPLAY_RPS_H__ */
>diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
>index b609e3aa2122..5abc5fcc2514 100644
>--- a/drivers/gpu/drm/i915/gt/intel_rps.c
>+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
>@@ -8,7 +8,7 @@
> #include <drm/intel/i915_drm.h>
> 
> #include "display/intel_display.h"
>-#include "display/intel_display_irq.h"
>+#include "display/intel_display_rps.h"
> #include "i915_drv.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
>@@ -608,9 +608,7 @@ static bool gen5_rps_enable(struct intel_rps *rps)
>         rps->ips.last_count2 = intel_uncore_read(uncore, GFXEC);
>         rps->ips.last_time2 = ktime_get_raw_ns();
> 
>-        spin_lock(&i915->irq_lock);
>-        ilk_enable_display_irq(display, DE_PCU_EVENT);
>-        spin_unlock(&i915->irq_lock);
>+        ilk_display_rps_enable(display);
> 
>         spin_unlock_irq(&mchdev_lock);
> 
>@@ -628,9 +626,7 @@ static void gen5_rps_disable(struct intel_rps *rps)
> 
>         spin_lock_irq(&mchdev_lock);
> 
>-        spin_lock(&i915->irq_lock);
>-        ilk_disable_display_irq(display, DE_PCU_EVENT);
>-        spin_unlock(&i915->irq_lock);
>+        ilk_display_rps_disable(display);
> 
>         rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> 
>diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
>index 3ecac0a38b82..e4bf484d4121 100644
>--- a/drivers/gpu/drm/xe/Makefile
>+++ b/drivers/gpu/drm/xe/Makefile
>@@ -187,7 +187,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>         display/xe_display.o \
>         display/xe_display_misc.o \
>         display/xe_display_rpm.o \
>-        display/xe_display_rps.o \
>         display/xe_display_wa.o \
>         display/xe_dsb_buffer.o \
>         display/xe_fb_pin.o \
>diff --git a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h b/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
>deleted file mode 100644
>index 21fec9cc837c..000000000000
>--- a/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
>+++ /dev/null
>@@ -1,11 +0,0 @@
>-/* SPDX-License-Identifier: MIT */
>-/*
>- * Copyright © 2023 Intel Corporation
>- */
>-
>-#ifndef __INTEL_RPS_H__
>-#define __INTEL_RPS_H__
>-
>-#define gen5_rps_irq_handler(x) ({})
>-
>-#endif /* __INTEL_RPS_H__ */
>diff --git a/drivers/gpu/drm/xe/display/xe_display_rps.c b/drivers/gpu/drm/xe/display/xe_display_rps.c
>deleted file mode 100644
>index fa616f9688a5..000000000000
>--- a/drivers/gpu/drm/xe/display/xe_display_rps.c
>+++ /dev/null
>@@ -1,17 +0,0 @@
>-// SPDX-License-Identifier: MIT
>-/*
>- * Copyright © 2023 Intel Corporation
>- */
>-
>-#include "intel_display_rps.h"
>-
>-void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
>-                                          struct dma_fence *fence)
>-{
>-}
>-
>-void intel_display_rps_mark_interactive(struct intel_display *display,
>-                                        struct intel_atomic_state *state,
>-                                        bool interactive)
>-{
>-}
>-- 
>2.39.5
>

Re: [PATCH 8/8] drm/i915/irq: move i915->irq_lock to display->irq.lock

[Jani Nikula]

On Tue, 06 May 2025, Gustavo Sousa <gustavo.sousa@intel.com> wrote:
> Quoting Jani Nikula (2025-05-06 10:06:50-03:00)
>>Observe that i915->irq_lock is no longer used to protect anything
>>outside of display. Make it a display thing.
>>
>>This allows us to remove the ugly #define irq_lock irq.lock hack from xe
>>compat header.
>>
>>Note that this is slightly more subtle than it first looks. For i915,
>>there's no functional change here. The lock is moved. However, for xe,
>>we'll now have *two* locks, xe->irq.lock and display->irq.lock. These
>>should protect different things, though. Indeed, nesting in the past
>>would've lead to a deadlock because they were the same lock.
>>
>>With the i915 references gone, we can make a handful more files
>>independent of i915_drv.h.
>>
>>Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Besides reviewing the patch itself, I also did a git-grep to check for
> lexical references to irq_lock in the code after this patch is applied.
>
> I found 2 references in comments:
>
>  (1) A reference to "drm_i915_private::irq_lock" in the comment for member
>      detection_work_enabled of struct intel_hotplug. I think we can
>      simply refer to "intel_display::irq::lock" now.
>
>  (2) A reference to "i915->irq_lock" in a comment inside struct intel_rps.
>      Looking at the history, it looks like we started using gt->irq_lock
>      with commit d762043f7ab1 ("drm/i915: Extract GT powermanagement
>      interrupt handling"), which failed to update the comment. I think
>      we can update the comment to make it more accurate. I guess that
>      could be on a patch of its own...

Thanks for spotting these!

I sent a separate fix for (2), because it is kind of separate [1].

> So, with the small tweak suggested in (1),
>
>   Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

Thanks a lot for the reviews! I took the liberty of tweaking the comment
(1) while applying, and pushed the series to din.

BR,
Jani.


[1] https://lore.kernel.org/r/20250507083136.1987023-1-jani.nikula@intel.com


-- 
Jani Nikula, Intel