Re: [PATCH RFC 10/12] drm/i915/display/dp: Adopt dp_connector helpers to expose link training state

Kory Maincent
2026-04-14T12:10:14Z

On Mon, 13 Apr 2026 16:05:53 +0300
Jani Nikula <jani.nikula@linux.intel.com> wrote:

> On Mon, 13 Apr 2026, Kory Maincent <kory.maincent@bootlin.com> wrote:
> > On Fri, 10 Apr 2026 19:26:53 +0300
> > Jani Nikula <jani.nikula@linux.intel.com> wrote:
> >
> >> On Thu, 09 Apr 2026, Kory Maincent <kory.maincent@bootlin.com> wrote:
> >> > Switch the i915 DP connector initialization from drmm_connector_init()
> >> > to drmm_connector_dp_init(), providing the source link capabilities
> >> > (supported lane counts, link rates, DSC support, voltage swing and
> >> > pre-emphasis levels).
> >> >
> >> > Add intel_dp_report_link_train() to collect the negotiated link
> >> > parameters (rate, lane count, DSC enable, per-lane voltage swing and
> >> > pre-emphasis) and report them via
> >> > drm_connector_dp_set_link_train_properties() once link training completes
> >> > successfully.
> >> >
> >> > Reset the link training properties via
> >> > drm_connector_dp_reset_link_train_properties() when the connector is
> >> > reported as disconnected or when the display device is disabled, so
> >> > the exposed state always reflects the current link status.
> >> >
> >> > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
> >> > ---
> >> > drivers/gpu/drm/i915/display/intel_dp.c | 31
> >> > +++++++++++++++++++--- .../gpu/drm/i915/display/intel_dp_link_training.c
> >> > | 25 +++++++++++++++++ 2 files changed, 52 insertions(+), 4 deletions(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> >> > b/drivers/gpu/drm/i915/display/intel_dp.c index
> >> > 2af64de9c81de..641406bdc0cc9 100644 ---
> >> > a/drivers/gpu/drm/i915/display/intel_dp.c +++
> >> > b/drivers/gpu/drm/i915/display/intel_dp.c @@ -45,6 +45,7 @@
> >> > #include <drm/display/drm_hdmi_helper.h>
> >> > #include <drm/drm_atomic_helper.h>
> >> > #include <drm/drm_crtc.h>
> >> > +#include <drm/drm_dp_connector.h>
> >> > #include <drm/drm_edid.h>
> >> > #include <drm/drm_fixed.h>
> >> > #include <drm/drm_managed.h>
> >> > @@ -6337,8 +6338,10 @@ intel_dp_detect(struct drm_connector *_connector,
> >> > drm_WARN_ON(display->drm,
> >> > !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex));
> >> >
> >> > - if (!intel_display_device_enabled(display))
> >> > + if (!intel_display_device_enabled(display)) {
> >> > +
> >> > drm_connector_dp_reset_link_train_properties(_connector); return
> >> > connector_status_disconnected;
> >> > + }
> >> >
> >> > if (!intel_display_driver_check_access(display))
> >> > return connector->base.status;
> >> > @@ -6388,6 +6391,8 @@ intel_dp_detect(struct drm_connector *_connector,
> >> >
> >> > intel_dp_tunnel_disconnect(intel_dp);
> >> >
> >> > +
> >> > drm_connector_dp_reset_link_train_properties(_connector); +
> >> > goto out_unset_edid;
> >> > }
> >> >
> >> > @@ -7162,10 +7167,12 @@ intel_dp_init_connector(struct intel_digital_port
> >> > *dig_port, struct intel_connector *connector)
> >> > {
> >> > struct intel_display *display = to_intel_display(dig_port);
> >> > + struct drm_connector_dp_link_train_caps link_caps;
> >> > struct intel_dp *intel_dp = &dig_port->dp;
> >> > struct intel_encoder *encoder = &dig_port->base;
> >> > struct drm_device *dev = encoder->base.dev;
> >> > enum port port = encoder->port;
> >> > + u32 *rates;
> >> > int type;
> >> >
> >> > if (drm_WARN(dev, dig_port->max_lanes < 1,
> >> > @@ -7213,8 +7220,25 @@ intel_dp_init_connector(struct intel_digital_port
> >> > *dig_port, type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
> >> > encoder->base.base.id, encoder->base.name);
> >> >
> >> > - drmm_connector_init(dev, &connector->base,
> >> > &intel_dp_connector_funcs,
> >> > - type, &intel_dp->aux.ddc);
> >> > + intel_dp_set_source_rates(intel_dp);
> >> > + link_caps.nlanes = DRM_DP_1LANE | DRM_DP_2LANE | DRM_DP_4LANE;
> >> > + link_caps.nrates = intel_dp->num_source_rates;
> >> > + rates = kzalloc_objs(*rates, intel_dp->num_source_rates);
> >> > + if (!rates)
> >> > + goto fail;
> >> > +
> >> > + for (int i = 0; i < intel_dp->num_source_rates; i++)
> >> > + rates[i] = intel_dp->source_rates[i];
> >> > +
> >> > + link_caps.rates = rates;
> >> > + link_caps.dsc = true;
> >>
> >> You have a source, you have a sink, and you have a link between the two.
> >>
> >> Source rates do not reflect the link rates common between source and
> >> sink.
> >>
> >> DSC depends on source and sink, and it's not statically "true" for
> >> either, and depends on a bunch of things.
> >
> > At init, we are reporting the capabilities of the source. So we list every
> > link rates that the source can achieve and we report that the source is DSC
> > capable which it is IIUC the code. Or maybe I am missing something?
>
> IMO link caps is the intersection of the source and sink caps. If the
> sink is unknown, i.e. its caps are the empty set, then the link caps
> should also be the empty set.

Ok thanks, I am rather new to the DiplayPort world so thank you for sharing
your knowledge.

IIUC currently the drivers are not testing all the capabilities of the link,
they try the more "powerful" link and decrease the link parameters until it
works right? So there is currently no way to now the full capabilities between a
sink and a source.

> If you need to know the source caps, then they need to be presented
> separately.

With DRM properties we can see possible values and the value set.
My though was that the possible value are matching the source capabilities and
value set was the one negotiated between the source and the sink.
This was straightforward to me but it indeed can confuse between source
capabilities and link capabilities. Have you a better idea?

> Moreover, the source does not unconditionally support DSC. See
> intel_dp_has_dsc().

Indeed thanks, I need to investigate that function.

Regards,
--
Köry Maincent, Bootlin
Embedded Linux and kernel engineering