From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 3/6] drm/i915: Pass crtc_state to ips toggle functions
Date: Thu, 9 Nov 2017 18:31:02 +0100 [thread overview]
Message-ID: <d2d1f426-0d07-76cd-e081-cad0a35656e1@linux.intel.com> (raw)
In-Reply-To: <20171109170957.GV10981@intel.com>
Op 09-11-17 om 18:09 schreef Ville Syrjälä:
> On Thu, Nov 09, 2017 at 05:24:55PM +0100, Maarten Lankhorst wrote:
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_color.c | 4 ++--
>> drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++-----------
>> drivers/gpu/drm/i915/intel_dp.c | 6 +++---
>> drivers/gpu/drm/i915/intel_drv.h | 4 ++--
>> 4 files changed, 20 insertions(+), 18 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
>> index b8315bca852b..c6373febf617 100644
>> --- a/drivers/gpu/drm/i915/intel_color.c
>> +++ b/drivers/gpu/drm/i915/intel_color.c
>> @@ -370,7 +370,7 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
>> */
>> if (IS_HASWELL(dev_priv) && intel_crtc_state->ips_enabled &&
>> (intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
>> - hsw_disable_ips(intel_crtc);
>> + hsw_disable_ips(intel_crtc, intel_crtc_state);
> I would suggest simplifying more and passing only the state.
> The callee can always dig out the crtc if it needs it.
>
>> reenable_ips = true;
>> }
>>
>> @@ -380,7 +380,7 @@ static void haswell_load_luts(struct drm_crtc_state *crtc_state)
>> i9xx_load_luts(crtc_state);
>>
>> if (reenable_ips)
>> - hsw_enable_ips(intel_crtc);
>> + hsw_enable_ips(intel_crtc, intel_crtc_state);
>> }
>>
>> static void bdw_load_degamma_lut(struct drm_crtc_state *state)
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index f5933b0719c9..13b372e4f06e 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -4832,12 +4832,12 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
>> }
>> }
>>
>> -void hsw_enable_ips(struct intel_crtc *crtc)
>> +void hsw_enable_ips(struct intel_crtc *crtc, const struct intel_crtc_state *crtc_state)
>> {
>> struct drm_device *dev = crtc->base.dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>>
>> - if (!crtc->config->ips_enabled)
>> + if (!crtc_state->ips_enabled)
>> return;
>>
>> /*
>> @@ -4871,12 +4871,12 @@ void hsw_enable_ips(struct intel_crtc *crtc)
>> }
>> }
>>
>> -void hsw_disable_ips(struct intel_crtc *crtc)
>> +void hsw_disable_ips(struct intel_crtc *crtc, const struct intel_crtc_state *crtc_state)
>> {
>> struct drm_device *dev = crtc->base.dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>>
>> - if (!crtc->config->ips_enabled)
>> + if (!crtc_state->ips_enabled)
>> return;
>>
>> assert_plane_enabled(dev_priv, crtc->plane);
> Hmm. Confusied. Oh right, my plane assert cleanup didn't manage to go in yet :P
>
>> @@ -4924,7 +4924,8 @@ static void intel_crtc_dpms_overlay_disable(struct intel_crtc *intel_crtc)
>> * completely hide the primary plane.
>> */
>> static void
>> -intel_post_enable_primary(struct drm_crtc *crtc)
>> +intel_post_enable_primary(struct drm_crtc *crtc,
>> + const struct intel_crtc_state *new_crtc_state)
>> {
>> struct drm_device *dev = crtc->dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>> @@ -4937,7 +4938,7 @@ intel_post_enable_primary(struct drm_crtc *crtc)
>> * when going from primary only to sprite only and vice
>> * versa.
>> */
>> - hsw_enable_ips(intel_crtc);
>> + hsw_enable_ips(intel_crtc, new_crtc_state);
>>
>> /*
>> * Gen2 reports pipe underruns whenever all planes are disabled.
>> @@ -4956,7 +4957,8 @@ intel_post_enable_primary(struct drm_crtc *crtc)
>>
>> /* FIXME move all this to pre_plane_update() with proper state tracking */
>> static void
>> -intel_pre_disable_primary(struct drm_crtc *crtc)
>> +intel_pre_disable_primary(struct drm_crtc *crtc,
>> + const struct intel_crtc_state *old_crtc_state)
>> {
>> struct drm_device *dev = crtc->dev;
>> struct drm_i915_private *dev_priv = to_i915(dev);
>> @@ -4978,7 +4980,7 @@ intel_pre_disable_primary(struct drm_crtc *crtc)
>> * when going from primary only to sprite only and vice
>> * versa.
>> */
>> - hsw_disable_ips(intel_crtc);
>> + hsw_disable_ips(intel_crtc, old_crtc_state);
>> }
>>
>> /* FIXME get rid of this and use pre_plane_update */
>> @@ -4990,7 +4992,7 @@ intel_pre_disable_primary_noatomic(struct drm_crtc *crtc)
>> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>> int pipe = intel_crtc->pipe;
>>
>> - intel_pre_disable_primary(crtc);
>> + intel_pre_disable_primary(crtc, to_intel_crtc_state(crtc->state));
>>
>> /*
>> * Vblank time updates from the shadow to live plane control register
>> @@ -5034,7 +5036,7 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
>> if (primary_state->base.visible &&
>> (needs_modeset(&pipe_config->base) ||
>> !old_primary_state->base.visible))
>> - intel_post_enable_primary(&crtc->base);
>> + intel_post_enable_primary(&crtc->base, pipe_config);
>> }
>> }
>>
>> @@ -5063,7 +5065,7 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state,
>>
>> if (old_primary_state->base.visible &&
>> (modeset || !primary_state->base.visible))
>> - intel_pre_disable_primary(&crtc->base);
>> + intel_pre_disable_primary(&crtc->base, old_crtc_state);
>> }
>>
>> /*
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index cddd96b24878..82c33d9cd466 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -3947,7 +3947,7 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
>> }
>>
>> out:
>> - hsw_enable_ips(intel_crtc);
>> + hsw_enable_ips(intel_crtc, to_intel_crtc_state(intel_crtc->base.state));
> crtc->config would seem like the slightly more correct thing to pass
> here. It's also easier to grep for when someone sets out to fix this
> mess properly.
Considered it, but our crtc->config usage is a mess. I'd rather get rid of the intel_dp_sink_crc code tbh. :/
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next prev parent reply other threads:[~2017-11-09 17:31 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-09 16:24 [PATCH v2 1/6] drm/i915: Update watermark state correctly in sanitize_watermarks Maarten Lankhorst
2017-11-09 16:24 ` [PATCH v2 2/6] drm/i915: Handle adjust better in intel_pipe_config_compare Maarten Lankhorst
2017-11-09 17:04 ` Ville Syrjälä
2017-11-09 16:24 ` [PATCH v2 3/6] drm/i915: Pass crtc_state to ips toggle functions Maarten Lankhorst
2017-11-09 17:09 ` Ville Syrjälä
2017-11-09 17:31 ` Maarten Lankhorst [this message]
2017-11-09 17:51 ` Ville Syrjälä
2017-11-09 17:56 ` Maarten Lankhorst
2017-11-09 18:17 ` Ville Syrjälä
2017-11-09 16:24 ` [PATCH v2 4/6] drm/i915: Handle ips_enabled in fastset Maarten Lankhorst
2017-11-09 17:17 ` Ville Syrjälä
2017-11-09 16:24 ` [PATCH v2 5/6] drm/i915: Enable FIFO underrun reporting after initial fastset, v2 Maarten Lankhorst
2017-11-09 17:15 ` Ville Syrjälä
2017-11-10 8:02 ` Maarten Lankhorst
2017-11-10 10:40 ` Ville Syrjälä
2017-11-09 16:24 ` [PATCH v2 6/6] drm/i915: Re-enable fastboot by default Maarten Lankhorst
2017-11-09 16:45 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915: Update watermark state correctly in sanitize_watermarks Patchwork
2017-11-09 17:28 ` ✓ Fi.CI.IGT: " Patchwork
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