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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: "Chris Wilson" <chris@chris-wilson.co.uk>,
	"Michał Winiarski" <michal.winiarski@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/10] drm/i915/guc: Precompute GuC shared data offset
Date: Thu, 5 Oct 2017 10:02:39 -0700	[thread overview]
Message-ID: <d54d8ea3-85a7-c1de-3bf7-837ef97e38d7@intel.com> (raw)
In-Reply-To: <150719598748.27301.14666101604501438466@mail.alporthouse.com>



On 05/10/17 02:33, Chris Wilson wrote:
> Quoting Michał Winiarski (2017-10-05 10:13:40)
>> We're using first page of kernel context state to share data with GuC,
>> let's precompute the ggtt offset at GuC initialization time rather than
>> everytime we're using GuC actions.
> 
> So LRC_GUCSHR_PN is still 0. Plans for that to change?
> 

This is a requirement from the GuC side. GuC expects each context to 
have that extra page before the PPHWSP and it uses it to dump some 
per-lrc info, part of which is for internal use and part is info for the 
host (although we don't need/use it).
On certain events (reset/preempt/suspend etc) GuC will dump extra info 
and this is done in the page provided in the H2G. I think we use the one 
of the default ctx just for simplicity, but it should be possible to use 
a different one, possibly not attached to any lrc if needed, but I'm not 
sure if this has ever been tested.

-Daniele

> Atm, we should be changing one pointer deref for another...
> -Chris
>>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
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  reply	other threads:[~2017-10-05 17:02 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-05  9:13 [PATCH 01/10] drm/i915/guc: Precompute GuC shared data offset Michał Winiarski
2017-10-05  9:13 ` [PATCH 02/10] drm/i915/guc: Initialize GuC before restarting engines Michał Winiarski
2017-10-05  9:36   ` Chris Wilson
2017-10-05 11:55     ` Michał Winiarski
2017-10-05  9:13 ` [PATCH 03/10] drm/i915/guc: Add preemption action to GuC firmware interface Michał Winiarski
2017-10-05 14:25   ` Jeff McGee
2017-10-05  9:13 ` [PATCH 04/10] drm/i915/guc: Add a second client, to be used for preemption Michał Winiarski
2017-10-05  9:39   ` Chris Wilson
2017-10-05 13:59   ` Michal Wajdeczko
2017-10-05 14:58   ` Jeff McGee
2017-10-05 15:22   ` Daniele Ceraolo Spurio
2017-10-05 16:00     ` Michał Winiarski
2017-10-05 16:35       ` Daniele Ceraolo Spurio
2017-10-05 18:20         ` Michał Winiarski
2017-10-05  9:13 ` [PATCH 05/10] drm/i915/guc: Split guc_wq_item_append Michał Winiarski
2017-10-05  9:45   ` Chris Wilson
2017-10-05 20:37   ` Jeff McGee
2017-10-05  9:20 ` [PATCH 06/10] drm/i915: Extract "emit write" part of emit breadcrumb functions Michał Winiarski
2017-10-05  9:20   ` [PATCH 07/10] drm/i915: Add information needed to track engine preempt state Michał Winiarski
2017-10-05  9:49     ` Chris Wilson
2017-10-05 20:42     ` Jeff McGee
2017-10-05  9:20   ` [PATCH 08/10] drm/i915/guc: Keep request->priority for its lifetime Michał Winiarski
2017-10-05  9:50     ` Chris Wilson
2017-10-05  9:20   ` [PATCH 09/10] drm/i915/guc: Preemption! With GuC Michał Winiarski
2017-10-05 10:04     ` Chris Wilson
2017-10-05 10:31     ` Chris Wilson
2017-10-05 18:38       ` Michał Winiarski
2017-10-05 15:00     ` Michal Wajdeczko
2017-10-05 15:42       ` Michał Winiarski
2017-10-05  9:20   ` [PATCH 10/10] HAX Enable GuC Submission for CI Michał Winiarski
2017-10-05  9:47   ` [PATCH 06/10] drm/i915: Extract "emit write" part of emit breadcrumb functions Chris Wilson
2017-10-05  9:33 ` [PATCH 01/10] drm/i915/guc: Precompute GuC shared data offset Chris Wilson
2017-10-05 17:02   ` Daniele Ceraolo Spurio [this message]
2017-10-06 12:35     ` Michał Winiarski
2017-10-06 16:24       ` Daniele Ceraolo Spurio
2017-10-05 11:30 ` Michal Wajdeczko
2017-10-26 21:22 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] " Patchwork

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