From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Sharma, Shashank" Subject: Re: [PATCH] drm/i915: Prune 2560x2880 mode for 5K tiled dual DP monitors Date: Tue, 27 Aug 2019 13:09:23 +0530 Message-ID: References: <1566887370-21780-1-git-send-email-ankit.k.nautiyal@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1960956465==" Return-path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id D619889895 for ; Tue, 27 Aug 2019 07:39:26 +0000 (UTC) In-Reply-To: <1566887370-21780-1-git-send-email-ankit.k.nautiyal@intel.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "Nautiyal, Ankit K" , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org This is a multi-part message in MIME format. --===============1960956465== Content-Type: multipart/alternative; boundary="------------D5B501BFE904DB427F1D8C0E" Content-Language: en-US This is a multi-part message in MIME format. --------------D5B501BFE904DB427F1D8C0E Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Hello Ankit, On 8/27/2019 11:59 AM, Nautiyal, Ankit K wrote: > From: Ankit Nautiyal > > Currently, the transcoder port sync feature is not available, due to > which the 5K-tiled dual DP monitors experience corruption when > 2560x2880 mode is applied for both of the tiled DP connectors. > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97244 > > There is a patch series to enable transcode port sync feature for > tiled display for ICL+, which is under review: > https://patchwork.kernel.org/project/intel-gfx/list/?series=137339 > > For the older platforms, we need to remove the 2560x2880 mode to avoid > a possibility of userspace choosing 2560x2880 mode for both tiled > displays, resulting in corruption. > > This patch prunes 2560x2880 mode for one of the tiled DP connector. > Since both the tiled DP connectors have different tile_h_loc and > tile_v_loc, the tiled connector with tile_h_loc and tile_v_loc as '0', > is chosen, for which the given resolution is removed. > > Signed-off-by: Ankit Nautiyal > CC: Manasi Navare > --- > drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 5c45a3b..aa43a3b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -564,6 +564,17 @@ intel_dp_mode_valid(struct drm_connector *connector, > if (mode->flags & DRM_MODE_FLAG_DBLCLK) > return MODE_H_ILLEGAL; > > + /* > + * For 5K tiled dual DP monitors, dual-DP sync is not yet supported. > + * This results in display sync issues, when both tiled connectors run > + * on 2560x2880 resolution. Therefore prune the 2560x2880 mode on one > + * of the tiled connector, to avoid such a case. > + */ > + if (connector->has_tile && > + (connector->tile_h_loc == 0 && connector->tile_v_loc == 0) && > + (mode->hdisplay == 2560 && mode->vdisplay == 2880)) Shouldn't this be for >= 2560/2880 than == ? Also, do we want (mode->hdisplay >= 2560 *||* mode->vdisplay >= 2880 ) - Shashank > + return MODE_PANEL; > + > return MODE_OK; > } > --------------D5B501BFE904DB427F1D8C0E Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 7bit

Hello Ankit,

On 8/27/2019 11:59 AM, Nautiyal, Ankit K wrote:
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Currently, the transcoder port sync feature is not available, due to
which the 5K-tiled dual DP monitors experience corruption when
2560x2880 mode is applied for both of the tiled DP connectors.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97244

There is a patch series to enable transcode port sync feature for
tiled display for ICL+, which is under review:
https://patchwork.kernel.org/project/intel-gfx/list/?series=137339

For the older platforms, we need to remove the 2560x2880 mode to avoid
a possibility of userspace choosing 2560x2880 mode for both tiled
displays, resulting in corruption.

This patch prunes 2560x2880 mode for one of the tiled DP connector.
Since both the tiled DP connectors have different tile_h_loc and
tile_v_loc, the tiled connector with tile_h_loc and tile_v_loc as '0',
is chosen, for which the given resolution is removed.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
CC: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 5c45a3b..aa43a3b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -564,6 +564,17 @@ intel_dp_mode_valid(struct drm_connector *connector,
 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 		return MODE_H_ILLEGAL;
 
+	/*
+	 * For 5K tiled dual DP monitors, dual-DP sync is not yet supported.
+	 * This results in display sync issues, when both tiled connectors run
+	 * on 2560x2880 resolution. Therefore prune the 2560x2880 mode on one
+	 * of the tiled connector, to avoid such a case.
+	 */
+	if (connector->has_tile &&
+	    (connector->tile_h_loc == 0 && connector->tile_v_loc == 0) &&
+	    (mode->hdisplay == 2560 && mode->vdisplay == 2880))

Shouldn't this be for >= 2560/2880 than == ? Also, do we want (mode->hdisplay >= 2560 || mode->vdisplay >= 2880 )

- Shashank

+		return MODE_PANEL;
+
 	return MODE_OK;
 }
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