* [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb
@ 2014-11-14 8:25 Daniel Vetter
2014-11-14 11:13 ` [Intel-gfx] " Ville Syrjälä
2014-11-14 14:25 ` shuang.he
0 siblings, 2 replies; 5+ messages in thread
From: Daniel Vetter @ 2014-11-14 8:25 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter, stable, Daniel Vetter
This reverts
commit 8d85d27281095e4df6eb97ae84326b5814337337
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue Feb 4 21:59:15 2014 +0200
drm/i915: Fix SNB GT_MODE register setup
Reported-by: Leo Wolf <jclw@ymail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79996
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9e87265f2448..03417a38cd09 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6472,11 +6472,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
I915_WRITE(_3D_CHICKEN,
_MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
- /* WaSetupGtModeTdRowDispatch:snb */
- if (IS_SNB_GT1(dev))
- I915_WRITE(GEN6_GT_MODE,
- _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
-
/* WaDisable_RenderCache_OperationalFlush:snb */
I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
--
2.1.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [Intel-gfx] [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb
2014-11-14 8:25 [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb Daniel Vetter
@ 2014-11-14 11:13 ` Ville Syrjälä
2014-11-14 11:21 ` Ville Syrjälä
2014-11-14 11:27 ` Jani Nikula
2014-11-14 14:25 ` shuang.he
1 sibling, 2 replies; 5+ messages in thread
From: Ville Syrjälä @ 2014-11-14 11:13 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development, stable, Daniel Vetter
On Fri, Nov 14, 2014 at 09:25:29AM +0100, Daniel Vetter wrote:
> This reverts
>
> commit 8d85d27281095e4df6eb97ae84326b5814337337
> Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Date: Tue Feb 4 21:59:15 2014 +0200
>
> drm/i915: Fix SNB GT_MODE register setup
I think you mean
commit 6547fbdbfff62c99e4f7b4f985ff8b3454f33b0f
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Dec 14 23:38:29 2012 +0100
drm/i915: Implement WaSetupGtModeTdRowDispatch
>
> Reported-by: Leo Wolf <jclw@ymail.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79996
> Cc: stable@vger.kernel.org
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9e87265f2448..03417a38cd09 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6472,11 +6472,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> I915_WRITE(_3D_CHICKEN,
> _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
>
> - /* WaSetupGtModeTdRowDispatch:snb */
> - if (IS_SNB_GT1(dev))
> - I915_WRITE(GEN6_GT_MODE,
> - _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
> -
> /* WaDisable_RenderCache_OperationalFlush:snb */
> I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
>
> --
> 2.1.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb
2014-11-14 11:13 ` [Intel-gfx] " Ville Syrjälä
@ 2014-11-14 11:21 ` Ville Syrjälä
2014-11-14 11:27 ` Jani Nikula
1 sibling, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2014-11-14 11:21 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Daniel Vetter, Intel Graphics Development, stable
On Fri, Nov 14, 2014 at 01:13:16PM +0200, Ville Syrjälä wrote:
> On Fri, Nov 14, 2014 at 09:25:29AM +0100, Daniel Vetter wrote:
> > This reverts
> >
> > commit 8d85d27281095e4df6eb97ae84326b5814337337
> > Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Date: Tue Feb 4 21:59:15 2014 +0200
> >
> > drm/i915: Fix SNB GT_MODE register setup
>
> I think you mean
>
> commit 6547fbdbfff62c99e4f7b4f985ff8b3454f33b0f
> Author: Daniel Vetter <daniel.vetter@ffwll.ch>
> Date: Fri Dec 14 23:38:29 2012 +0100
>
> drm/i915: Implement WaSetupGtModeTdRowDispatch
Oh, I guess functionally it reverts part of my patch since your original
patch was a nop due to the clear all bits part done later. Would be nice
to explain some of this in the commit message to avoid all sorts of
confusion.
>
> >
> > Reported-by: Leo Wolf <jclw@ymail.com>
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79996
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 5 -----
> > 1 file changed, 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 9e87265f2448..03417a38cd09 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -6472,11 +6472,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
> > I915_WRITE(_3D_CHICKEN,
> > _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
> >
> > - /* WaSetupGtModeTdRowDispatch:snb */
> > - if (IS_SNB_GT1(dev))
> > - I915_WRITE(GEN6_GT_MODE,
> > - _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
> > -
> > /* WaDisable_RenderCache_OperationalFlush:snb */
> > I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
> >
> > --
> > 2.1.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb
2014-11-14 11:13 ` [Intel-gfx] " Ville Syrjälä
2014-11-14 11:21 ` Ville Syrjälä
@ 2014-11-14 11:27 ` Jani Nikula
1 sibling, 0 replies; 5+ messages in thread
From: Jani Nikula @ 2014-11-14 11:27 UTC (permalink / raw)
To: Ville Syrjälä, Daniel Vetter
Cc: Daniel Vetter, Intel Graphics Development, stable
On Fri, 14 Nov 2014, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Nov 14, 2014 at 09:25:29AM +0100, Daniel Vetter wrote:
>> This reverts
>>
>> commit 8d85d27281095e4df6eb97ae84326b5814337337
>> Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Date: Tue Feb 4 21:59:15 2014 +0200
>>
>> drm/i915: Fix SNB GT_MODE register setup
>
> I think you mean
>
> commit 6547fbdbfff62c99e4f7b4f985ff8b3454f33b0f
> Author: Daniel Vetter <daniel.vetter@ffwll.ch>
> Date: Fri Dec 14 23:38:29 2012 +0100
>
> drm/i915: Implement WaSetupGtModeTdRowDispatch
Pushed to drm-intel-fixes with the reference fixed. Thanks for the
patch.
BR,
Jani.
>
>>
>> Reported-by: Leo Wolf <jclw@ymail.com>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79996
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_pm.c | 5 -----
>> 1 file changed, 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 9e87265f2448..03417a38cd09 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -6472,11 +6472,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
>> I915_WRITE(_3D_CHICKEN,
>> _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
>>
>> - /* WaSetupGtModeTdRowDispatch:snb */
>> - if (IS_SNB_GT1(dev))
>> - I915_WRITE(GEN6_GT_MODE,
>> - _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
>> -
>> /* WaDisable_RenderCache_OperationalFlush:snb */
>> I915_WRITE(CACHE_MODE_0, _MASKED_BIT_DISABLE(RC_OP_FLUSH_ENABLE));
>>
>> --
>> 2.1.1
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb
2014-11-14 8:25 [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb Daniel Vetter
2014-11-14 11:13 ` [Intel-gfx] " Ville Syrjälä
@ 2014-11-14 14:25 ` shuang.he
1 sibling, 0 replies; 5+ messages in thread
From: shuang.he @ 2014-11-14 14:25 UTC (permalink / raw)
To: shuang.he, intel-gfx, daniel.vetter
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform: baseline_drm_intel_nightly_pass_rate->patch_applied_pass_rate
BYT: pass/total=290/291->290/291
PNV: pass/total=351/356->351/356
ILK: pass/total=371/372->371/372
IVB: pass/total=545/546->545/546
SNB: pass/total=424/425->424/425
HSW: pass/total=579/579->579/579
BDW: pass/total=434/435->434/435
-------------------------------------Detailed-------------------------------------
test_platform: test_suite, test_case, result_with_drm_intel_nightly(count, machine_id...)...->result_with_patch_applied(count, machine_id)...
PNV: Intel_gpu_tools, igt_gen3_render_tiledx_blits, CRASH(2, M23)DMESG_WARN(1, M23)NRUN(1, M23) -> CRASH(1, M23)NRUN(3, M23)
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
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2014-11-14 8:25 [PATCH] drm/i915: WaSetupGtModeTdRowDispatch:snb Daniel Vetter
2014-11-14 11:13 ` [Intel-gfx] " Ville Syrjälä
2014-11-14 11:21 ` Ville Syrjälä
2014-11-14 11:27 ` Jani Nikula
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