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d="scan'208";a="225917737" Received: from ettammin-mobl2.ger.corp.intel.com (HELO localhost) ([10.245.246.3]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2026 04:56:53 -0800 From: Jani Nikula To: Dibin Moolakadan Subrahmanian , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: animesh.manna@intel.com, uma.shankar@intel.com, imre.deak@intel.com, jouni.hogander@intel.com Subject: Re: [PATCH 8/9] drm/i915/display: Add intel_dc3co_can_enable() helper In-Reply-To: <20251209113332.2770263-9-dibin.moolakadan.subrahmanian@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20251209113332.2770263-1-dibin.moolakadan.subrahmanian@intel.com> <20251209113332.2770263-9-dibin.moolakadan.subrahmanian@intel.com> Date: Mon, 05 Jan 2026 14:56:50 +0200 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 09 Dec 2025, Dibin Moolakadan Subrahmanian wrote: > Introduce a new helper that validates whether DC3CO can be enabled > based on both allow and source. > > Signed-off-by: Dibin Moolakadan Subrahmanian > --- > drivers/gpu/drm/i915/display/intel_display.c | 11 ++++++++++- > drivers/gpu/drm/i915/display/intel_display.h | 1 + > drivers/gpu/drm/i915/display/intel_psr.c | 2 +- > 3 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index b14a1c9f80bd..9f9ba58371ab 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -6295,6 +6295,15 @@ static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) > return 0; > } > > +bool intel_dc3co_can_enable(struct intel_display *display) > +{ > + /* > + * ToDo - Check CMTG enabled > + * ToDo - Check flipq enabled > + */ > + return (display->power.dc3co_allow && display->power.dc3co_source); > +} > + This doesn't belong in intel_display.[ch]. > bool intel_dc3co_allowed(struct intel_display *display) > { > return display->power.dc3co_allow; > @@ -7683,7 +7692,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) > */ > intel_uncore_arm_unclaimed_mmio_detection(&dev_priv->uncore); > } > - if (intel_dc3co_allowed(display)) > + if (intel_dc3co_can_enable(display)) > intel_display_power_set_target_dc_state(display, DC_STATE_EN_UPTO_DC3CO); > else > intel_display_power_set_target_dc_state(display, DC_STATE_EN_UPTO_DC6); > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index 87bbf1f66209..f704cce4f1d8 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -564,4 +564,5 @@ int intel_crtc_num_joined_pipes(const struct intel_crtc_state *crtc_state); > bool intel_dc3co_allowed(struct intel_display *display); > void intel_dc3co_source_set(struct intel_display *display, enum intel_dc3co_source source); > void intel_dc3co_source_unset(struct intel_display *display, enum intel_dc3co_source source); > +bool intel_dc3co_can_enable(struct intel_display *display); > #endif > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index d4c5dc6dcc82..18bf45455ea2 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -3909,7 +3909,7 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display, > return; > } > > - if (intel_dc3co_allowed(display)) > + if (intel_dc3co_can_enable(display)) > intel_display_power_set_target_dc_state(display, enable ? DC_STATE_DISABLE : > DC_STATE_EN_UPTO_DC3CO); > else -- Jani Nikula, Intel