Re: [Intel-gfx] [PATCH 09/15] drm/i915/guc/slpc: Add get max/min freq hooks

Belgaumkar, Vinay
2021-07-27T23:11:07Z

On 7/27/2021 8:32 AM, Michal Wajdeczko wrote:
>
>
> On 26.07.2021 21:07, Vinay Belgaumkar wrote:
>> Add helpers to read the min/max frequency being used
>> by SLPC. This is done by send a H2G command which forces
>> SLPC to update the shared data struct which can then be
>> read. These helpers will be used in a sysfs patch later
>> on.
>>
>> v2: Address review comments (Michal W)
>> v3: Return err in case of query failure (Michal W)
>>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 54 +++++++++++++++++++++
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 2 +
>> 2 files changed, 56 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> index 63656640189c..c653bba3b5eb 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
>> @@ -306,6 +306,33 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
>> return ret;
>> }
>>
>> +/**
>> + * intel_guc_slpc_get_max_freq() - Get max frequency limit for SLPC.
>> + * @slpc: pointer to intel_guc_slpc.
>> + * @val: pointer to val which will hold max frequency (MHz)
>> + *
>> + * This function will invoke GuC SLPC action to read the max frequency
>> + * limit for unslice.
>> + *
>> + * Return: 0 on success, non-zero error code on failure.
>> + */
>> +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val)
>> +{
>> + struct drm_i915_private *i915 = slpc_to_i915(slpc);
>> + intel_wakeref_t wakeref;
>> + int ret = 0;
>> +
>> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>> + /* Force GuC to update task data */
>> + ret = slpc_query_task_state(slpc);
>> +
>> + if (!ret)
>> + *val = slpc_decode_max_freq(slpc);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> /**
>> * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC.
>> * @slpc: pointer to intel_guc_slpc.
>> @@ -338,6 +365,33 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
>> return ret;
>> }
>>
>> +/**
>> + * intel_guc_slpc_get_min_freq() - Get min frequency limit for SLPC.
>> + * @slpc: pointer to intel_guc_slpc.
>> + * @val: pointer to val which will hold min frequency (MHz)
>> + *
>> + * This function will invoke GuC SLPC action to read the min frequency
>> + * limit for unslice.
>> + *
>> + * Return: 0 on success, non-zero error code on failure.
>> + */
>> +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val)
>> +{
>> + intel_wakeref_t wakeref;
>> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
>
> use slpc_to_i915() and in this order:
>
> struct drm_i915_private *i915 = slpc_to_i915(slpc);
> intel_wakeref_t wakeref;
> int ret = 0;
>
> with that fixed,
>
> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

done.
Thanks,
vinay.
>
>> + int ret = 0;
>> +
>> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
>> + /* Force GuC to update task data */
>> + ret = slpc_query_task_state(slpc);
>> +
>> + if (!ret)
>> + *val = slpc_decode_min_freq(slpc);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> /*
>> * intel_guc_slpc_enable() - Start SLPC
>> * @slpc: pointer to intel_guc_slpc.
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> index e594510497ec..92d7afd44f07 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
>> @@ -31,5 +31,7 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
>> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
>> int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
>> int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
>> +int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
>> +int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
>>
>> #endif
>>