* [PATCH 1/2] drm/i915: Do not turn off IPS twice.
@ 2015-08-26 8:55 Maarten Lankhorst
2015-08-26 8:55 ` [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled Maarten Lankhorst
0 siblings, 1 reply; 4+ messages in thread
From: Maarten Lankhorst @ 2015-08-26 8:55 UTC (permalink / raw)
To: intel-gfx
This is done through pre_disable_primary and hsw_disable_ips.
They're both set on the same conditions, so leave the check of
disable_ips in pre_disable_primary.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 16 +---------------
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af0bcfee4771..b01e89487784 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4790,9 +4790,6 @@ static void intel_pre_plane_update(struct intel_crtc *crtc)
if (atomic->disable_fbc)
intel_fbc_disable_crtc(crtc);
- if (crtc->atomic.disable_ips)
- hsw_disable_ips(crtc);
-
if (atomic->pre_disable_primary)
intel_pre_disable_primary(&crtc->base);
@@ -11726,19 +11723,8 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
intel_crtc->atomic.pre_disable_primary = turn_off;
intel_crtc->atomic.post_enable_primary = turn_on;
- if (turn_off) {
- /*
- * FIXME: Actually if we will still have any other
- * plane enabled on the pipe we could let IPS enabled
- * still, but for now lets consider that when we make
- * primary invisible by setting DSPCNTR to 0 on
- * update_primary_plane function IPS needs to be
- * disable.
- */
- intel_crtc->atomic.disable_ips = true;
-
+ if (turn_off)
intel_crtc->atomic.disable_fbc = true;
- }
/*
* FBC does not work on some platforms for rotated
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3b00d00c0bc0..379485f744ef 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -493,7 +493,6 @@ struct intel_crtc_atomic_commit {
/* Sleepable operations to perform before commit */
bool wait_for_flips;
bool disable_fbc;
- bool disable_ips;
bool disable_cxsr;
bool pre_disable_primary;
bool update_wm_pre, update_wm_post;
--
2.1.0
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled.
2015-08-26 8:55 [PATCH 1/2] drm/i915: Do not turn off IPS twice Maarten Lankhorst
@ 2015-08-26 8:55 ` Maarten Lankhorst
2015-08-30 14:26 ` shuang.he
2015-10-13 12:42 ` Jani Nikula
0 siblings, 2 replies; 4+ messages in thread
From: Maarten Lankhorst @ 2015-08-26 8:55 UTC (permalink / raw)
To: intel-gfx
This fixes kms_universal_plane.universal-plane-pipe-A-functional.
IPS gets enabled even though the primary plane is disabled. This is
not supported, and results in warnings like below:
------------[ cut here ]------------
WARNING: CPU: 0 PID: 1707 at drivers/gpu/drm/i915/intel_display.c:1354
assert_plane.constprop.66+0x70/0xa0 [i915]()
plane A assertion failure (expected on, current off)
Modules linked in: i915
CPU: 0 PID: 1707 Comm: kms_universal_p Tainted: G W
4.2.0-rc2-patser+ #4288
Hardware name: NUC5i7RYB,
BIOS RYBDWi35.86A.0246.2015.0309.1355 03/09/2015
ffffffffc01d3278 ffff8800ccc37c88 ffffffff816f6e74 0000000080000000
ffff8800ccc37cd8 ffff8800ccc37cc8 ffffffff8107bfe1 ffff8800ccc37ca8
0000000000000000 ffff880117aa4520 ffff8800d7435388 ffff8800d5170000
Call Trace:
[<ffffffff816f6e74>] dump_stack+0x4f/0x7b
[<ffffffff8107bfe1>] warn_slowpath_common+0x81/0xc0
[<ffffffff8107c061>] warn_slowpath_fmt+0x41/0x50
[<ffffffffc016a270>] assert_plane.constprop.66+0x70/0xa0 [i915]
[<ffffffffc0173510>] hsw_enable_ips+0x50/0x150 [i915]
[<ffffffffc0128a63>] display_crc_ctl_write+0x623/0xbf0 [i915]
[<ffffffff81192153>] __vfs_write+0x23/0xe0
[<ffffffff81195334>] ? __sb_start_write+0x44/0xf0
[<ffffffff81277718>] ? security_file_permission+0x38/0xc0
[<ffffffff81192b34>] vfs_write+0xa4/0x190
[<ffffffff810d73de>] ? do_setitimer+0x12e/0x220
[<ffffffff81193741>] SyS_write+0x41/0xa0
[<ffffffff816fdad7>] entry_SYSCALL_64_fastpath+0x12/0x6a
---[ end trace 264b7f8804a754c3 ]---
This can be fixed easily by checking primary->visible.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index caf1382116de..9abf70cb3525 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3799,7 +3799,13 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
* user space can't make reliable use of the CRCs, so let's just
* completely disable it.
*/
- hsw_disable_ips(crtc);
+
+ if (HAS_IPS(dev) && pipe == PIPE_A) {
+ drm_modeset_lock(&crtc->base.primary->mutex, NULL);
+ if (to_intel_plane_state(crtc->base.primary->state)->visible)
+ hsw_disable_ips(crtc);
+ drm_modeset_unlock(&crtc->base.primary->mutex);
+ }
spin_lock_irq(&pipe_crc->lock);
kfree(pipe_crc->entries);
@@ -3843,8 +3849,12 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
vlv_undo_pipe_scramble_reset(dev, pipe);
else if (IS_HASWELL(dev) && pipe == PIPE_A)
hsw_undo_trans_edp_pipe_A_crc_wa(dev);
-
- hsw_enable_ips(crtc);
+ else if (HAS_IPS(dev) && pipe == PIPE_A) {
+ drm_modeset_lock(&crtc->base.primary->mutex, NULL);
+ if (to_intel_plane_state(crtc->base.primary->state)->visible)
+ hsw_enable_ips(crtc);
+ drm_modeset_unlock(&crtc->base.primary->mutex);
+ }
}
return 0;
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled.
2015-08-26 8:55 ` [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled Maarten Lankhorst
@ 2015-08-30 14:26 ` shuang.he
2015-10-13 12:42 ` Jani Nikula
1 sibling, 0 replies; 4+ messages in thread
From: shuang.he @ 2015-08-30 14:26 UTC (permalink / raw)
To: shuang.he, julianx.dumez, christophe.sureau, lei.a.liu, intel-gfx,
maarten.lankhorst
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 7260
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 302/302 302/302
SNB 315/315 315/315
IVB 336/336 336/336
BYT 283/283 283/283
HSW 378/378 378/378
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled.
2015-08-26 8:55 ` [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled Maarten Lankhorst
2015-08-30 14:26 ` shuang.he
@ 2015-10-13 12:42 ` Jani Nikula
1 sibling, 0 replies; 4+ messages in thread
From: Jani Nikula @ 2015-10-13 12:42 UTC (permalink / raw)
To: Maarten Lankhorst, intel-gfx
On Wed, 26 Aug 2015, Maarten Lankhorst <maarten.lankhorst@linux.intel.com> wrote:
> This fixes kms_universal_plane.universal-plane-pipe-A-functional.
>
> IPS gets enabled even though the primary plane is disabled. This is
> not supported, and results in warnings like below:
>
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 1707 at drivers/gpu/drm/i915/intel_display.c:1354
> assert_plane.constprop.66+0x70/0xa0 [i915]()
> plane A assertion failure (expected on, current off)
> Modules linked in: i915
> CPU: 0 PID: 1707 Comm: kms_universal_p Tainted: G W
> 4.2.0-rc2-patser+ #4288
> Hardware name: NUC5i7RYB,
> BIOS RYBDWi35.86A.0246.2015.0309.1355 03/09/2015
> ffffffffc01d3278 ffff8800ccc37c88 ffffffff816f6e74 0000000080000000
> ffff8800ccc37cd8 ffff8800ccc37cc8 ffffffff8107bfe1 ffff8800ccc37ca8
> 0000000000000000 ffff880117aa4520 ffff8800d7435388 ffff8800d5170000
> Call Trace:
> [<ffffffff816f6e74>] dump_stack+0x4f/0x7b
> [<ffffffff8107bfe1>] warn_slowpath_common+0x81/0xc0
> [<ffffffff8107c061>] warn_slowpath_fmt+0x41/0x50
> [<ffffffffc016a270>] assert_plane.constprop.66+0x70/0xa0 [i915]
> [<ffffffffc0173510>] hsw_enable_ips+0x50/0x150 [i915]
> [<ffffffffc0128a63>] display_crc_ctl_write+0x623/0xbf0 [i915]
> [<ffffffff81192153>] __vfs_write+0x23/0xe0
> [<ffffffff81195334>] ? __sb_start_write+0x44/0xf0
> [<ffffffff81277718>] ? security_file_permission+0x38/0xc0
> [<ffffffff81192b34>] vfs_write+0xa4/0x190
> [<ffffffff810d73de>] ? do_setitimer+0x12e/0x220
> [<ffffffff81193741>] SyS_write+0x41/0xa0
> [<ffffffff816fdad7>] entry_SYSCALL_64_fastpath+0x12/0x6a
> ---[ end trace 264b7f8804a754c3 ]---
>
> This can be fixed easily by checking primary->visible.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Maarten, this series has no reviews and it no longer applies to v4.3
cleanly. Please rebase and repost if it's still valid.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index caf1382116de..9abf70cb3525 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3799,7 +3799,13 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
> * user space can't make reliable use of the CRCs, so let's just
> * completely disable it.
> */
> - hsw_disable_ips(crtc);
> +
> + if (HAS_IPS(dev) && pipe == PIPE_A) {
> + drm_modeset_lock(&crtc->base.primary->mutex, NULL);
> + if (to_intel_plane_state(crtc->base.primary->state)->visible)
> + hsw_disable_ips(crtc);
> + drm_modeset_unlock(&crtc->base.primary->mutex);
> + }
>
> spin_lock_irq(&pipe_crc->lock);
> kfree(pipe_crc->entries);
> @@ -3843,8 +3849,12 @@ static int pipe_crc_set_source(struct drm_device *dev, enum pipe pipe,
> vlv_undo_pipe_scramble_reset(dev, pipe);
> else if (IS_HASWELL(dev) && pipe == PIPE_A)
> hsw_undo_trans_edp_pipe_A_crc_wa(dev);
> -
> - hsw_enable_ips(crtc);
> + else if (HAS_IPS(dev) && pipe == PIPE_A) {
> + drm_modeset_lock(&crtc->base.primary->mutex, NULL);
> + if (to_intel_plane_state(crtc->base.primary->state)->visible)
> + hsw_enable_ips(crtc);
> + drm_modeset_unlock(&crtc->base.primary->mutex);
> + }
> }
>
> return 0;
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-10-13 12:39 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2015-08-26 8:55 [PATCH 1/2] drm/i915: Do not turn off IPS twice Maarten Lankhorst
2015-08-26 8:55 ` [PATCH 2/2] drm/i915: Do not enable IPS with the primary plane disabled Maarten Lankhorst
2015-08-30 14:26 ` shuang.he
2015-10-13 12:42 ` Jani Nikula
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