From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: "Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com>
Cc: "Intel-gfx@lists.freedesktop.org" <Intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 7/8] drm/i915/pmu: Wire up engine busy stats to PMU
Date: Wed, 27 Sep 2017 08:59:07 +0100 [thread overview]
Message-ID: <ebbe785d-af9d-252f-ddf1-905a82d335b6@linux.intel.com> (raw)
In-Reply-To: <1506422673.30928.11.camel@intel.com>
On 26/09/2017 19:46, Rogozhkin, Dmitry V wrote:
> On Tue, 2017-09-26 at 13:32 +0100, Tvrtko Ursulin wrote:
>> On 25/09/2017 18:48, Chris Wilson wrote:
>>> Quoting Tvrtko Ursulin (2017-09-25 16:15:42)
>>>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>
>>>> We can use engine busy stats instead of the MMIO sampling timer
>>>> for better efficiency.
>>>>
>>>> As minimum this saves period * num_engines / sec mmio reads,
>>>> and in a better case, when only engine busy samplers are active,
>>>> it enables us to not kick off the sampling timer at all.
>>>
>>> Or you could inspect port_isset(execlists.port).
>>> You can avoid the mmio for this case also by just using HWSP. It's just
>>> that I never enabled busy tracking in isolation, so I always ended up
>>> using the mmio.
>>
>> This would be for execlists only. I could change the main patch to do
>> this, you think it is worth it?
>
> You know, I wonder why we limit this by execlists? Is that because
I am not sure there wasn't a slight misunderstanding here. By "execlists
only" I simply meant the _optimisation_ of getting engine busyness via
port_isset instead of MMIO reads would be for execlists only (and guc).
So we'd have:
1. legacy - mmio sampling
2. execlists - software sampling in the first pmu batch, then precise
engine busyness in patches that follow
3. guc - like execlists in the first pmu patch, and the for precise
busyness perhaps we just use the same context_in/out approach
Regards,
Tvrtko
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next prev parent reply other threads:[~2017-09-27 7:59 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-25 15:15 [PATCH v5 0/8] i915 PMU and engine busy stats Tvrtko Ursulin
2017-09-25 15:15 ` [PATCH 1/8] drm/i915: Convert intel_rc6_residency_us to ns Tvrtko Ursulin
2017-09-25 17:08 ` Chris Wilson
2017-09-25 15:15 ` [PATCH 2/8] drm/i915: Extract intel_get_cagf Tvrtko Ursulin
2017-09-25 15:15 ` [PATCH 3/8] drm/i915/pmu: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-09-25 17:37 ` Chris Wilson
2017-09-26 12:28 ` Tvrtko Ursulin
2017-09-26 13:00 ` Chris Wilson
2017-09-26 13:14 ` Chris Wilson
2017-09-25 15:15 ` [PATCH 4/8] drm/i915/pmu: Suspend sampling when GPU is idle Tvrtko Ursulin
2017-09-25 17:39 ` Chris Wilson
2017-09-25 15:15 ` [PATCH 5/8] drm/i915: Wrap context schedule notification Tvrtko Ursulin
2017-09-25 17:40 ` Chris Wilson
2017-09-25 18:40 ` Chris Wilson
2017-09-25 15:15 ` [PATCH 6/8] drm/i915: Engine busy time tracking Tvrtko Ursulin
2017-09-25 17:43 ` Chris Wilson
2017-09-26 12:30 ` Tvrtko Ursulin
2017-09-25 15:15 ` [PATCH 7/8] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-09-25 17:48 ` Chris Wilson
2017-09-26 12:32 ` Tvrtko Ursulin
2017-09-26 18:46 ` Rogozhkin, Dmitry V
2017-09-26 20:01 ` Chris Wilson
2017-09-27 7:59 ` Tvrtko Ursulin [this message]
2017-09-26 20:05 ` Chris Wilson
2017-09-27 8:10 ` Tvrtko Ursulin
2017-09-25 15:15 ` [PATCH 8/8] drm/i915: Gate engine stats collection with a static key Tvrtko Ursulin
2017-09-25 17:56 ` Chris Wilson
2017-09-26 12:42 ` Tvrtko Ursulin
2017-09-25 15:46 ` ✓ Fi.CI.BAT: success for i915 PMU and engine busy stats (rev12) Patchwork
2017-09-25 21:22 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2017-09-18 11:38 [PATCH v4 00/8] i915 PMU and engine busy stats Tvrtko Ursulin
2017-09-18 11:38 ` [PATCH 7/8] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-09-18 14:58 ` Chris Wilson
2017-09-19 8:46 ` Tvrtko Ursulin
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