From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Souza, Jose" Subject: Re: [PATCH 1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks Date: Tue, 11 Dec 2018 12:29:15 +0000 Message-ID: References: <20181204230032.6352-1-jose.souza@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0410627658==" Return-path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4D8626E10B for ; Tue, 11 Dec 2018 12:29:18 +0000 (UTC) In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "intel-gfx@lists.freedesktop.org" , "Pandiyan, Dhinakaran" Cc: "Vivi, Rodrigo" List-Id: intel-gfx@lists.freedesktop.org --===============0410627658== Content-Language: en-US Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="=-0M1tkIkYuTRY5pzg+YjW" --=-0M1tkIkYuTRY5pzg+YjW Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2018-12-10 at 19:52 -0800, Dhinakaran Pandiyan wrote: > On Tue, 2018-12-04 at 15:00 -0800, Jos=C3=A9 Roberto de Souza wrote: > > For now PSR2 is still disabled by default for all platforms but is > > our intention to let debugfs to enable it for debug and tests > > proporses, so intel_psr2_enabled() that is also used by debugfs to > > decide if PSR2 is going to be enabled needs to take in > > consideration > > the debug field. > >=20 > > Cc: Dhinakaran Pandiyan > > Cc: Rodrigo Vivi > > Signed-off-by: Jos=C3=A9 Roberto de Souza > > --- > > drivers/gpu/drm/i915/intel_psr.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > > b/drivers/gpu/drm/i915/intel_psr.c > > index 4c4dd1c310ce..15a2121aa64f 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -71,8 +71,11 @@ static bool psr_global_enabled(u32 debug) > > static bool intel_psr2_enabled(struct drm_i915_private *dev_priv, > > const struct intel_crtc_state > > *crtc_state) > > { > > + const u32 debug_mode =3D dev_priv->psr.debug & > > I915_PSR_DEBUG_MODE_MASK; > > + > > /* Disable PSR2 by default for all platforms */ > > - if (i915_modparams.enable_psr =3D=3D -1) > > + if (i915_modparams.enable_psr =3D=3D -1 && > > + debug_mode !=3D I915_PSR_DEBUG_ENABLE) > > return false; >=20 > @@ -71,17 +71,17 @@ static bool psr_global_enabled(u32 debug) > static bool intel_psr2_enabled(struct drm_i915_private *dev_priv, > const struct intel_crtc_state > *crtc_state) > { > - /* Disable PSR2 by default for all platforms */ > - if (i915_modparams.enable_psr =3D=3D -1) > - return false; > - > /* Cannot enable DSC and PSR2 simultaneously */ > WARN_ON(crtc_state->dsc_params.compression_enable && > crtc_state->has_psr2); > =20 > switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) { > + case I915_PSR_DEBUG_DISABLE: > case I915_PSR_DEBUG_FORCE_PSR1: > return false; > + case I915_PSR_DEBUG_DEFAULT: > + if (i915_modparams.enable_psr <=3D 0) > + return false; > default: > return crtc_state->has_psr2; > } >=20 > Does this read any better? Keeping the condition checks together and > also having a consistent priority between debugfs and module > parameter > options is easier to follow IMHO. Yes, looks better. Changing to this. Thanks >=20 > > =20 > > /* Cannot enable DSC and PSR2 simultaneously */ --=-0M1tkIkYuTRY5pzg+YjW Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEVNG051EijGa0MiaQVenbO/mOWkkFAlwPrZUACgkQVenbO/mO WkkY+wf/WFV/xS/v1ja3xvU3kemqTPLVJLY96YB+Wysq+O3jbGRCIUKJuMXAkK5p oUu0gUG1Djo7gyItRY3+pFTbCdV1zt1waDPE0u2YCL6a5/MGcUO3W2iDk3pNGB9l LGdb/Q6Zwb97hMHmVUN15IRxHeAGYpQOzkVuNgU4jjirjN02xVFodUv36gMShOGD YMcltZBTsFX+MHfZO5LS4ijFIW1TujYeVIXft9nE0liOMrj1mmtIxRuSxfZFx+OI FGr3M4AW3QwU+HyC2g7AExkUZnxoWUZNKUyeFByjxbF07TE9+q3PbSZUPf5dCc/r OOsZ0vgfiGrdAvL4zYkTARUosT4Y9A== =NtsZ -----END PGP SIGNATURE----- --=-0M1tkIkYuTRY5pzg+YjW-- --===============0410627658== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============0410627658==--