From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Kamble, Sagar A" Subject: Re: [PATCH v4 23/26] drm/i915/slpc: Keep RP SW Mode enabled while disabling rps Date: Thu, 15 Sep 2016 16:14:11 +0530 Message-ID: References: <1473425505-3890-1-git-send-email-sagar.a.kamble@intel.com> <1473425505-3890-24-git-send-email-sagar.a.kamble@intel.com> <20160909165842.GJ20027@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 70F616E852 for ; Thu, 15 Sep 2016 10:44:14 +0000 (UTC) In-Reply-To: <20160909165842.GJ20027@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org CgpPbiA5LzkvMjAxNiAxMDoyOCBQTSwgQ2hyaXMgV2lsc29uIHdyb3RlOgo+IE9uIEZyaSwgU2Vw IDA5LCAyMDE2IGF0IDA2OjIxOjQyUE0gKzA1MzAsIFNhZ2FyIEFydW4gS2FtYmxlIHdyb3RlOgo+ PiBXaXRoIFNMUEMsIG9ubHkgUlAgU1cgTW9kZSBjb250cm9sIHNob3VsZCBiZSBsZWZ0IGVuYWJs ZWQgYnkgaTkxNS4KPj4gRWxzZSwgU0xQQyByZXF1ZXN0cyB0aHJvdWdoIHRocm91Z2ggUlBOU1dS RVEgd2lsbCBub3QgYmUgZ3JhbnRlZC4KPj4KPj4gU2lnbmVkLW9mZi1ieTogU2FnYXIgQXJ1biBL YW1ibGUgPHNhZ2FyLmEua2FtYmxlQGludGVsLmNvbT4KPj4gLS0tCj4+ICAgZHJpdmVycy9ncHUv ZHJtL2k5MTUvaW50ZWxfcG0uYyB8IDggKysrKysrKy0KPj4gICAxIGZpbGUgY2hhbmdlZCwgNyBp bnNlcnRpb25zKCspLCAxIGRlbGV0aW9uKC0pCj4+Cj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dw dS9kcm0vaTkxNS9pbnRlbF9wbS5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYwo+ PiBpbmRleCA3MGUwOGQ5Li5kMDZjOWJiIDEwMDY0NAo+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pbnRlbF9wbS5jCj4+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BtLmMK Pj4gQEAgLTUwNjQsNyArNTA2NCwxMyBAQCBzdGF0aWMgdm9pZCBnZW45X2Rpc2FibGVfcmM2KHN0 cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdikKPj4gICAKPj4gICBzdGF0aWMgdm9pZCBn ZW45X2Rpc2FibGVfcnBzKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdikKPj4gICB7 Cj4+IC0JSTkxNV9XUklURShHRU42X1JQX0NPTlRST0wsIDApOwo+PiArCXVpbnQzMl90IHJwX2N0 bCA9IDA7Cj4gdTMyIHJwX2N0bCA9IDA7Cj4KPj4gKwo+PiArCS8qIFJQIFNXIE1vZGUgQ29udHJv bCB3aWxsIGJlIG5lZWRlZCBmb3IgU0xQQywgSGVuY2Ugbm90IGNsZWFyaW5nLiovCj4gCS8qIFJQ IFNXIE1vZGUgQ29udHJvbCB3aWxsIGJlIG5lZWRlZCBmb3IgU0xQQywgc28ga2VlcCBpdCBlbmFi bGVkLiAqLwo+Cj4+ICsJaWYgKGk5MTUuZW5hYmxlX3NscGMpCj4gaW50ZWxfc2xwY19lbmFibGVk KCkgPyAoY29uc2lzdGVuY3khKQpXaWxsIHVwZGF0ZSB0aGlzLgo+Cj4+ICsJCXJwX2N0bCA9IEk5 MTVfUkVBRChHRU42X1JQX0NPTlRST0wpICYgR0VONl9SUF9NRURJQV9NT0RFX01BU0s7Cj4gT2ss IHNvIHRoaXMgaXMgbm90IGRvaW5nIHdoYXQgeW91IGRlc2NyaWJlLiBUaGlzIGlzIHByZXNlcnZp bmcgc3RhdGUsCj4geWVzLiBCdXQgaWYgd2Uga25vdyB0aGF0IHN0YXRlIGlzIG1lYW50IHRvIGJl IGVuYWJsZWQgZm9yIFNMUEMgd2h5IGFyZQo+IHdlIHJlYWRpbmcgaXQgYmFjay4KPgo+IEkgYW0g bGVmdCB3aXRoIHF1ZXN0aW9ucyBhYm91dCB3aGF0IGlzIGhhcHBlbmluZyBiZWhpbmQgb3VyIGJh Y2tzLCBhbmQKPiB3aGF0IHRoZSBjb2RlIGlzIHRyeWluZyB0byBoaWRlLgpXaWxsIGZpeCB0aGlz LiBTTFBDIGlzIGdvaW5nIHRvIHJlcXVlc3QgZnJlcXVlbmN5IGhlbmNlIHdlIG5lZWQgdG8gbWFr ZSAKc3VyZSBob3N0CmRvZXMgbm90IHRhbXBlciBSUF9DT05UUk9MIHNldHRpbmdzLgo+IC1DaHJp cwo+CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRl bC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6 Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK