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[2001:1c00:c0c:fe00:d2ea:f29d:118b:24dc]) by smtp.gmail.com with ESMTPSA id x11sm3852082ejv.81.2020.06.12.10.00.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Jun 2020 10:00:43 -0700 (PDT) To: =?UTF-8?Q?Uwe_Kleine-K=c3=b6nig?= References: <20200607181840.13536-1-hdegoede@redhat.com> <20200607181840.13536-12-hdegoede@redhat.com> <20200611213744.6gg2oy45cende6ba@taurus.defre.kleine-koenig.org> From: Hans de Goede Message-ID: Date: Fri, 12 Jun 2020 19:00:42 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: <20200611213744.6gg2oy45cende6ba@taurus.defre.kleine-koenig.org> Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Subject: Re: [Intel-gfx] [PATCH v2 11/15] pwm: crc: Implement get_state() method X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, intel-gfx , "Rafael J . Wysocki" , linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org, Andy Shevchenko , Mika Westerberg , Len Brown Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="windows-1252"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi, On 6/11/20 11:37 PM, Uwe Kleine-K=C3=B6nig wrote: > Hello, > = > On Sun, Jun 07, 2020 at 08:18:36PM +0200, Hans de Goede wrote: >> Implement the pwm_ops.get_state() method to complete the support for the >> new atomic PWM API. >> >> Signed-off-by: Hans de Goede >> --- >> drivers/pwm/pwm-crc.c | 29 +++++++++++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c >> index 58c7e9ef7278..6c75a3470bc8 100644 >> --- a/drivers/pwm/pwm-crc.c >> +++ b/drivers/pwm/pwm-crc.c >> @@ -114,8 +114,37 @@ static int crc_pwm_apply(struct pwm_chip *chip, str= uct pwm_device *pwm, >> return 0; >> } >> = >> +static void crc_pwm_get_state(struct pwm_chip *chip, struct pwm_device = *pwm, >> + struct pwm_state *state) >> +{ >> + struct crystalcove_pwm *crc_pwm =3D to_crc_pwm(chip); >> + struct device *dev =3D crc_pwm->chip.dev; >> + unsigned int clk_div, clk_div_reg, duty_cycle_reg; >> + int error; >> + >> + error =3D regmap_read(crc_pwm->regmap, PWM0_CLK_DIV, &clk_div_reg); >> + if (error) { >> + dev_err(dev, "Error reading PWM0_CLK_DIV %d\n", error); >> + return; >> + } >> + >> + error =3D regmap_read(crc_pwm->regmap, PWM0_DUTY_CYCLE, &duty_cycle_re= g); >> + if (error) { >> + dev_err(dev, "Error reading PWM0_DUTY_CYCLE %d\n", error); >> + return; >> + } > = > I assume that duty_cycle_reg cannot be bigger than 0xff? Would it make > sense to mask the value accordingly to get more robust code? > = >> + clk_div =3D (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1; >> + >> + state->period =3D clk_div * NSEC_PER_MHZ * 256 / PWM_BASE_CLK_MHZ; >> + state->duty_cycle =3D duty_cycle_reg * state->period / PWM_MAX_LEVEL; >> + state->polarity =3D PWM_POLARITY_NORMAL; >> + state->enabled =3D !!(clk_div_reg & PWM_OUTPUT_ENABLE); > = > These aligned =3D look strange (IMHO). If you don't feel strong here I'd > like to see a single space before a =3D. Ok, will change for the next version. Regards, Hans _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx