* [PATCH 0/2] Support for low voltage swing
@ 2015-02-25 4:59 Sonika Jindal
2015-02-25 4:59 ` [PATCH 1/2] drm/i915/skl: Support for edp low_vswing param in vbt Sonika Jindal
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Sonika Jindal @ 2015-02-25 4:59 UTC (permalink / raw)
To: intel-gfx
Skylake supports low voltage swing in edp 1.4. The translation table is selected
based upon the vbt entry for selecting low vswing
These patches are being pulled from -internal to -nightly.
Sonika Jindal (2):
drm/i915/skl: Support for edp low_vswing param in vbt
drm/i915/skl: Add support for edp1.4 low vswing
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_bios.c | 7 ++++++
drivers/gpu/drm/i915/intel_bios.h | 1 +
drivers/gpu/drm/i915/intel_ddi.c | 46 ++++++++++++++++++++++++++++++++-----
drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++--
5 files changed, 59 insertions(+), 8 deletions(-)
--
1.7.10.4
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] drm/i915/skl: Support for edp low_vswing param in vbt 2015-02-25 4:59 [PATCH 0/2] Support for low voltage swing Sonika Jindal @ 2015-02-25 4:59 ` Sonika Jindal 2015-02-25 4:59 ` [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing Sonika Jindal 2015-02-25 15:07 ` [PATCH 0/2] Support for low voltage swing Daniel Vetter 2 siblings, 0 replies; 6+ messages in thread From: Sonika Jindal @ 2015-02-25 4:59 UTC (permalink / raw) To: intel-gfx v2: Adding VBT version check for low_vswing field, and correcting parsing v3: (Damien) - Restrain the scope of the 'vswing' variable - Use the more idiomatic "ev_priv->vbt.edp_low_vswing = vswing == 0;" instead of if (foo) var = true; else var = false; - Shorten edp_vswing_premph_setting to edp_vswing_premph to fit in 80 chars - Add the version from which the edp_vswing_premph field is valid in the struct definition Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v2) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_bios.c | 7 +++++++ drivers/gpu/drm/i915/intel_bios.h | 1 + 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c9d2b00..cbe668a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1466,6 +1466,7 @@ struct intel_vbt_data { bool edp_initialized; bool edp_support; int edp_bpp; + bool edp_low_vswing; struct edp_power_seq edp_pps; struct { diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 3f17825..c684085 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -662,6 +662,13 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) edp_link_params->vswing); break; } + + if (bdb->version >= 173) { + uint8_t vswing; + + vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; + dev_priv->vbt.edp_low_vswing = vswing == 0; + } } static void diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index a6a8710..6afd5be 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -554,6 +554,7 @@ struct bdb_edp { /* ith bit indicates enabled/disabled for (i+1)th panel */ u16 edp_s3d_feature; u16 edp_t3_optimization; + u64 edp_vswing_preemph; /* v173 */ } __packed; struct psr_table { -- 1.7.10.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing 2015-02-25 4:59 [PATCH 0/2] Support for low voltage swing Sonika Jindal 2015-02-25 4:59 ` [PATCH 1/2] drm/i915/skl: Support for edp low_vswing param in vbt Sonika Jindal @ 2015-02-25 4:59 ` Sonika Jindal 2015-02-26 12:24 ` shuang.he 2015-02-25 15:07 ` [PATCH 0/2] Support for low voltage swing Daniel Vetter 2 siblings, 1 reply; 6+ messages in thread From: Sonika Jindal @ 2015-02-25 4:59 UTC (permalink / raw) To: intel-gfx Based upon vbt's vswing preemph settings value select the appropriate translations for edp. v2: Incorporating bspec changes for vswing and preemph levels, adding edp translation table. Removed HSW from selection 9 which is specific to skl and correcting the returning of level2 from max pre emph (Damien) v3: Rebasing on top of renaming patches. Adding level(3,0) since level(2,2) as mentioned in bspec is invalid as per edp spec. Also changed the determining of size of the table selected (Satheesh). v4: Adding level 3 in max voltage selection if low vswing is selected (Satheesh) v5: Add a comment stating that skl_ddi_translations_edp is for eDP 1.4 low vswing panels. v6: Updating recommended DDI translation table for edp 1.4 Reviewed-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v4) Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> (v6) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 46 +++++++++++++++++++++++++++++++++----- drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++-- 2 files changed, 50 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index f14e8a2..985d531 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -139,6 +139,21 @@ static const struct ddi_buf_trans skl_ddi_translations_dp[] = { { 0x00004014, 0x00000087 }, }; +/* eDP 1.4 low vswing translation parameters */ +static const struct ddi_buf_trans skl_ddi_translations_edp[] = { + { 0x00000018, 0x000000a8 }, + { 0x00002016, 0x000000ab }, + { 0x00006012, 0x000000a2 }, + { 0x00008010, 0x00000088 }, + { 0x00000018, 0x000000ab }, + { 0x00004014, 0x000000a2 }, + { 0x00006012, 0x000000a6 }, + { 0x00000018, 0x000000a2 }, + { 0x00005013, 0x0000009c }, + { 0x00000018, 0x00000088 }, +}; + + static const struct ddi_buf_trans skl_ddi_translations_hdmi[] = { /* Idx NT mV T mV db */ { 0x00000018, 0x000000a0 }, /* 0: 400 400 0 */ @@ -187,7 +202,8 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) { struct drm_i915_private *dev_priv = dev->dev_private; u32 reg; - int i, n_hdmi_entries, hdmi_800mV_0dB; + int i, n_hdmi_entries, n_dp_entries, n_edp_entries, hdmi_800mV_0dB, + size; int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift; const struct ddi_buf_trans *ddi_translations_fdi; const struct ddi_buf_trans *ddi_translations_dp; @@ -198,7 +214,15 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) if (IS_SKYLAKE(dev)) { ddi_translations_fdi = NULL; ddi_translations_dp = skl_ddi_translations_dp; - ddi_translations_edp = skl_ddi_translations_dp; + n_dp_entries = ARRAY_SIZE(skl_ddi_translations_dp); + if (dev_priv->vbt.edp_low_vswing) { + ddi_translations_edp = skl_ddi_translations_edp; + n_edp_entries = ARRAY_SIZE(skl_ddi_translations_edp); + } else { + ddi_translations_edp = skl_ddi_translations_dp; + n_edp_entries = ARRAY_SIZE(skl_ddi_translations_dp); + } + ddi_translations_hdmi = skl_ddi_translations_hdmi; n_hdmi_entries = ARRAY_SIZE(skl_ddi_translations_hdmi); hdmi_800mV_0dB = 7; @@ -207,6 +231,8 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) ddi_translations_dp = bdw_ddi_translations_dp; ddi_translations_edp = bdw_ddi_translations_edp; ddi_translations_hdmi = bdw_ddi_translations_hdmi; + n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp); + n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp); n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi); hdmi_800mV_0dB = 7; } else if (IS_HASWELL(dev)) { @@ -214,6 +240,7 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) ddi_translations_dp = hsw_ddi_translations_dp; ddi_translations_edp = hsw_ddi_translations_dp; ddi_translations_hdmi = hsw_ddi_translations_hdmi; + n_dp_entries = n_edp_entries = ARRAY_SIZE(hsw_ddi_translations_dp); n_hdmi_entries = ARRAY_SIZE(hsw_ddi_translations_hdmi); hdmi_800mV_0dB = 6; } else { @@ -222,6 +249,8 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) ddi_translations_fdi = bdw_ddi_translations_fdi; ddi_translations_dp = bdw_ddi_translations_dp; ddi_translations_hdmi = bdw_ddi_translations_hdmi; + n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp); + n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp); n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi); hdmi_800mV_0dB = 7; } @@ -229,29 +258,34 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port) switch (port) { case PORT_A: ddi_translations = ddi_translations_edp; + size = n_edp_entries; break; case PORT_B: case PORT_C: ddi_translations = ddi_translations_dp; + size = n_dp_entries; break; case PORT_D: - if (intel_dp_is_edp(dev, PORT_D)) + if (intel_dp_is_edp(dev, PORT_D)) { ddi_translations = ddi_translations_edp; - else + size = n_edp_entries; + } else { ddi_translations = ddi_translations_dp; + size = n_dp_entries; + } break; case PORT_E: if (ddi_translations_fdi) ddi_translations = ddi_translations_fdi; else ddi_translations = ddi_translations_dp; + size = n_dp_entries; break; default: BUG(); } - for (i = 0, reg = DDI_BUF_TRANS(port); - i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) { + for (i = 0, reg = DDI_BUF_TRANS(port); i < size; i++) { I915_WRITE(reg, ddi_translations[i].trans1); reg += 4; I915_WRITE(reg, ddi_translations[i].trans2); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 8d674f4..d1141d3 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2691,11 +2691,14 @@ static uint8_t intel_dp_voltage_max(struct intel_dp *intel_dp) { struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = dev->dev_private; enum port port = dp_to_dig_port(intel_dp)->port; - if (INTEL_INFO(dev)->gen >= 9) + if (INTEL_INFO(dev)->gen >= 9) { + if (dev_priv->vbt.edp_low_vswing && port == PORT_A) + return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; - else if (IS_VALLEYVIEW(dev)) + } else if (IS_VALLEYVIEW(dev)) return DP_TRAIN_VOLTAGE_SWING_LEVEL_3; else if (IS_GEN7(dev) && port == PORT_A) return DP_TRAIN_VOLTAGE_SWING_LEVEL_2; @@ -2719,6 +2722,8 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) return DP_TRAIN_PRE_EMPH_LEVEL_2; case DP_TRAIN_VOLTAGE_SWING_LEVEL_2: return DP_TRAIN_PRE_EMPH_LEVEL_1; + case DP_TRAIN_VOLTAGE_SWING_LEVEL_3: + return DP_TRAIN_PRE_EMPH_LEVEL_0; default: return DP_TRAIN_PRE_EMPH_LEVEL_0; } @@ -3201,6 +3206,9 @@ intel_hsw_signal_levels(uint8_t train_set) return DDI_BUF_TRANS_SELECT(7); case DP_TRAIN_VOLTAGE_SWING_LEVEL_2 | DP_TRAIN_PRE_EMPH_LEVEL_1: return DDI_BUF_TRANS_SELECT(8); + + case DP_TRAIN_VOLTAGE_SWING_LEVEL_3 | DP_TRAIN_PRE_EMPH_LEVEL_0: + return DDI_BUF_TRANS_SELECT(9); default: DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level:" "0x%x\n", signal_levels); -- 1.7.10.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing 2015-02-25 4:59 ` [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing Sonika Jindal @ 2015-02-26 12:24 ` shuang.he 0 siblings, 0 replies; 6+ messages in thread From: shuang.he @ 2015-02-26 12:24 UTC (permalink / raw) To: shuang.he, ethan.gao, intel-gfx, sonika.jindal Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) Task id: 5821 -------------------------------------Summary------------------------------------- Platform Delta drm-intel-nightly Series Applied PNV -3 281/281 278/281 ILK 308/308 308/308 SNB -1 326/326 325/326 IVB 380/380 380/380 BYT 294/294 294/294 HSW 387/421 387/421 BDW -1 316/316 315/316 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied *PNV igt_gem_userptr_blits_minor-unsync-interruptible PASS(3) DMESG_WARN(1)PASS(1) PNV igt_gem_userptr_blits_minor-unsync-normal DMESG_WARN(3)PASS(1) DMESG_WARN(1)PASS(1) *PNV igt_gen3_render_mixed_blits PASS(5) CRASH(1)PASS(1) *SNB igt_kms_plane_plane-panning-bottom-right-pipe-B-plane-1 DMESG_WARN(12)PASS(4) TIMEOUT(1)PASS(1) *BDW igt_gem_gtt_hog PASS(10) DMESG_WARN(1)PASS(1) Note: You need to pay more attention to line start with '*' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] Support for low voltage swing 2015-02-25 4:59 [PATCH 0/2] Support for low voltage swing Sonika Jindal 2015-02-25 4:59 ` [PATCH 1/2] drm/i915/skl: Support for edp low_vswing param in vbt Sonika Jindal 2015-02-25 4:59 ` [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing Sonika Jindal @ 2015-02-25 15:07 ` Daniel Vetter 2015-02-26 4:22 ` Jindal, Sonika 2 siblings, 1 reply; 6+ messages in thread From: Daniel Vetter @ 2015-02-25 15:07 UTC (permalink / raw) To: Sonika Jindal; +Cc: intel-gfx On Wed, Feb 25, 2015 at 10:29:10AM +0530, Sonika Jindal wrote: > Skylake supports low voltage swing in edp 1.4. The translation table is selected > based upon the vbt entry for selecting low vswing > These patches are being pulled from -internal to -nightly. I presume the 2nd patch has the fixup you've posted a few days back already squashed in? Both merged to dinq, thanks. -Daniel > > Sonika Jindal (2): > drm/i915/skl: Support for edp low_vswing param in vbt > drm/i915/skl: Add support for edp1.4 low vswing > > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_bios.c | 7 ++++++ > drivers/gpu/drm/i915/intel_bios.h | 1 + > drivers/gpu/drm/i915/intel_ddi.c | 46 ++++++++++++++++++++++++++++++++----- > drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++-- > 5 files changed, 59 insertions(+), 8 deletions(-) > > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] Support for low voltage swing 2015-02-25 15:07 ` [PATCH 0/2] Support for low voltage swing Daniel Vetter @ 2015-02-26 4:22 ` Jindal, Sonika 0 siblings, 0 replies; 6+ messages in thread From: Jindal, Sonika @ 2015-02-26 4:22 UTC (permalink / raw) To: Daniel Vetter; +Cc: intel-gfx@lists.freedesktop.org Yes, it has the updated values squashed in. Thanks, Sonika -----Original Message----- From: Daniel Vetter [mailto:daniel.vetter@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, February 25, 2015 8:37 PM To: Jindal, Sonika Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 0/2] Support for low voltage swing On Wed, Feb 25, 2015 at 10:29:10AM +0530, Sonika Jindal wrote: > Skylake supports low voltage swing in edp 1.4. The translation table > is selected based upon the vbt entry for selecting low vswing These > patches are being pulled from -internal to -nightly. I presume the 2nd patch has the fixup you've posted a few days back already squashed in? Both merged to dinq, thanks. -Daniel > > Sonika Jindal (2): > drm/i915/skl: Support for edp low_vswing param in vbt > drm/i915/skl: Add support for edp1.4 low vswing > > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_bios.c | 7 ++++++ > drivers/gpu/drm/i915/intel_bios.h | 1 + > drivers/gpu/drm/i915/intel_ddi.c | 46 ++++++++++++++++++++++++++++++++----- > drivers/gpu/drm/i915/intel_dp.c | 12 ++++++++-- > 5 files changed, 59 insertions(+), 8 deletions(-) > > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2015-02-26 12:24 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-02-25 4:59 [PATCH 0/2] Support for low voltage swing Sonika Jindal 2015-02-25 4:59 ` [PATCH 1/2] drm/i915/skl: Support for edp low_vswing param in vbt Sonika Jindal 2015-02-25 4:59 ` [PATCH 2/2] drm/i915/skl: Add support for edp1.4 low vswing Sonika Jindal 2015-02-26 12:24 ` shuang.he 2015-02-25 15:07 ` [PATCH 0/2] Support for low voltage swing Daniel Vetter 2015-02-26 4:22 ` Jindal, Sonika
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