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dkim=none (message not signed) header.d=none;ffwll.ch; dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5488.namprd11.prod.outlook.com (2603:10b6:5:39d::5) by DM6PR11MB2665.namprd11.prod.outlook.com (2603:10b6:5:c3::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4436.19; Sat, 21 Aug 2021 00:25:45 +0000 Received: from DM4PR11MB5488.namprd11.prod.outlook.com ([fe80::b96b:79f6:c1fb:13ff]) by DM4PR11MB5488.namprd11.prod.outlook.com ([fe80::b96b:79f6:c1fb:13ff%9]) with mapi id 15.20.4436.021; Sat, 21 Aug 2021 00:25:45 +0000 To: Matthew Brost , , CC: References: <20210819061639.21051-1-matthew.brost@intel.com> <20210819061639.21051-18-matthew.brost@intel.com> From: Daniele Ceraolo Spurio Message-ID: Date: Fri, 20 Aug 2021 17:25:41 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Firefox/78.0 Thunderbird/78.13.0 In-Reply-To: <20210819061639.21051-18-matthew.brost@intel.com> Content-Type: text/plain; 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Flush the G2H work queue during reset to > ensure it is done running. Might be worth moving this patch closer to "drm/i915/guc: Process all G2H message at once in work queue". > Fixes: eb5e7da736f3 ("drm/i915/guc: Reset implementation for new GuC interface") > Signed-off-by: Matthew Brost > --- > .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 18 ++---------------- > 1 file changed, 2 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > index 4cf5a565f08e..9a53bae367b1 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c > @@ -714,8 +714,6 @@ static void guc_flush_submissions(struct intel_guc *guc) > > void intel_guc_submission_reset_prepare(struct intel_guc *guc) > { > - int i; > - > if (unlikely(!guc_submission_initialized(guc))) { > /* Reset called during driver load? GuC not yet initialised! */ > return; > @@ -731,20 +729,8 @@ void intel_guc_submission_reset_prepare(struct intel_guc *guc) > > guc_flush_submissions(guc); > > - /* > - * Handle any outstanding G2Hs before reset. Call IRQ handler directly > - * each pass as interrupt have been disabled. We always scrub for > - * outstanding G2H as it is possible for outstanding_submission_g2h to > - * be incremented after the context state update. > - */ > - for (i = 0; i < 4 && atomic_read(&guc->outstanding_submission_g2h); ++i) { > - intel_guc_to_host_event_handler(guc); > -#define wait_for_reset(guc, wait_var) \ > - intel_guc_wait_for_pending_msg(guc, wait_var, false, (HZ / 20)) > - do { > - wait_for_reset(guc, &guc->outstanding_submission_g2h); > - } while (!list_empty(&guc->ct.requests.incoming)); > - } > + flush_work(&guc->ct.requests.worker); > + We're now not waiting in the requests anymore, just ensuring that the processing of the ones we already received is done. Is this intended? We do still handle the remaining oustanding submission in the scrub so it's functionally correct, but the commit message doesn't state the change in waiting behavior, so wanted to double check it was planned. Daniele > scrub_guc_desc_for_outstanding_g2h(guc); > } >