From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C8D2C433FE for ; Fri, 19 Nov 2021 14:28:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 50B9061B1E for ; Fri, 19 Nov 2021 14:28:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 50B9061B1E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6DAD76E519; Fri, 19 Nov 2021 14:28:37 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id B218D6E05A; Fri, 19 Nov 2021 14:28:35 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10172"; a="297836805" X-IronPort-AV: E=Sophos;i="5.87,248,1631602800"; d="scan'208";a="297836805" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Nov 2021 06:28:35 -0800 X-IronPort-AV: E=Sophos;i="5.87,247,1631602800"; d="scan'208";a="737073922" Received: from mj0rgenx-mobl.ger.corp.intel.com (HELO [10.249.254.197]) ([10.249.254.197]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Nov 2021 06:28:33 -0800 Message-ID: Date: Fri, 19 Nov 2021 15:28:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.2.0 Content-Language: en-US To: =?UTF-8?Q?Christian_K=c3=b6nig?= From: =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Subject: [Intel-gfx] Sparsely populated TTM bos X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Vetter , Intel Graphics Development , DRI Development Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi, Christian, We have an upcoming use-case in i915 where one solution would be sparsely populated TTM bos. We had that at one point where ttm_tt pages were allocated on demand, but this time we'd rather be looking at multiple struct ttm_resources per bo and those resources could be from different managers. There might theoretically be other ways we can handle this use-case but I wanted to check with you whether this is something AMD is already looking into and if not, your general opinion. Thanks, Thomas