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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/37] drm/i915: Priority boost for new clients
Date: Fri, 29 Jun 2018 12:10:32 +0100	[thread overview]
Message-ID: <f73469fb-c21a-bcab-bb31-1693e9aba865@linux.intel.com> (raw)
In-Reply-To: <153026946151.8693.4611006553908215662@mail.alporthouse.com>


On 29/06/2018 11:51, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-06-29 11:36:50)
>>
>> On 29/06/2018 11:09, Chris Wilson wrote:
>>> Quoting Tvrtko Ursulin (2018-06-29 11:04:36)
>>>>
>>>> On 29/06/2018 08:53, Chris Wilson wrote:
>>>>> Taken from an idea used for FQ_CODEL, we give new request flows a
>>>>> priority boost. These flows are likely to correspond with interactive
>>>>> tasks and so be more latency sensitive than the long queues. As soon as
>>>>> the client has more than one request in the queue, further requests are
>>>>> not boosted and it settles down into ordinary steady state behaviour.
>>>>> Such small kicks dramatically help combat the starvation issue, by
>>>>> allowing each client the opportunity to run even when the system is
>>>>> under heavy throughput load (within the constraints of the user
>>>>> selected priority).
>>>>
>>>> Any effect on non-micro benchmarks to mention in the commit message as
>>>> the selling point?
>>>
>>> Desktop interactivity, subjective.
>>> wsim showed a major impact
>>>    
>>>>> Testcase: igt/benchmarks/rrul
>>>>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>>>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>>>>> ---
>>>>>     drivers/gpu/drm/i915/i915_request.c   | 16 ++++++++++++++--
>>>>>     drivers/gpu/drm/i915/i915_scheduler.h |  4 +++-
>>>>>     2 files changed, 17 insertions(+), 3 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
>>>>> index 14bf0be6f994..2d7a785dd88c 100644
>>>>> --- a/drivers/gpu/drm/i915/i915_request.c
>>>>> +++ b/drivers/gpu/drm/i915/i915_request.c
>>>>> @@ -1052,8 +1052,20 @@ void i915_request_add(struct i915_request *request)
>>>>>          */
>>>>>         local_bh_disable();
>>>>>         rcu_read_lock(); /* RCU serialisation for set-wedged protection */
>>>>> -     if (engine->schedule)
>>>>> -             engine->schedule(request, &request->gem_context->sched);
>>>>> +     if (engine->schedule) {
>>>>> +             struct i915_sched_attr attr = request->gem_context->sched;
>>>>> +
>>>>> +             /*
>>>>> +              * Boost priorities to new clients (new request flows).
>>>>> +              *
>>>>> +              * Allow interactive/synchronous clients to jump ahead of
>>>>> +              * the bulk clients. (FQ_CODEL)
>>>>> +              */
>>>>> +             if (!prev || i915_request_completed(prev))
>>>>> +                     attr.priority |= I915_PRIORITY_NEWCLIENT;
>>>>
>>>> Now a "lucky" client can always get higher priority an keep preempting
>>>> everyone else by just timing it's submissions right. So I have big
>>>> reservations on this one.
>>>
>>> Lucky being someone who is _idle_, everyone else being steady state. You
>>> can't keep getting lucky and stealing the show.
>>
>> Why couldn't it? All it is needed is to send a new execbuf after the
>> previous has completed.
>>
>> 1. First ctx A eb -> priority boost
>> 2. Other people get back in and start executing
>> 3. Another ctx A eb -> first has completed -> another priority boost ->
>> work from 2) is preempted
>> 4. Goto 2.
> 
> So you have one client spinning, it's going to win most races and starve
> the system, simply by owning struct_mutex. We give the other starving
> steady-state clients an opportunity to submit ahead of the spinner when
> they come to resubmit.

What do you mean by spinning and owning struct_mutex?

I was thinking for example the client A sending a 1ms batch and client B 
executing a 10ms batch.

If client A keeps submitting its batch at 1ms intervals when will client 
B complete?

Regards,

Tvrtko
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  reply	other threads:[~2018-06-29 11:10 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-29  7:53 [PATCH 01/37] drm/i915/gtt: Add read only pages to gen8_pte_encode Chris Wilson
2018-06-29  7:53 ` [PATCH 02/37] drm/i915/gtt: Read-only pages for insert_entries on bdw+ Chris Wilson
2018-06-29  7:53 ` [PATCH 03/37] drm/i915: Prevent writing into a read-only object via a GGTT mmap Chris Wilson
2018-06-29  7:53 ` [PATCH 04/37] drm/i915: Reject attempted pwrites into a read-only object Chris Wilson
2018-06-29  7:53 ` [PATCH 05/37] drm/i915/userptr: Enable read-only support on gen8+ Chris Wilson
2018-06-29  7:53 ` [PATCH 06/37] drm/i915: Move rate-limiting request retire to after submission Chris Wilson
2018-06-29 10:00   ` Tvrtko Ursulin
2018-06-29 10:10     ` Chris Wilson
2018-06-29  7:53 ` [PATCH 07/37] drm/i915: Move engine request retirement to intel_engine_cs Chris Wilson
2018-06-29  7:53 ` [PATCH 08/37] drm/i915: Hold request reference for submission until retirement Chris Wilson
2018-06-29  7:53 ` [PATCH 09/37] drm/i915/execlists: Switch to rb_root_cached Chris Wilson
2018-07-11 13:20   ` Tvrtko Ursulin
2018-06-29  7:53 ` [PATCH 10/37] drm/i915: Reserve some priority bits for internal use Chris Wilson
2018-06-29  7:53 ` [PATCH 11/37] drm/i915: Combine multiple internal plists into the same i915_priolist bucket Chris Wilson
2018-06-29  7:53 ` [PATCH 12/37] drm/i915: Priority boost for new clients Chris Wilson
2018-06-29 10:04   ` Tvrtko Ursulin
2018-06-29 10:09     ` Chris Wilson
2018-06-29 10:36       ` Tvrtko Ursulin
2018-06-29 10:41         ` Chris Wilson
2018-06-29 10:51         ` Chris Wilson
2018-06-29 11:10           ` Tvrtko Ursulin [this message]
2018-07-02 10:19             ` Tvrtko Ursulin
2018-06-29  7:53 ` [PATCH 13/37] drm/i915: Priority boost switching to an idle ring Chris Wilson
2018-06-29 10:08   ` Tvrtko Ursulin
2018-06-29 10:15     ` Chris Wilson
2018-06-29 10:41       ` Tvrtko Ursulin
2018-06-29  7:53 ` [PATCH 14/37] drm/i915: Refactor export_fence() after i915_vma_move_to_active() Chris Wilson
2018-06-29 12:00   ` Tvrtko Ursulin
2018-06-29  7:53 ` [PATCH 15/37] drm/i915: Export i915_request_skip() Chris Wilson
2018-06-29 12:10   ` Tvrtko Ursulin
2018-06-29 12:15     ` Chris Wilson
2018-06-29  7:53 ` [PATCH 16/37] drm/i915: Start returning an error from i915_vma_move_to_active() Chris Wilson
2018-06-29 12:17   ` Tvrtko Ursulin
2018-06-29  7:53 ` [PATCH 17/37] drm/i915: Track vma activity per fence.context, not per engine Chris Wilson
2018-06-29 14:54   ` Tvrtko Ursulin
2018-06-29 15:03     ` Chris Wilson
2018-06-29 15:34       ` Chris Wilson
2018-06-29 15:08     ` Tvrtko Ursulin
2018-06-29 15:36       ` Chris Wilson
2018-06-29 15:39         ` Chris Wilson
2018-07-02  9:38           ` Tvrtko Ursulin
2018-06-29 22:03   ` [PATCH v2] " Chris Wilson
2018-06-29  7:53 ` [PATCH 18/37] drm/i915: Track the last-active inside the i915_vma Chris Wilson
2018-06-29 22:01   ` [PATCH v2] " Chris Wilson
2018-06-29  7:53 ` [PATCH 19/37] drm/i915: Stop tracking MRU activity on VMA Chris Wilson
2018-06-29  7:53 ` [PATCH 20/37] drm/i915: Introduce the i915_user_extension_method Chris Wilson
2018-06-29  7:53 ` [PATCH 21/37] drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone() Chris Wilson
2018-06-29  7:53 ` [PATCH 22/37] drm/i915: Allow contexts to share a single timeline across all engines Chris Wilson
2018-06-29  7:53 ` [PATCH 23/37] drm/i915: Fix I915_EXEC_RING_MASK Chris Wilson
2018-06-29  7:53 ` [PATCH 24/37] drm/i915: Re-arrange execbuf so context is known before engine Chris Wilson
2018-06-29  7:53 ` [PATCH 25/37] drm/i915: Allow a context to define its set of engines Chris Wilson
2018-06-29  7:53 ` [PATCH 26/37] drm/i915/execlists: Flush the tasklet before unpinning Chris Wilson
2018-06-29  7:53 ` [PATCH 27/37] drm/i915/execlists: Refactor out can_merge_rq() Chris Wilson
2018-06-29  7:53 ` [PATCH 28/37] drm/i915: Replace nested subclassing with explicit subclasses Chris Wilson
2018-06-29  7:53 ` [PATCH 29/37] RFC drm/i915: Load balancing across a virtual engine Chris Wilson
2018-06-29  7:53 ` [PATCH 30/37] drm/i915: Introduce i915_address_space.mutex Chris Wilson
2018-06-29  7:53 ` [PATCH 31/37] drm/i915: Move fence register tracking to GGTT Chris Wilson
2018-06-29  7:53 ` [PATCH 32/37] drm/i915: Convert fences to use a GGTT lock rather than struct_mutex Chris Wilson
2018-06-29  7:53 ` [PATCH 33/37] drm/i915: Tidy i915_gem_suspend() Chris Wilson
2018-06-29  7:53 ` [PATCH 34/37] drm/i915: Move fence-reg interface to i915_gem_fence_reg.h Chris Wilson
2018-06-29  7:53 ` [PATCH 35/37] drm/i915: Dynamically allocate the array of drm_i915_gem_fence_reg Chris Wilson
2018-06-29  7:53 ` [PATCH 36/37] drm/i915: Pull all the reset functionality together into i915_reset.c Chris Wilson
2018-06-29  7:53 ` [PATCH 37/37] drm/i915: Remove GPU reset dependence on struct_mutex Chris Wilson
2018-06-29  8:58 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/37] drm/i915/gtt: Add read only pages to gen8_pte_encode Patchwork
2018-06-29  9:14 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-29  9:16 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-29 11:53 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-06-29 22:38 ` ✗ Fi.CI.BAT: failure for series starting with [01/37] drm/i915/gtt: Add read only pages to gen8_pte_encode (rev3) Patchwork

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