* [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess
@ 2025-12-08 18:26 Ville Syrjala
2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
` (22 more replies)
0 siblings, 23 replies; 51+ messages in thread
From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Another attempt at fixing the mess around VGA deocode. The
current GMCH_CTRL based stuff is a complete lie as the register
is locked on ILK+.
My original plan was to simply disable all legacy decoding in
intel_vga_disable() but that turned out not to work thanks to
one laptop that hangs when trying to reboot/shutdown. So I had
to come up with something a bit more clever (or possibly insane).
This has more or less been smoke tested on most of my laptops
in the gen2 to SNB range (all just have the iGPU), and various
desktop boards (i845,g4x,HSW,CFL) with some random Matrox
cards (PCI and PCIe) or DG2.
For the destop boards I tried to test all the possibilities:
- iGPU only
- dGPU only
- iGPU as primary + dGPU as secondary
- dGPU as primary + iGPU as secondary
Some boards disable VGA decoding on the secondary iGPU via
GMCH_CTRL, others leave both GPUs with VGA decoding enabled.
I don't think I was any case where VGA decoding was disabled
for a secondary dGPU, possibly because the bridge controls
achieve the same result effectively anyway.
I think I managed to cover most of the combinations, with
enoguh board swapping.
I also smoke tested UEFI boot on the HSW and CFL boards. And in
fact the CFL board wouldn't even POST with CSM enabled so that's
the only thing I tested there.
Ville Syrjälä (19):
drm/i915/vga: Register vgaarb client later
drm/i915/vga: Get rid of intel_vga_reset_io_mem()
drm/i915/power: Remove i915_power_well_desc::has_vga
drm/i915/vga: Extract intel_gmch_ctrl_reg()
drm/i915/vga: Don't touch VGA registers if VGA decode is fully
disabled
drm/i915/vga: Clean up VGA registers even if VGA plane is disabled
drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs
drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control
drm/i915/vga: Assert that VGA register accesses are going to the
right GPU
drm/i915/de: Simplify intel_de_read8()
drm/i915/de: Add intel_de_write8()
drm/i915/vga: Introduce intel_vga_{read,write}()
drm/i915/vga: Use MMIO for VGA registers on pre-g4x
video/vga: Add VGA_IS0_R
drm/i915/crt: Use IS0_R instead of VGA_MIS_W
drm/i915/crt: Extract intel_crt_sense_above_threshold()
drm/i915: Get rid of the INTEL_GMCH_CTRL alias
drm/i915: Clean up PCI config space reg defines
drm/i915: Document the GMCH_CTRL register a bit
drivers/gpu/drm/i915/display/intel_crt.c | 18 +-
drivers/gpu/drm/i915/display/intel_crt_regs.h | 2 -
drivers/gpu/drm/i915/display/intel_de.h | 17 +-
.../drm/i915/display/intel_display_driver.c | 18 +-
.../i915/display/intel_display_power_map.c | 13 -
.../i915/display/intel_display_power_well.c | 8 +-
.../i915/display/intel_display_power_well.h | 2 -
drivers/gpu/drm/i915/display/intel_vga.c | 320 +++++++++++++-----
drivers/gpu/drm/i915/display/intel_vga.h | 5 +-
.../drm/xe/compat-i915-headers/intel_uncore.h | 8 +
drivers/gpu/drm/xe/xe_mmio.c | 9 +
drivers/gpu/drm/xe/xe_mmio.h | 1 +
include/drm/intel/i915_drm.h | 82 ++---
include/video/vga.h | 2 +
14 files changed, 336 insertions(+), 169 deletions(-)
--
2.51.2
^ permalink raw reply [flat|nested] 51+ messages in thread* [PATCH 01/19] drm/i915/vga: Register vgaarb client later 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:23 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala ` (21 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Currently we register to vgaarb way too early. Thus it is possible that the entire VGA decode logic gets nuked via GMCH_CTRL before intel_vga_disable() has even disabled the VGA plane. This could even cause a system hang because we'll be unable to turn off the VGA plane gracefully. Move the vgaarb registration into intel_display_driver_register(). I suppose we could do it a bit earlier (after intel_vga_disable()), but not convinced there's any point. Also the error handling here is pointless since the registration can't fail (unless the device isn't a VGA class in which case all VGA decode logic should aleady be disabled by the BIOS via GMCH_CTRL). But let's toss in a WARN to catch any future breakage of vga_client_register(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- .../drm/i915/display/intel_display_driver.c | 18 +++++++----------- drivers/gpu/drm/i915/display/intel_vga.c | 7 ++----- drivers/gpu/drm/i915/display/intel_vga.h | 2 +- 3 files changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index 7e000ba3e08b..b149976f527b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -214,16 +214,12 @@ int intel_display_driver_probe_noirq(struct intel_display *display) intel_bios_init(display); - ret = intel_vga_register(display); - if (ret) - goto cleanup_bios; - intel_psr_dc5_dc6_wa_init(display); /* FIXME: completely on the wrong abstraction layer */ ret = intel_power_domains_init(display); if (ret < 0) - goto cleanup_vga; + goto cleanup_bios; intel_pmdemand_init_early(display); @@ -235,7 +231,7 @@ int intel_display_driver_probe_noirq(struct intel_display *display) display->hotplug.dp_wq = alloc_ordered_workqueue("intel-dp", 0); if (!display->hotplug.dp_wq) { ret = -ENOMEM; - goto cleanup_vga_client_pw_domain_dmc; + goto cleanup_pw_domain_dmc; } display->wq.modeset = alloc_ordered_workqueue("i915_modeset", 0); @@ -307,11 +303,9 @@ int intel_display_driver_probe_noirq(struct intel_display *display) destroy_workqueue(display->wq.modeset); cleanup_wq_dp: destroy_workqueue(display->hotplug.dp_wq); -cleanup_vga_client_pw_domain_dmc: +cleanup_pw_domain_dmc: intel_dmc_fini(display); intel_power_domains_driver_remove(display); -cleanup_vga: - intel_vga_unregister(display); cleanup_bios: intel_bios_driver_remove(display); @@ -566,6 +560,8 @@ void intel_display_driver_register(struct intel_display *display) if (!HAS_DISPLAY(display)) return; + intel_vga_register(display); + /* Must be done after probing outputs */ intel_opregion_register(display); intel_acpi_video_register(display); @@ -658,8 +654,6 @@ void intel_display_driver_remove_nogem(struct intel_display *display) intel_power_domains_driver_remove(display); - intel_vga_unregister(display); - intel_bios_driver_remove(display); } @@ -687,6 +681,8 @@ void intel_display_driver_unregister(struct intel_display *display) acpi_video_unregister(); intel_opregion_unregister(display); + + intel_vga_unregister(display); } /* diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index c45c4bbc3f95..f13734cfd904 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -135,7 +135,7 @@ static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_ return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; } -int intel_vga_register(struct intel_display *display) +void intel_vga_register(struct intel_display *display) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); @@ -150,10 +150,7 @@ int intel_vga_register(struct intel_display *display) * vga_client_register() fails with -ENODEV. */ ret = vga_client_register(pdev, intel_gmch_vga_set_decode); - if (ret && ret != -ENODEV) - return ret; - - return 0; + drm_WARN_ON(display->drm, ret && ret != -ENODEV); } void intel_vga_unregister(struct intel_display *display) diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h index 16d699f3b641..80084265c6cd 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.h +++ b/drivers/gpu/drm/i915/display/intel_vga.h @@ -10,7 +10,7 @@ struct intel_display; void intel_vga_reset_io_mem(struct intel_display *display); void intel_vga_disable(struct intel_display *display); -int intel_vga_register(struct intel_display *display); +void intel_vga_register(struct intel_display *display); void intel_vga_unregister(struct intel_display *display); #endif /* __INTEL_VGA_H__ */ -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 01/19] drm/i915/vga: Register vgaarb client later 2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala @ 2025-12-09 10:23 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:23 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Currently we register to vgaarb way too early. Thus it is > possible that the entire VGA decode logic gets nuked via > GMCH_CTRL before intel_vga_disable() has even disabled the > VGA plane. This could even cause a system hang because > we'll be unable to turn off the VGA plane gracefully. > > Move the vgaarb registration into intel_display_driver_register(). > I suppose we could do it a bit earlier (after intel_vga_disable()), > but not convinced there's any point. > > Also the error handling here is pointless since the > registration can't fail (unless the device isn't a VGA class > in which case all VGA decode logic should aleady be disabled > by the BIOS via GMCH_CTRL). But let's toss in a WARN to catch > any future breakage of vga_client_register(). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> After this, intel_vga_register() is only called for HAS_DISPLAY(), while previously it was called unconditionally. It's probably fine? Other than that, Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > .../drm/i915/display/intel_display_driver.c | 18 +++++++----------- > drivers/gpu/drm/i915/display/intel_vga.c | 7 ++----- > drivers/gpu/drm/i915/display/intel_vga.h | 2 +- > 3 files changed, 10 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c > index 7e000ba3e08b..b149976f527b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c > @@ -214,16 +214,12 @@ int intel_display_driver_probe_noirq(struct intel_display *display) > > intel_bios_init(display); > > - ret = intel_vga_register(display); > - if (ret) > - goto cleanup_bios; > - > intel_psr_dc5_dc6_wa_init(display); > > /* FIXME: completely on the wrong abstraction layer */ > ret = intel_power_domains_init(display); > if (ret < 0) > - goto cleanup_vga; > + goto cleanup_bios; > > intel_pmdemand_init_early(display); > > @@ -235,7 +231,7 @@ int intel_display_driver_probe_noirq(struct intel_display *display) > display->hotplug.dp_wq = alloc_ordered_workqueue("intel-dp", 0); > if (!display->hotplug.dp_wq) { > ret = -ENOMEM; > - goto cleanup_vga_client_pw_domain_dmc; > + goto cleanup_pw_domain_dmc; > } > > display->wq.modeset = alloc_ordered_workqueue("i915_modeset", 0); > @@ -307,11 +303,9 @@ int intel_display_driver_probe_noirq(struct intel_display *display) > destroy_workqueue(display->wq.modeset); > cleanup_wq_dp: > destroy_workqueue(display->hotplug.dp_wq); > -cleanup_vga_client_pw_domain_dmc: > +cleanup_pw_domain_dmc: > intel_dmc_fini(display); > intel_power_domains_driver_remove(display); > -cleanup_vga: > - intel_vga_unregister(display); > cleanup_bios: > intel_bios_driver_remove(display); > > @@ -566,6 +560,8 @@ void intel_display_driver_register(struct intel_display *display) > if (!HAS_DISPLAY(display)) > return; > > + intel_vga_register(display); > + > /* Must be done after probing outputs */ > intel_opregion_register(display); > intel_acpi_video_register(display); > @@ -658,8 +654,6 @@ void intel_display_driver_remove_nogem(struct intel_display *display) > > intel_power_domains_driver_remove(display); > > - intel_vga_unregister(display); > - > intel_bios_driver_remove(display); > } > > @@ -687,6 +681,8 @@ void intel_display_driver_unregister(struct intel_display *display) > > acpi_video_unregister(); > intel_opregion_unregister(display); > + > + intel_vga_unregister(display); > } > > /* > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index c45c4bbc3f95..f13734cfd904 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -135,7 +135,7 @@ static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_ > return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > } > > -int intel_vga_register(struct intel_display *display) > +void intel_vga_register(struct intel_display *display) > { > > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > @@ -150,10 +150,7 @@ int intel_vga_register(struct intel_display *display) > * vga_client_register() fails with -ENODEV. > */ > ret = vga_client_register(pdev, intel_gmch_vga_set_decode); > - if (ret && ret != -ENODEV) > - return ret; > - > - return 0; > + drm_WARN_ON(display->drm, ret && ret != -ENODEV); > } > > void intel_vga_unregister(struct intel_display *display) > diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h > index 16d699f3b641..80084265c6cd 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.h > +++ b/drivers/gpu/drm/i915/display/intel_vga.h > @@ -10,7 +10,7 @@ struct intel_display; > > void intel_vga_reset_io_mem(struct intel_display *display); > void intel_vga_disable(struct intel_display *display); > -int intel_vga_register(struct intel_display *display); > +void intel_vga_register(struct intel_display *display); > void intel_vga_unregister(struct intel_display *display); > > #endif /* __INTEL_VGA_H__ */ -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala 2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:26 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala ` (20 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Remove the MSR VGA register access from the power well hook, and just do it once in intel_vga_disable(). Turns out that the hardware has two levels of MDA vs. CGA decode logic: GPU level and display engine level. When we write the MSR register MDA/CGA mode selection bit both decode logics are updated accordingly, so that whichever register accessed the GPU claims will also be claimed by the display engine on the RMbus. If the two get out of sync the GPU will claim the register accesses but the display engine will not, leading to RMbus NoClaim errors. The way to get the two decode logics out of sync is by resetting the power well housing the VGA stuff, while we are in CGA mode. At that point only the display engine level decode logic will be updated with the new MSR register reset value (which selects MDA mode), and the GPU level decode logic will retain its previous state (GGA mode). To avoid the mismatch we just have to switch to MDA mode with an explicit MSR register write. Currently this is being done in a somewhat dodgy manner whenever the power well gets enabled. But doing if from the power well hook is not actually necessary since the GPU level decode logic will retain its state even when the power well is disabled. Ie. doing it just the one time is sufficient, and that can be done when we're anyway writing other VGA registers while disabling the VGA plane. See commit f9dcb0dfee98 ("drm/i915: touch VGA MSR after we enable the power well") for the original details. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- .../i915/display/intel_display_power_well.c | 3 -- drivers/gpu/drm/i915/display/intel_vga.c | 40 +++++++++---------- 2 files changed, 20 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index db185a859133..52b20118ace6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -204,9 +204,6 @@ int intel_power_well_refcount(struct i915_power_well *power_well) static void hsw_power_well_post_enable(struct intel_display *display, u8 irq_pipe_mask, bool has_vga) { - if (has_vga) - intel_vga_reset_io_mem(display); - if (irq_pipe_mask) gen8_irq_power_well_post_enable(display, irq_pipe_mask); } diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index f13734cfd904..39c68aec647b 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -47,8 +47,8 @@ void intel_vga_disable(struct intel_display *display) struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); enum pipe pipe; + u8 msr, sr1; u32 tmp; - u8 sr1; tmp = intel_de_read(display, vga_reg); if (tmp & VGA_DISP_DISABLE) @@ -66,35 +66,35 @@ void intel_vga_disable(struct intel_display *display) /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); + outb(0x01, VGA_SEQ_I); sr1 = inb(VGA_SEQ_D); outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); + + msr = inb(VGA_MIS_R); + /* + * VGA_MIS_COLOR controls both GPU level and display engine level + * MDA vs. CGA decode logic. But when the register gets reset + * (reset value has VGA_MIS_COLOR=0) by the power well, only the + * display engine level decode logic gets notified. + * + * Switch to MDA mode to make sure the GPU level decode logic will + * be in sync with the display engine level decode logic after the + * power well has been reset. Otherwise the GPU will claim CGA + * register accesses but the display engine will not, causing + * RMbus NoClaim errors. + */ + msr &= ~VGA_MIS_COLOR; + outb(msr, VGA_MIS_W); + vga_put(pdev, VGA_RSRC_LEGACY_IO); + udelay(300); intel_de_write(display, vga_reg, VGA_DISP_DISABLE); intel_de_posting_read(display, vga_reg); } -void intel_vga_reset_io_mem(struct intel_display *display) -{ - struct pci_dev *pdev = to_pci_dev(display->drm->dev); - - /* - * After we re-enable the power well, if we touch VGA register 0x3d5 - * we'll get unclaimed register interrupts. This stops after we write - * anything to the VGA MSR register. The vgacon module uses this - * register all the time, so if we unbind our driver and, as a - * consequence, bind vgacon, we'll get stuck in an infinite loop at - * console_unlock(). So make here we touch the VGA MSR register, making - * sure vgacon can keep working normally without triggering interrupts - * and error messages. - */ - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); - outb(inb(VGA_MIS_R), VGA_MIS_W); - vga_put(pdev, VGA_RSRC_LEGACY_IO); -} - static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() 2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala @ 2025-12-09 10:26 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:26 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Remove the MSR VGA register access from the power well hook, and > just do it once in intel_vga_disable(). > > Turns out that the hardware has two levels of MDA vs. CGA decode > logic: GPU level and display engine level. When we write the MSR > register MDA/CGA mode selection bit both decode logics are updated > accordingly, so that whichever register accessed the GPU claims > will also be claimed by the display engine on the RMbus. If the > two get out of sync the GPU will claim the register accesses but > the display engine will not, leading to RMbus NoClaim errors. > > The way to get the two decode logics out of sync is by resetting > the power well housing the VGA stuff, while we are in CGA mode. > At that point only the display engine level decode logic will be > updated with the new MSR register reset value (which selects MDA > mode), and the GPU level decode logic will retain its previous > state (GGA mode). To avoid the mismatch we just have to switch > to MDA mode with an explicit MSR register write. > > Currently this is being done in a somewhat dodgy manner whenever > the power well gets enabled. But doing if from the power well > hook is not actually necessary since the GPU level decode logic > will retain its state even when the power well is disabled. Ie. > doing it just the one time is sufficient, and that can be done > when we're anyway writing other VGA registers while disabling > the VGA plane. > > See commit f9dcb0dfee98 ("drm/i915: touch VGA MSR after we > enable the power well") for the original details. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> I'll take your word for it. Looks plausible. Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > .../i915/display/intel_display_power_well.c | 3 -- > drivers/gpu/drm/i915/display/intel_vga.c | 40 +++++++++---------- > 2 files changed, 20 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index db185a859133..52b20118ace6 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -204,9 +204,6 @@ int intel_power_well_refcount(struct i915_power_well *power_well) > static void hsw_power_well_post_enable(struct intel_display *display, > u8 irq_pipe_mask, bool has_vga) > { > - if (has_vga) > - intel_vga_reset_io_mem(display); > - > if (irq_pipe_mask) > gen8_irq_power_well_post_enable(display, irq_pipe_mask); > } > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index f13734cfd904..39c68aec647b 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -47,8 +47,8 @@ void intel_vga_disable(struct intel_display *display) > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > enum pipe pipe; > + u8 msr, sr1; > u32 tmp; > - u8 sr1; > > tmp = intel_de_read(display, vga_reg); > if (tmp & VGA_DISP_DISABLE) > @@ -66,35 +66,35 @@ void intel_vga_disable(struct intel_display *display) > > /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > + > outb(0x01, VGA_SEQ_I); > sr1 = inb(VGA_SEQ_D); > outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); > + > + msr = inb(VGA_MIS_R); > + /* > + * VGA_MIS_COLOR controls both GPU level and display engine level > + * MDA vs. CGA decode logic. But when the register gets reset > + * (reset value has VGA_MIS_COLOR=0) by the power well, only the > + * display engine level decode logic gets notified. > + * > + * Switch to MDA mode to make sure the GPU level decode logic will > + * be in sync with the display engine level decode logic after the > + * power well has been reset. Otherwise the GPU will claim CGA > + * register accesses but the display engine will not, causing > + * RMbus NoClaim errors. > + */ > + msr &= ~VGA_MIS_COLOR; > + outb(msr, VGA_MIS_W); > + > vga_put(pdev, VGA_RSRC_LEGACY_IO); > + > udelay(300); > > intel_de_write(display, vga_reg, VGA_DISP_DISABLE); > intel_de_posting_read(display, vga_reg); > } > > -void intel_vga_reset_io_mem(struct intel_display *display) > -{ > - struct pci_dev *pdev = to_pci_dev(display->drm->dev); > - > - /* > - * After we re-enable the power well, if we touch VGA register 0x3d5 > - * we'll get unclaimed register interrupts. This stops after we write > - * anything to the VGA MSR register. The vgacon module uses this > - * register all the time, so if we unbind our driver and, as a > - * consequence, bind vgacon, we'll get stuck in an infinite loop at > - * console_unlock(). So make here we touch the VGA MSR register, making > - * sure vgacon can keep working normally without triggering interrupts > - * and error messages. > - */ > - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > - outb(inb(VGA_MIS_R), VGA_MIS_W); > - vga_put(pdev, VGA_RSRC_LEGACY_IO); > -} > - > static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala 2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala 2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:27 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala ` (19 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> We no longer have any need for the has_vga flag in the display power well descriptor. Get rid of it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- .../gpu/drm/i915/display/intel_display_power_map.c | 13 ------------- .../gpu/drm/i915/display/intel_display_power_well.c | 5 ++--- .../gpu/drm/i915/display/intel_display_power_well.h | 2 -- 3 files changed, 2 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c index 9b49952994ce..638d971a3a6c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c @@ -112,7 +112,6 @@ static const struct i915_power_well_desc hsw_power_wells_main[] = { .id = HSW_DISP_PW_GLOBAL), ), .ops = &hsw_power_well_ops, - .has_vga = true, }, }; @@ -146,7 +145,6 @@ static const struct i915_power_well_desc bdw_power_wells_main[] = { .id = HSW_DISP_PW_GLOBAL), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), }, }; @@ -390,7 +388,6 @@ static const struct i915_power_well_desc skl_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), .has_fuses = true, }, { @@ -469,7 +466,6 @@ static const struct i915_power_well_desc bxt_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), .has_fuses = true, }, { @@ -572,7 +568,6 @@ static const struct i915_power_well_desc glk_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), .has_fuses = true, }, { @@ -748,7 +743,6 @@ static const struct i915_power_well_desc icl_power_wells_main[] = { .id = ICL_DISP_PW_3), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B), .has_fuses = true, }, { @@ -914,7 +908,6 @@ static const struct i915_power_well_desc tgl_power_wells_main[] = { .id = ICL_DISP_PW_3), ), .ops = &hsw_power_well_ops, - .has_vga = true, .irq_pipe_mask = BIT(PIPE_B), .has_fuses = true, }, { @@ -1071,7 +1064,6 @@ static const struct i915_power_well_desc rkl_power_wells_main[] = { ), .ops = &hsw_power_well_ops, .irq_pipe_mask = BIT(PIPE_B), - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( @@ -1166,7 +1158,6 @@ static const struct i915_power_well_desc dg1_power_wells_main[] = { ), .ops = &hsw_power_well_ops, .irq_pipe_mask = BIT(PIPE_B), - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( @@ -1325,7 +1316,6 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( @@ -1482,7 +1472,6 @@ static const struct i915_power_well_desc xelpdp_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( @@ -1649,7 +1638,6 @@ static const struct i915_power_well_desc xe3lpd_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( @@ -1722,7 +1710,6 @@ static const struct i915_power_well_desc wcl_power_wells_main[] = { .id = SKL_DISP_PW_2), ), .ops = &hsw_power_well_ops, - .has_vga = true, .has_fuses = true, }, { .instances = &I915_PW_INSTANCES( diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index 52b20118ace6..68f293c3ac01 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -202,7 +202,7 @@ int intel_power_well_refcount(struct i915_power_well *power_well) * requesting it to be enabled. */ static void hsw_power_well_post_enable(struct intel_display *display, - u8 irq_pipe_mask, bool has_vga) + u8 irq_pipe_mask) { if (irq_pipe_mask) gen8_irq_power_well_post_enable(display, irq_pipe_mask); @@ -415,8 +415,7 @@ static void hsw_power_well_enable(struct intel_display *display, } hsw_power_well_post_enable(display, - power_well->desc->irq_pipe_mask, - power_well->desc->has_vga); + power_well->desc->irq_pipe_mask); } static void hsw_power_well_disable(struct intel_display *display, diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.h b/drivers/gpu/drm/i915/display/intel_display_power_well.h index ec8e508d0593..8f5524da2d06 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.h +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.h @@ -103,8 +103,6 @@ struct i915_power_well_desc { * the well enabled. */ u16 fixed_enable_delay:1; - /* The pw is backing the VGA functionality */ - u16 has_vga:1; u16 has_fuses:1; /* * The pw is for an ICL+ TypeC PHY port in -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga 2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala @ 2025-12-09 10:27 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:27 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We no longer have any need for the has_vga flag in the > display power well descriptor. Get rid of it. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > .../gpu/drm/i915/display/intel_display_power_map.c | 13 ------------- > .../gpu/drm/i915/display/intel_display_power_well.c | 5 ++--- > .../gpu/drm/i915/display/intel_display_power_well.h | 2 -- > 3 files changed, 2 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c > index 9b49952994ce..638d971a3a6c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c > @@ -112,7 +112,6 @@ static const struct i915_power_well_desc hsw_power_wells_main[] = { > .id = HSW_DISP_PW_GLOBAL), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > }, > }; > > @@ -146,7 +145,6 @@ static const struct i915_power_well_desc bdw_power_wells_main[] = { > .id = HSW_DISP_PW_GLOBAL), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), > }, > }; > @@ -390,7 +388,6 @@ static const struct i915_power_well_desc skl_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), > .has_fuses = true, > }, { > @@ -469,7 +466,6 @@ static const struct i915_power_well_desc bxt_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), > .has_fuses = true, > }, { > @@ -572,7 +568,6 @@ static const struct i915_power_well_desc glk_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), > .has_fuses = true, > }, { > @@ -748,7 +743,6 @@ static const struct i915_power_well_desc icl_power_wells_main[] = { > .id = ICL_DISP_PW_3), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B), > .has_fuses = true, > }, { > @@ -914,7 +908,6 @@ static const struct i915_power_well_desc tgl_power_wells_main[] = { > .id = ICL_DISP_PW_3), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .irq_pipe_mask = BIT(PIPE_B), > .has_fuses = true, > }, { > @@ -1071,7 +1064,6 @@ static const struct i915_power_well_desc rkl_power_wells_main[] = { > ), > .ops = &hsw_power_well_ops, > .irq_pipe_mask = BIT(PIPE_B), > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > @@ -1166,7 +1158,6 @@ static const struct i915_power_well_desc dg1_power_wells_main[] = { > ), > .ops = &hsw_power_well_ops, > .irq_pipe_mask = BIT(PIPE_B), > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > @@ -1325,7 +1316,6 @@ static const struct i915_power_well_desc xelpd_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > @@ -1482,7 +1472,6 @@ static const struct i915_power_well_desc xelpdp_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > @@ -1649,7 +1638,6 @@ static const struct i915_power_well_desc xe3lpd_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > @@ -1722,7 +1710,6 @@ static const struct i915_power_well_desc wcl_power_wells_main[] = { > .id = SKL_DISP_PW_2), > ), > .ops = &hsw_power_well_ops, > - .has_vga = true, > .has_fuses = true, > }, { > .instances = &I915_PW_INSTANCES( > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 52b20118ace6..68f293c3ac01 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -202,7 +202,7 @@ int intel_power_well_refcount(struct i915_power_well *power_well) > * requesting it to be enabled. > */ > static void hsw_power_well_post_enable(struct intel_display *display, > - u8 irq_pipe_mask, bool has_vga) > + u8 irq_pipe_mask) > { > if (irq_pipe_mask) > gen8_irq_power_well_post_enable(display, irq_pipe_mask); > @@ -415,8 +415,7 @@ static void hsw_power_well_enable(struct intel_display *display, > } > > hsw_power_well_post_enable(display, > - power_well->desc->irq_pipe_mask, > - power_well->desc->has_vga); > + power_well->desc->irq_pipe_mask); > } > > static void hsw_power_well_disable(struct intel_display *display, > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.h b/drivers/gpu/drm/i915/display/intel_display_power_well.h > index ec8e508d0593..8f5524da2d06 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.h > @@ -103,8 +103,6 @@ struct i915_power_well_desc { > * the well enabled. > */ > u16 fixed_enable_delay:1; > - /* The pw is backing the VGA functionality */ > - u16 has_vga:1; > u16 has_fuses:1; > /* > * The pw is for an ICL+ TypeC PHY port in -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (2 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:28 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala ` (18 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Extract the GMCH_CTLR register offset determination into a helper rather than using a local varaible. I'll be needing this in another function soon. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 39c68aec647b..84fd5475d336 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -18,6 +18,11 @@ #include "intel_vga.h" #include "intel_vga_regs.h" +static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) +{ + return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; +} + static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) { if (display->platform.valleyview || display->platform.cherryview) @@ -98,10 +103,10 @@ void intel_vga_disable(struct intel_display *display) static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); - unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; u16 gmch_ctrl; - if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) { + if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), + intel_gmch_ctrl_reg(display), &gmch_ctrl)) { drm_err(display->drm, "failed to read control word\n"); return -EIO; } @@ -114,7 +119,8 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d else gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; - if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) { + if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), + intel_gmch_ctrl_reg(display), gmch_ctrl)) { drm_err(display->drm, "failed to write control word\n"); return -EIO; } -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() 2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala @ 2025-12-09 10:28 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:28 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Extract the GMCH_CTLR register offset determination into a helper > rather than using a local varaible. I'll be needing this in another > function soon. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 39c68aec647b..84fd5475d336 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -18,6 +18,11 @@ > #include "intel_vga.h" > #include "intel_vga_regs.h" > > +static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) > +{ > + return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; > +} > + > static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) > { > if (display->platform.valleyview || display->platform.cherryview) > @@ -98,10 +103,10 @@ void intel_vga_disable(struct intel_display *display) > static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > - unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; > u16 gmch_ctrl; > > - if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) { > + if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), > + intel_gmch_ctrl_reg(display), &gmch_ctrl)) { > drm_err(display->drm, "failed to read control word\n"); > return -EIO; > } > @@ -114,7 +119,8 @@ static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_d > else > gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; > > - if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) { > + if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), > + intel_gmch_ctrl_reg(display), gmch_ctrl)) { > drm_err(display->drm, "failed to write control word\n"); > return -EIO; > } -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (3 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:29 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala ` (17 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> On some systems the BIOS will disable the VGA decode logic in the iGPU (via GMCH_CTRL) when an external GPU is used as the primary VGA device. In that case the iGPU will never claim any VGA register accesses, and any access we do will in fact end up on the external GPU. Don't go poking around in the other GPUs registers. Note that (at least on the g4x board where I tested this) the BIOS forgets to set the VGACNTR VGA_DISP_DISABLE bit, and the reset value for said bit is 0. That apparently prevents the pipes from running, so we must still remember to set the bit, despite the VGA plane was never actually enabled. On more modern platforms (hsw+ maybe?) the reset value for VGACNTR was changed to have VGA_DISP_DISABLE already set. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 84fd5475d336..744812260ae3 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -23,6 +23,18 @@ static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; } +static bool intel_vga_decode_is_enabled(struct intel_display *display) +{ + struct pci_dev *pdev = to_pci_dev(display->drm->dev); + u16 gmch_ctrl = 0; + + if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), + intel_gmch_ctrl_reg(display), &gmch_ctrl)) + return false; + + return !(gmch_ctrl & INTEL_GMCH_VGA_DISABLE); +} + static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) { if (display->platform.valleyview || display->platform.cherryview) @@ -55,6 +67,17 @@ void intel_vga_disable(struct intel_display *display) u8 msr, sr1; u32 tmp; + if (!intel_vga_decode_is_enabled(display)) { + drm_dbg_kms(display->drm, "VGA decode is disabled\n"); + + /* + * On older hardware VGA_DISP_DISABLE defaults to 0, but + * it *must* be set or else the pipe will be completely + * stuck (at least on g4x). + */ + goto reset_vgacntr; + } + tmp = intel_de_read(display, vga_reg); if (tmp & VGA_DISP_DISABLE) return; @@ -96,6 +119,7 @@ void intel_vga_disable(struct intel_display *display) udelay(300); +reset_vgacntr: intel_de_write(display, vga_reg, VGA_DISP_DISABLE); intel_de_posting_read(display, vga_reg); } -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled 2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala @ 2025-12-09 10:29 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:29 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > On some systems the BIOS will disable the VGA decode logic in the > iGPU (via GMCH_CTRL) when an external GPU is used as the primary > VGA device. In that case the iGPU will never claim any VGA register > accesses, and any access we do will in fact end up on the external > GPU. Don't go poking around in the other GPUs registers. > > Note that (at least on the g4x board where I tested this) the BIOS > forgets to set the VGACNTR VGA_DISP_DISABLE bit, and the reset > value for said bit is 0. That apparently prevents the pipes from > running, so we must still remember to set the bit, despite the VGA > plane was never actually enabled. On more modern platforms (hsw+ > maybe?) the reset value for VGACNTR was changed to have > VGA_DISP_DISABLE already set. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> I'll take your word for it. Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 84fd5475d336..744812260ae3 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -23,6 +23,18 @@ static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) > return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; > } > > +static bool intel_vga_decode_is_enabled(struct intel_display *display) > +{ > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > + u16 gmch_ctrl = 0; > + > + if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), > + intel_gmch_ctrl_reg(display), &gmch_ctrl)) > + return false; > + > + return !(gmch_ctrl & INTEL_GMCH_VGA_DISABLE); > +} > + > static i915_reg_t intel_vga_cntrl_reg(struct intel_display *display) > { > if (display->platform.valleyview || display->platform.cherryview) > @@ -55,6 +67,17 @@ void intel_vga_disable(struct intel_display *display) > u8 msr, sr1; > u32 tmp; > > + if (!intel_vga_decode_is_enabled(display)) { > + drm_dbg_kms(display->drm, "VGA decode is disabled\n"); > + > + /* > + * On older hardware VGA_DISP_DISABLE defaults to 0, but > + * it *must* be set or else the pipe will be completely > + * stuck (at least on g4x). > + */ > + goto reset_vgacntr; > + } > + > tmp = intel_de_read(display, vga_reg); > if (tmp & VGA_DISP_DISABLE) > return; > @@ -96,6 +119,7 @@ void intel_vga_disable(struct intel_display *display) > > udelay(300); > > +reset_vgacntr: > intel_de_write(display, vga_reg, VGA_DISP_DISABLE); > intel_de_posting_read(display, vga_reg); > } -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (4 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:32 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala ` (16 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Turns out at least some systems (eg. HSW Lenovo ThinKCentre E73) confgiure the VGA registers even when booting in UEFI mode. So in order to avoid any issues with the MSR register we should clean up the VGA registers anyway. For now this mostly avoids the potential for unclaimed register acceses due to the power well vs. MDA/CGA selection. But this will become more important soon as we'll start to rely on the MSR register to control VGA memory decode as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 40 ++++++++++++++++-------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 744812260ae3..6a19fb242248 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -63,7 +63,6 @@ void intel_vga_disable(struct intel_display *display) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); - enum pipe pipe; u8 msr, sr1; u32 tmp; @@ -79,18 +78,33 @@ void intel_vga_disable(struct intel_display *display) } tmp = intel_de_read(display, vga_reg); - if (tmp & VGA_DISP_DISABLE) - return; - - if (display->platform.cherryview) - pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); - else if (has_vga_pipe_sel(display)) - pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); - else - pipe = PIPE_A; - - drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", - pipe_name(pipe)); + + if ((tmp & VGA_DISP_DISABLE) == 0) { + enum pipe pipe; + + if (display->platform.cherryview) + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); + else if (has_vga_pipe_sel(display)) + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); + else + pipe = PIPE_A; + + drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", + pipe_name(pipe)); + } else { + drm_dbg_kms(display->drm, "VGA plane is disabled\n"); + + /* + * Unfortunately at least some BIOSes (eg. HSW Lenovo + * ThinkCentre E73) set up the VGA registers even when + * in UEFI mode with the VGA plane disabled. So we need to + * always clean up the mess for iGPUs. For discrete GPUs we + * don't really care about the state of the VGA registers + * since all VGA accesses can be blocked via the bridge. + */ + if (display->platform.dgfx) + goto reset_vgacntr; + } /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled 2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala @ 2025-12-09 10:32 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:32 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Turns out at least some systems (eg. HSW Lenovo ThinKCentre E73) *ThinkCentre > confgiure the VGA registers even when booting in UEFI mode. So *configure > in order to avoid any issues with the MSR register we should > clean up the VGA registers anyway. > > For now this mostly avoids the potential for unclaimed register > acceses due to the power well vs. MDA/CGA selection. But this *accesses > will become more important soon as we'll start to rely on the > MSR register to control VGA memory decode as well. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> I'll take your word for it. Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 40 ++++++++++++++++-------- > 1 file changed, 27 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 744812260ae3..6a19fb242248 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -63,7 +63,6 @@ void intel_vga_disable(struct intel_display *display) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > - enum pipe pipe; > u8 msr, sr1; > u32 tmp; > > @@ -79,18 +78,33 @@ void intel_vga_disable(struct intel_display *display) > } > > tmp = intel_de_read(display, vga_reg); > - if (tmp & VGA_DISP_DISABLE) > - return; > - > - if (display->platform.cherryview) > - pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); > - else if (has_vga_pipe_sel(display)) > - pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); > - else > - pipe = PIPE_A; > - > - drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", > - pipe_name(pipe)); > + > + if ((tmp & VGA_DISP_DISABLE) == 0) { > + enum pipe pipe; > + > + if (display->platform.cherryview) > + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK_CHV, tmp); > + else if (has_vga_pipe_sel(display)) > + pipe = REG_FIELD_GET(VGA_PIPE_SEL_MASK, tmp); > + else > + pipe = PIPE_A; > + > + drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", > + pipe_name(pipe)); > + } else { > + drm_dbg_kms(display->drm, "VGA plane is disabled\n"); > + > + /* > + * Unfortunately at least some BIOSes (eg. HSW Lenovo > + * ThinkCentre E73) set up the VGA registers even when > + * in UEFI mode with the VGA plane disabled. So we need to > + * always clean up the mess for iGPUs. For discrete GPUs we > + * don't really care about the state of the VGA registers > + * since all VGA accesses can be blocked via the bridge. > + */ > + if (display->platform.dgfx) > + goto reset_vgacntr; > + } > > /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (5 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:35 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala ` (15 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Avoid using the VGA arbiter during intel_vga_get() for iGPUs because that will clobber the VGA routing for whatever external GPU is the current VGA device. That will cause all reads from VGA memory to come back as 0xff/white, and thus we get a white rectangle on screen when the external GPU switches from vgacon to fbcon. The iGPU has the highest VGA decode priority so it will steal all VGA register accesses whenever its IO decoding is enabled. We'll only keep the IO decode enabled for a short time so hopefully we don't end up eating too many unrelated VGA register accesses. For discrete GPUs we need all the bridges to have their VGA forwarding bits correctly configured so we can't really avoid the VGA arbiter there. Although we only do this stuff on dGPUs when the VGA plane was actaully enabled, so the dGPU should be the current VGA device and thus have VGA routed to it already anyway. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 54 ++++++++++++++++++++++-- 1 file changed, 50 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 6a19fb242248..a2a1c33d053e 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -58,11 +58,58 @@ static bool has_vga_pipe_sel(struct intel_display *display) return DISPLAY_VER(display) < 7; } +static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) +{ + u16 old = 0, cmd; + + pci_read_config_word(pdev, PCI_COMMAND, &old); + cmd = old & ~PCI_COMMAND_IO; + if (enable) + cmd |= PCI_COMMAND_IO; + pci_write_config_word(pdev, PCI_COMMAND, cmd); + + return old & PCI_COMMAND_IO; +} + +static bool intel_vga_get(struct intel_display *display) +{ + struct pci_dev *pdev = to_pci_dev(display->drm->dev); + + /* WaEnableVGAAccessThroughIOPort:ctg+ */ + + /* + * Bypass the VGA arbiter on the iGPU and just enable + * IO decode by hand. This avoids clobbering the VGA + * routing for an external GPU when it's the current + * VGA device, and thus prevents the all 0xff/white + * readout from VGA memory when taking over from vgacon. + * + * The iGPU has the highest VGA decode priority so it will + * grab any VGA IO access when IO decode is enabled, regardless + * of how any other VGA routing bits are configured. + */ + if (display->platform.dgfx) + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); + + return intel_pci_set_io_decode(pdev, true); +} + +static void intel_vga_put(struct intel_display *display, bool io_decode) +{ + struct pci_dev *pdev = to_pci_dev(display->drm->dev); + + /* see intel_vga_get() */ + intel_pci_set_io_decode(pdev, io_decode); + + if (display->platform.dgfx) + vga_put(pdev, VGA_RSRC_LEGACY_IO); +} + /* Disable the VGA plane that we never use */ void intel_vga_disable(struct intel_display *display) { - struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); + bool io_decode; u8 msr, sr1; u32 tmp; @@ -106,8 +153,7 @@ void intel_vga_disable(struct intel_display *display) goto reset_vgacntr; } - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); + io_decode = intel_vga_get(display); outb(0x01, VGA_SEQ_I); sr1 = inb(VGA_SEQ_D); @@ -129,7 +175,7 @@ void intel_vga_disable(struct intel_display *display) msr &= ~VGA_MIS_COLOR; outb(msr, VGA_MIS_W); - vga_put(pdev, VGA_RSRC_LEGACY_IO); + intel_vga_put(display, io_decode); udelay(300); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs 2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala @ 2025-12-09 10:35 ` Jani Nikula 2025-12-09 12:17 ` Ville Syrjälä 0 siblings, 1 reply; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:35 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Avoid using the VGA arbiter during intel_vga_get() for iGPUs because > that will clobber the VGA routing for whatever external GPU is the > current VGA device. That will cause all reads from VGA memory to > come back as 0xff/white, and thus we get a white rectangle on screen > when the external GPU switches from vgacon to fbcon. > > The iGPU has the highest VGA decode priority so it will steal all > VGA register accesses whenever its IO decoding is enabled. We'll only > keep the IO decode enabled for a short time so hopefully we don't > end up eating too many unrelated VGA register accesses. > > For discrete GPUs we need all the bridges to have their VGA forwarding > bits correctly configured so we can't really avoid the VGA arbiter > there. Although we only do this stuff on dGPUs when the VGA plane was > actaully enabled, so the dGPU should be the current VGA device > and thus have VGA routed to it already anyway. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Again, I'll take your word for it. Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 54 ++++++++++++++++++++++-- > 1 file changed, 50 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 6a19fb242248..a2a1c33d053e 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -58,11 +58,58 @@ static bool has_vga_pipe_sel(struct intel_display *display) > return DISPLAY_VER(display) < 7; > } > > +static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) > +{ > + u16 old = 0, cmd; > + > + pci_read_config_word(pdev, PCI_COMMAND, &old); > + cmd = old & ~PCI_COMMAND_IO; > + if (enable) > + cmd |= PCI_COMMAND_IO; > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > + > + return old & PCI_COMMAND_IO; > +} > + > +static bool intel_vga_get(struct intel_display *display) > +{ > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > + > + /* WaEnableVGAAccessThroughIOPort:ctg+ */ > + > + /* > + * Bypass the VGA arbiter on the iGPU and just enable > + * IO decode by hand. This avoids clobbering the VGA > + * routing for an external GPU when it's the current > + * VGA device, and thus prevents the all 0xff/white > + * readout from VGA memory when taking over from vgacon. > + * > + * The iGPU has the highest VGA decode priority so it will > + * grab any VGA IO access when IO decode is enabled, regardless > + * of how any other VGA routing bits are configured. > + */ > + if (display->platform.dgfx) > + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > + > + return intel_pci_set_io_decode(pdev, true); > +} > + > +static void intel_vga_put(struct intel_display *display, bool io_decode) > +{ > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > + > + /* see intel_vga_get() */ > + intel_pci_set_io_decode(pdev, io_decode); > + > + if (display->platform.dgfx) > + vga_put(pdev, VGA_RSRC_LEGACY_IO); > +} > + > /* Disable the VGA plane that we never use */ > void intel_vga_disable(struct intel_display *display) > { > - struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > + bool io_decode; > u8 msr, sr1; > u32 tmp; > > @@ -106,8 +153,7 @@ void intel_vga_disable(struct intel_display *display) > goto reset_vgacntr; > } > > - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > + io_decode = intel_vga_get(display); > > outb(0x01, VGA_SEQ_I); > sr1 = inb(VGA_SEQ_D); > @@ -129,7 +175,7 @@ void intel_vga_disable(struct intel_display *display) > msr &= ~VGA_MIS_COLOR; > outb(msr, VGA_MIS_W); > > - vga_put(pdev, VGA_RSRC_LEGACY_IO); > + intel_vga_put(display, io_decode); > > udelay(300); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs 2025-12-09 10:35 ` Jani Nikula @ 2025-12-09 12:17 ` Ville Syrjälä 0 siblings, 0 replies; 51+ messages in thread From: Ville Syrjälä @ 2025-12-09 12:17 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, intel-xe On Tue, Dec 09, 2025 at 12:35:15PM +0200, Jani Nikula wrote: > On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Avoid using the VGA arbiter during intel_vga_get() for iGPUs because > > that will clobber the VGA routing for whatever external GPU is the > > current VGA device. That will cause all reads from VGA memory to > > come back as 0xff/white, and thus we get a white rectangle on screen > > when the external GPU switches from vgacon to fbcon. > > > > The iGPU has the highest VGA decode priority so it will steal all > > VGA register accesses whenever its IO decoding is enabled. We'll only > > keep the IO decode enabled for a short time so hopefully we don't > > end up eating too many unrelated VGA register accesses. > > > > For discrete GPUs we need all the bridges to have their VGA forwarding > > bits correctly configured so we can't really avoid the VGA arbiter > > there. Although we only do this stuff on dGPUs when the VGA plane was > > actaully enabled, so the dGPU should be the current VGA device > > and thus have VGA routed to it already anyway. > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Again, I'll take your word for it. > > Acked-by: Jani Nikula <jani.nikula@intel.com> > After sleeping on this, I think the proper thing would be to change the VGA arbiter to be able to restore the previous VGA routing after the put(). But that'll be quite a bit of work, so this seems fine for now. > > > --- > > drivers/gpu/drm/i915/display/intel_vga.c | 54 ++++++++++++++++++++++-- > > 1 file changed, 50 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > > index 6a19fb242248..a2a1c33d053e 100644 > > --- a/drivers/gpu/drm/i915/display/intel_vga.c > > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > > @@ -58,11 +58,58 @@ static bool has_vga_pipe_sel(struct intel_display *display) > > return DISPLAY_VER(display) < 7; > > } > > > > +static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) > > +{ > > + u16 old = 0, cmd; > > + > > + pci_read_config_word(pdev, PCI_COMMAND, &old); > > + cmd = old & ~PCI_COMMAND_IO; > > + if (enable) > > + cmd |= PCI_COMMAND_IO; > > + pci_write_config_word(pdev, PCI_COMMAND, cmd); > > + > > + return old & PCI_COMMAND_IO; > > +} > > + > > +static bool intel_vga_get(struct intel_display *display) > > +{ > > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > > + > > + /* WaEnableVGAAccessThroughIOPort:ctg+ */ > > + > > + /* > > + * Bypass the VGA arbiter on the iGPU and just enable > > + * IO decode by hand. This avoids clobbering the VGA > > + * routing for an external GPU when it's the current > > + * VGA device, and thus prevents the all 0xff/white > > + * readout from VGA memory when taking over from vgacon. > > + * > > + * The iGPU has the highest VGA decode priority so it will > > + * grab any VGA IO access when IO decode is enabled, regardless > > + * of how any other VGA routing bits are configured. > > + */ > > + if (display->platform.dgfx) > > + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > > + > > + return intel_pci_set_io_decode(pdev, true); > > +} > > + > > +static void intel_vga_put(struct intel_display *display, bool io_decode) > > +{ > > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > > + > > + /* see intel_vga_get() */ > > + intel_pci_set_io_decode(pdev, io_decode); > > + > > + if (display->platform.dgfx) > > + vga_put(pdev, VGA_RSRC_LEGACY_IO); > > +} > > + > > /* Disable the VGA plane that we never use */ > > void intel_vga_disable(struct intel_display *display) > > { > > - struct pci_dev *pdev = to_pci_dev(display->drm->dev); > > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > > + bool io_decode; > > u8 msr, sr1; > > u32 tmp; > > > > @@ -106,8 +153,7 @@ void intel_vga_disable(struct intel_display *display) > > goto reset_vgacntr; > > } > > > > - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ > > - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); > > + io_decode = intel_vga_get(display); > > > > outb(0x01, VGA_SEQ_I); > > sr1 = inb(VGA_SEQ_D); > > @@ -129,7 +175,7 @@ void intel_vga_disable(struct intel_display *display) > > msr &= ~VGA_MIS_COLOR; > > outb(msr, VGA_MIS_W); > > > > - vga_put(pdev, VGA_RSRC_LEGACY_IO); > > + intel_vga_put(display, io_decode); > > > > udelay(300); > > -- > Jani Nikula, Intel -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (6 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:39 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala ` (14 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> intel_gmch_vga_set_state() is a complete lie on ILK+ because the GMCH_CTRL register is locked and can't actually be written. But we still need to remove the iGPU from the VGA arbitration on iGPU+dGPU systems, or else Xorg performace will tank due to the constant VGA arbiter accesess. For VGA memory decode we can't turn off the PCI_COMMAND memory deocde as that would disable even normal MMIO. Instead we can disable just the VGA memory decode via the VGA MSR register. And we can do that just once when disablign the VGA plane. That way we don't have to touch VGA registers anywhere else. We can also inform the arbiter that we're no longer decding VGA memory. This will stop the arbitter from disabling all memory decode for the iGPU via PCI_COMMAND (and thus breaking everything) whenever some other GPU wants to own the VGA memory accesses. For IO we can disable all IO decode via the PCI_COMMAND register, except around the few VGA register accesses that we need to do in intel_vga_disable(). Unfortunately we can't disable IO decode permanently as it makes some laptops (eg. Dell Latitude E5400) hang during reboot/shutdown. One option would be to re-enable IO decode from the poweroff hooks, but that won't help the sysrq emergency reboot/shutdown since it won't call said hooks. So let's try to keep IO decode in its original setting unless we really need to disable it to exclude the GPU from VGA arbitration. I suppose we could keep frobbing GMCH_CTRL on pre-ILK, but it seems better to not do it since it has other side effects such as changing the class code of the PCI device. For discrete GPUs we'll rely on the bridge control instead. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 93 +++++++++++++++--------- 1 file changed, 57 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index a2a1c33d053e..f2f7d396c556 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -71,6 +71,19 @@ static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) return old & PCI_COMMAND_IO; } +static bool intel_pci_bridge_set_vga(struct pci_dev *pdev, bool enable) +{ + u16 old = 0, ctl; + + pci_read_config_word(pdev->bus->self, PCI_BRIDGE_CONTROL, &old); + ctl = old & ~PCI_BRIDGE_CTL_VGA; + if (enable) + ctl |= PCI_BRIDGE_CTL_VGA; + pci_write_config_word(pdev->bus->self, PCI_BRIDGE_CONTROL, ctl); + + return old & PCI_BRIDGE_CTL_VGA; +} + static bool intel_vga_get(struct intel_display *display) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); @@ -108,6 +121,7 @@ static void intel_vga_put(struct intel_display *display, bool io_decode) /* Disable the VGA plane that we never use */ void intel_vga_disable(struct intel_display *display) { + struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); bool io_decode; u8 msr, sr1; @@ -160,6 +174,12 @@ void intel_vga_disable(struct intel_display *display) outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); msr = inb(VGA_MIS_R); + /* + * Always disable VGA memory decode for iGPU so that + * intel_vga_set_decode() doesn't need to access VGA registers. + * VGA_MIS_ENB_MEM_ACCESS=0 is also the reset value. + */ + msr &= ~VGA_MIS_ENB_MEM_ACCESS; /* * VGA_MIS_COLOR controls both GPU level and display engine level * MDA vs. CGA decode logic. But when the register gets reset @@ -177,6 +197,14 @@ void intel_vga_disable(struct intel_display *display) intel_vga_put(display, io_decode); + /* + * Inform the arbiter about VGA memory decode being disabled so + * that it doesn't disable all memory decode for the iGPU when + * targeting another GPU. + */ + if (!display->platform.dgfx) + vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO); + udelay(300); reset_vgacntr: @@ -184,45 +212,38 @@ void intel_vga_disable(struct intel_display *display) intel_de_posting_read(display, vga_reg); } -static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) -{ - struct pci_dev *pdev = to_pci_dev(display->drm->dev); - u16 gmch_ctrl; - - if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), - intel_gmch_ctrl_reg(display), &gmch_ctrl)) { - drm_err(display->drm, "failed to read control word\n"); - return -EIO; - } - - if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode) - return 0; - - if (enable_decode) - gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; - else - gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; - - if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), - intel_gmch_ctrl_reg(display), gmch_ctrl)) { - drm_err(display->drm, "failed to write control word\n"); - return -EIO; - } - - return 0; -} - -static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode) +static unsigned int intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) { struct intel_display *display = to_intel_display(pdev); + unsigned int decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; - intel_gmch_vga_set_state(display, enable_decode); + drm_dbg_kms(display->drm, "%s VGA decode due to VGA arbitration\n", + str_enable_disable(enable_decode)); - if (enable_decode) - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; - else - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; + /* + * Can't use GMCH_CTRL INTEL_GMCH_VGA_DISABLE to disable VGA + * decode on ILK+ since the register is locked. Instead + * intel_disable_vga() will disable VGA memory decode for the + * iGPU, and here we just need to take care of the IO decode. + * For discrete GPUs we rely on the bridge VGA control. + * + * We can't disable IO decode already in intel_vga_disable() + * because at least some laptops (eg. CTG Dell Latitude E5400) + * will hang during reboot/shutfown with IO decode disabled. + */ + if (display->platform.dgfx) { + if (!enable_decode) + intel_pci_bridge_set_vga(pdev, false); + else + decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; + } else { + if (!enable_decode) + intel_pci_set_io_decode(pdev, false); + else + decodes |= VGA_RSRC_LEGACY_IO; + } + + return decodes; } void intel_vga_register(struct intel_display *display) @@ -239,7 +260,7 @@ void intel_vga_register(struct intel_display *display) * then we do not take part in VGA arbitration and the * vga_client_register() fails with -ENODEV. */ - ret = vga_client_register(pdev, intel_gmch_vga_set_decode); + ret = vga_client_register(pdev, intel_vga_set_decode); drm_WARN_ON(display->drm, ret && ret != -ENODEV); } -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control 2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala @ 2025-12-09 10:39 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:39 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > intel_gmch_vga_set_state() is a complete lie on ILK+ because > the GMCH_CTRL register is locked and can't actually be written. > But we still need to remove the iGPU from the VGA arbitration > on iGPU+dGPU systems, or else Xorg performace will tank due *performance > to the constant VGA arbiter accesess. *accesses > > For VGA memory decode we can't turn off the PCI_COMMAND > memory deocde as that would disable even normal MMIO. *decode > Instead we can disable just the VGA memory decode via > the VGA MSR register. And we can do that just once > when disablign the VGA plane. That way we don't have *disabling > to touch VGA registers anywhere else. > > We can also inform the arbiter that we're no longer decding *decoding > VGA memory. This will stop the arbitter from disabling all *arbiter > memory decode for the iGPU via PCI_COMMAND (and thus breaking > everything) whenever some other GPU wants to own the VGA memory > accesses. > > For IO we can disable all IO decode via the PCI_COMMAND > register, except around the few VGA register accesses that > we need to do in intel_vga_disable(). Unfortunately we can't > disable IO decode permanently as it makes some laptops (eg. > Dell Latitude E5400) hang during reboot/shutdown. One option > would be to re-enable IO decode from the poweroff hooks, but > that won't help the sysrq emergency reboot/shutdown since it > won't call said hooks. So let's try to keep IO decode in its > original setting unless we really need to disable it to > exclude the GPU from VGA arbitration. > > I suppose we could keep frobbing GMCH_CTRL on pre-ILK, but > it seems better to not do it since it has other side effects > such as changing the class code of the PCI device. > > For discrete GPUs we'll rely on the bridge control instead. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 93 +++++++++++++++--------- > 1 file changed, 57 insertions(+), 36 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index a2a1c33d053e..f2f7d396c556 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -71,6 +71,19 @@ static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) > return old & PCI_COMMAND_IO; > } > > +static bool intel_pci_bridge_set_vga(struct pci_dev *pdev, bool enable) > +{ > + u16 old = 0, ctl; > + > + pci_read_config_word(pdev->bus->self, PCI_BRIDGE_CONTROL, &old); > + ctl = old & ~PCI_BRIDGE_CTL_VGA; > + if (enable) > + ctl |= PCI_BRIDGE_CTL_VGA; > + pci_write_config_word(pdev->bus->self, PCI_BRIDGE_CONTROL, ctl); > + > + return old & PCI_BRIDGE_CTL_VGA; > +} > + > static bool intel_vga_get(struct intel_display *display) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > @@ -108,6 +121,7 @@ static void intel_vga_put(struct intel_display *display, bool io_decode) > /* Disable the VGA plane that we never use */ > void intel_vga_disable(struct intel_display *display) > { > + struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > bool io_decode; > u8 msr, sr1; > @@ -160,6 +174,12 @@ void intel_vga_disable(struct intel_display *display) > outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); > > msr = inb(VGA_MIS_R); > + /* > + * Always disable VGA memory decode for iGPU so that > + * intel_vga_set_decode() doesn't need to access VGA registers. > + * VGA_MIS_ENB_MEM_ACCESS=0 is also the reset value. > + */ > + msr &= ~VGA_MIS_ENB_MEM_ACCESS; > /* > * VGA_MIS_COLOR controls both GPU level and display engine level > * MDA vs. CGA decode logic. But when the register gets reset > @@ -177,6 +197,14 @@ void intel_vga_disable(struct intel_display *display) > > intel_vga_put(display, io_decode); > > + /* > + * Inform the arbiter about VGA memory decode being disabled so > + * that it doesn't disable all memory decode for the iGPU when > + * targeting another GPU. > + */ > + if (!display->platform.dgfx) > + vga_set_legacy_decoding(pdev, VGA_RSRC_LEGACY_IO); > + > udelay(300); > > reset_vgacntr: > @@ -184,45 +212,38 @@ void intel_vga_disable(struct intel_display *display) > intel_de_posting_read(display, vga_reg); > } > > -static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode) > -{ > - struct pci_dev *pdev = to_pci_dev(display->drm->dev); > - u16 gmch_ctrl; > - > - if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), > - intel_gmch_ctrl_reg(display), &gmch_ctrl)) { > - drm_err(display->drm, "failed to read control word\n"); > - return -EIO; > - } > - > - if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode) > - return 0; > - > - if (enable_decode) > - gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; > - else > - gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; > - > - if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), > - intel_gmch_ctrl_reg(display), gmch_ctrl)) { > - drm_err(display->drm, "failed to write control word\n"); > - return -EIO; > - } > - > - return 0; > -} > - > -static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode) > +static unsigned int intel_vga_set_decode(struct pci_dev *pdev, bool enable_decode) > { > struct intel_display *display = to_intel_display(pdev); > + unsigned int decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > > - intel_gmch_vga_set_state(display, enable_decode); > + drm_dbg_kms(display->drm, "%s VGA decode due to VGA arbitration\n", > + str_enable_disable(enable_decode)); > > - if (enable_decode) > - return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | > - VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > - else > - return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; > + /* > + * Can't use GMCH_CTRL INTEL_GMCH_VGA_DISABLE to disable VGA > + * decode on ILK+ since the register is locked. Instead > + * intel_disable_vga() will disable VGA memory decode for the > + * iGPU, and here we just need to take care of the IO decode. > + * For discrete GPUs we rely on the bridge VGA control. > + * > + * We can't disable IO decode already in intel_vga_disable() > + * because at least some laptops (eg. CTG Dell Latitude E5400) > + * will hang during reboot/shutfown with IO decode disabled. > + */ > + if (display->platform.dgfx) { > + if (!enable_decode) > + intel_pci_bridge_set_vga(pdev, false); > + else > + decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM; > + } else { > + if (!enable_decode) > + intel_pci_set_io_decode(pdev, false); > + else > + decodes |= VGA_RSRC_LEGACY_IO; > + } > + > + return decodes; > } > > void intel_vga_register(struct intel_display *display) > @@ -239,7 +260,7 @@ void intel_vga_register(struct intel_display *display) > * then we do not take part in VGA arbitration and the > * vga_client_register() fails with -ENODEV. > */ > - ret = vga_client_register(pdev, intel_gmch_vga_set_decode); > + ret = vga_client_register(pdev, intel_vga_set_decode); > drm_WARN_ON(display->drm, ret && ret != -ENODEV); > } -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (7 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:40 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala ` (13 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> We want out VGA register accesses to land on the correct GPU. Check that the VGA routing is appropriately configured. For the iGPU this just means the IO decode enable on the GPU, but for dGPUs we also need the entire chain of bridges to forward the VGA accesses. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index f2f7d396c556..e51451966f72 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -58,6 +58,28 @@ static bool has_vga_pipe_sel(struct intel_display *display) return DISPLAY_VER(display) < 7; } +static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev) +{ + u16 cmd = 0; + + pci_read_config_word(pdev, PCI_COMMAND, &cmd); + if ((cmd & PCI_COMMAND_IO) == 0) + return false; + + pdev = pdev->bus->self; + while (pdev) { + u16 ctl = 0; + + pci_read_config_word(pdev, PCI_BRIDGE_CONTROL, &ctl); + if ((ctl & PCI_BRIDGE_CTL_VGA) == 0) + return false; + + pdev = pdev->bus->self; + } + + return true; +} + static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) { u16 old = 0, cmd; @@ -169,6 +191,8 @@ void intel_vga_disable(struct intel_display *display) io_decode = intel_vga_get(display); + drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); + outb(0x01, VGA_SEQ_I); sr1 = inb(VGA_SEQ_D); outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU 2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala @ 2025-12-09 10:40 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:40 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > We want out VGA register accesses to land on the correct GPU. our? > Check that the VGA routing is appropriately configured. > > For the iGPU this just means the IO decode enable on the GPU, but > for dGPUs we also need the entire chain of bridges to forward the > VGA accesses. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index f2f7d396c556..e51451966f72 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -58,6 +58,28 @@ static bool has_vga_pipe_sel(struct intel_display *display) > return DISPLAY_VER(display) < 7; > } > > +static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev) > +{ > + u16 cmd = 0; > + > + pci_read_config_word(pdev, PCI_COMMAND, &cmd); > + if ((cmd & PCI_COMMAND_IO) == 0) > + return false; > + > + pdev = pdev->bus->self; > + while (pdev) { > + u16 ctl = 0; > + > + pci_read_config_word(pdev, PCI_BRIDGE_CONTROL, &ctl); > + if ((ctl & PCI_BRIDGE_CTL_VGA) == 0) > + return false; > + > + pdev = pdev->bus->self; > + } > + > + return true; > +} > + > static bool intel_pci_set_io_decode(struct pci_dev *pdev, bool enable) > { > u16 old = 0, cmd; > @@ -169,6 +191,8 @@ void intel_vga_disable(struct intel_display *display) > > io_decode = intel_vga_get(display); > > + drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); > + > outb(0x01, VGA_SEQ_I); > sr1 = inb(VGA_SEQ_D); > outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (8 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:47 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala ` (12 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> intel_de_read8() is only needed for VGA register MMIO access by the CRT code on gen2/3. Remove the redundant wakelock stuff, and add a platform check to make sure this won't get used on any platform where MMIO VGA register accesses don't work. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_de.h | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index a7ce3b875e06..5c1b37d30045 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -6,6 +6,8 @@ #ifndef __INTEL_DE_H__ #define __INTEL_DE_H__ +#include <drm/drm_print.h> + #include "intel_display_core.h" #include "intel_dmc_wl.h" #include "intel_dsb.h" @@ -34,15 +36,10 @@ intel_de_read(struct intel_display *display, i915_reg_t reg) static inline u8 intel_de_read8(struct intel_display *display, i915_reg_t reg) { - u8 val; + /* this is only used on VGA registers (possible on pre-g4x) */ + drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x); - intel_dmc_wl_get(display, reg); - - val = intel_uncore_read8(__to_uncore(display), reg); - - intel_dmc_wl_put(display, reg); - - return val; + return intel_uncore_read8(__to_uncore(display), reg); } static inline u64 -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() 2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala @ 2025-12-09 10:47 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:47 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > intel_de_read8() is only needed for VGA register MMIO access > by the CRT code on gen2/3. Remove the redundant wakelock stuff, > and add a platform check to make sure this won't get used on > any platform where MMIO VGA register accesses don't work. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Not a fan of adding the extra dep on drm_print.h as I've tried hard to remove it from headers all over the place to uncover the implicit dependencies. Oh well, maybe this will be addressed in the upcoming mmio series? Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_de.h | 13 +++++-------- > 1 file changed, 5 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h > index a7ce3b875e06..5c1b37d30045 100644 > --- a/drivers/gpu/drm/i915/display/intel_de.h > +++ b/drivers/gpu/drm/i915/display/intel_de.h > @@ -6,6 +6,8 @@ > #ifndef __INTEL_DE_H__ > #define __INTEL_DE_H__ > > +#include <drm/drm_print.h> > + > #include "intel_display_core.h" > #include "intel_dmc_wl.h" > #include "intel_dsb.h" > @@ -34,15 +36,10 @@ intel_de_read(struct intel_display *display, i915_reg_t reg) > static inline u8 > intel_de_read8(struct intel_display *display, i915_reg_t reg) > { > - u8 val; > + /* this is only used on VGA registers (possible on pre-g4x) */ > + drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x); > > - intel_dmc_wl_get(display, reg); > - > - val = intel_uncore_read8(__to_uncore(display), reg); > - > - intel_dmc_wl_put(display, reg); > - > - return val; > + return intel_uncore_read8(__to_uncore(display), reg); > } > > static inline u64 -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 11/19] drm/i915/de: Add intel_de_write8() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (9 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:49 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala ` (11 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a write counterpart to intel_de_read8(). Will be used for MMIO access to VGA registers on pre-g4x. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_de.h | 8 ++++++++ drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h | 8 ++++++++ drivers/gpu/drm/xe/xe_mmio.c | 9 +++++++++ drivers/gpu/drm/xe/xe_mmio.h | 1 + 4 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h index 5c1b37d30045..f30f3f8ebee1 100644 --- a/drivers/gpu/drm/i915/display/intel_de.h +++ b/drivers/gpu/drm/i915/display/intel_de.h @@ -42,6 +42,14 @@ intel_de_read8(struct intel_display *display, i915_reg_t reg) return intel_uncore_read8(__to_uncore(display), reg); } +static inline void +intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val) +{ + drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x); + + intel_uncore_write8(__to_uncore(display), reg, val); +} + static inline u64 intel_de_read64_2x32(struct intel_display *display, i915_reg_t lower_reg, i915_reg_t upper_reg) diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h index d93ddacdf743..02b096bd7a4c 100644 --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h @@ -40,6 +40,14 @@ static inline u8 intel_uncore_read8(struct intel_uncore *uncore, return xe_mmio_read8(__compat_uncore_to_mmio(uncore), reg); } +static inline void intel_uncore_write8(struct intel_uncore *uncore, + i915_reg_t i915_reg, u8 val) +{ + struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); + + xe_mmio_write8(__compat_uncore_to_mmio(uncore), reg, val); +} + static inline u16 intel_uncore_read16(struct intel_uncore *uncore, i915_reg_t i915_reg) { diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index 350dca1f0925..6bdaedc1da73 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -158,6 +158,15 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) return val; } +void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val) +{ + u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr); + + trace_xe_reg_rw(mmio, true, addr, val, sizeof(val)); + + writeb(val, mmio->regs + addr); +} + u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) { u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr); diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h index 15362789ab99..cd355a43af3d 100644 --- a/drivers/gpu/drm/xe/xe_mmio.h +++ b/drivers/gpu/drm/xe/xe_mmio.h @@ -17,6 +17,7 @@ int xe_mmio_probe_tiles(struct xe_device *xe); void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size); u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg); +void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val); u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg); void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val); u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 11/19] drm/i915/de: Add intel_de_write8() 2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala @ 2025-12-09 10:49 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:49 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Add a write counterpart to intel_de_read8(). Will be used for > MMIO access to VGA registers on pre-g4x. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_de.h | 8 ++++++++ > drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h | 8 ++++++++ > drivers/gpu/drm/xe/xe_mmio.c | 9 +++++++++ > drivers/gpu/drm/xe/xe_mmio.h | 1 + > 4 files changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h > index 5c1b37d30045..f30f3f8ebee1 100644 > --- a/drivers/gpu/drm/i915/display/intel_de.h > +++ b/drivers/gpu/drm/i915/display/intel_de.h > @@ -42,6 +42,14 @@ intel_de_read8(struct intel_display *display, i915_reg_t reg) > return intel_uncore_read8(__to_uncore(display), reg); > } > > +static inline void > +intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val) > +{ > + drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 5 || display->platform.g4x); > + > + intel_uncore_write8(__to_uncore(display), reg, val); > +} > + > static inline u64 > intel_de_read64_2x32(struct intel_display *display, > i915_reg_t lower_reg, i915_reg_t upper_reg) > diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h > index d93ddacdf743..02b096bd7a4c 100644 > --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h > +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h > @@ -40,6 +40,14 @@ static inline u8 intel_uncore_read8(struct intel_uncore *uncore, > return xe_mmio_read8(__compat_uncore_to_mmio(uncore), reg); > } > > +static inline void intel_uncore_write8(struct intel_uncore *uncore, > + i915_reg_t i915_reg, u8 val) > +{ > + struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg)); > + > + xe_mmio_write8(__compat_uncore_to_mmio(uncore), reg, val); > +} > + > static inline u16 intel_uncore_read16(struct intel_uncore *uncore, > i915_reg_t i915_reg) > { > diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c > index 350dca1f0925..6bdaedc1da73 100644 > --- a/drivers/gpu/drm/xe/xe_mmio.c > +++ b/drivers/gpu/drm/xe/xe_mmio.c > @@ -158,6 +158,15 @@ u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg) > return val; > } > > +void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val) > +{ > + u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr); > + > + trace_xe_reg_rw(mmio, true, addr, val, sizeof(val)); > + > + writeb(val, mmio->regs + addr); > +} > + > u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg) > { > u32 addr = xe_mmio_adjusted_addr(mmio, reg.addr); > diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h > index 15362789ab99..cd355a43af3d 100644 > --- a/drivers/gpu/drm/xe/xe_mmio.h > +++ b/drivers/gpu/drm/xe/xe_mmio.h > @@ -17,6 +17,7 @@ int xe_mmio_probe_tiles(struct xe_device *xe); > void xe_mmio_init(struct xe_mmio *mmio, struct xe_tile *tile, void __iomem *ptr, u32 size); > > u8 xe_mmio_read8(struct xe_mmio *mmio, struct xe_reg reg); > +void xe_mmio_write8(struct xe_mmio *mmio, struct xe_reg reg, u8 val); > u16 xe_mmio_read16(struct xe_mmio *mmio, struct xe_reg reg); > void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val); > u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (10 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:52 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala ` (10 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> VGA register are rather special since they either get accessed via the global IO addresses, or possibly through MMIO on pre-g4x platforms. Wrap all VGA register accesses in intel_vga_{read,write}() to make it obvious where they get accessed. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_crt.c | 6 +++-- drivers/gpu/drm/i915/display/intel_crt_regs.h | 2 -- drivers/gpu/drm/i915/display/intel_vga.c | 27 +++++++++++++++---- drivers/gpu/drm/i915/display/intel_vga.h | 3 +++ 4 files changed, 29 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index 5f9a03877ea9..dedc26f6a2b2 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -33,6 +33,7 @@ #include <drm/drm_edid.h> #include <drm/drm_print.h> #include <drm/drm_probe_helper.h> +#include <video/vga.h> #include "intel_connector.h" #include "intel_crt.h" @@ -55,6 +56,7 @@ #include "intel_pch_display.h" #include "intel_pch_refclk.h" #include "intel_pfit.h" +#include "intel_vga.h" /* Here's the desired hotplug mode */ #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_ENABLE | \ @@ -736,7 +738,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) * border color for Color info. */ intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); - st00 = intel_de_read8(display, _VGA_MSR_WRITE); + st00 = intel_vga_read(display, VGA_MIS_W, true); status = ((st00 & (1 << 4)) != 0) ? connector_status_connected : connector_status_disconnected; @@ -784,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) do { count++; /* Read the ST00 VGA status register */ - st00 = intel_de_read8(display, _VGA_MSR_WRITE); + st00 = intel_vga_read(display, VGA_MIS_W, true); if (st00 & (1 << 4)) detect++; } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); diff --git a/drivers/gpu/drm/i915/display/intel_crt_regs.h b/drivers/gpu/drm/i915/display/intel_crt_regs.h index 571a67ae9afa..9a93020b9a7e 100644 --- a/drivers/gpu/drm/i915/display/intel_crt_regs.h +++ b/drivers/gpu/drm/i915/display/intel_crt_regs.h @@ -45,6 +45,4 @@ #define ADPA_VSYNC_ACTIVE_HIGH REG_BIT(4) #define ADPA_HSYNC_ACTIVE_HIGH REG_BIT(3) -#define _VGA_MSR_WRITE _MMIO(0x3c2) - #endif /* __INTEL_CRT_REGS_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index e51451966f72..c1942520c765 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -140,6 +140,22 @@ static void intel_vga_put(struct intel_display *display, bool io_decode) vga_put(pdev, VGA_RSRC_LEGACY_IO); } +u8 intel_vga_read(struct intel_display *display, u16 reg, bool mmio) +{ + if (mmio) + return intel_de_read8(display, _MMIO(reg)); + else + return inb(reg); +} + +static void intel_vga_write(struct intel_display *display, u16 reg, u8 val, bool mmio) +{ + if (mmio) + intel_de_write8(display, _MMIO(reg), val); + else + outb(val, reg); +} + /* Disable the VGA plane that we never use */ void intel_vga_disable(struct intel_display *display) { @@ -193,11 +209,12 @@ void intel_vga_disable(struct intel_display *display) drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); - outb(0x01, VGA_SEQ_I); - sr1 = inb(VGA_SEQ_D); - outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); + intel_vga_write(display, VGA_SEQ_I, 0x01, false); + sr1 = intel_vga_read(display, VGA_SEQ_D, false); + sr1 |= VGA_SR01_SCREEN_OFF; + intel_vga_write(display, VGA_SEQ_D, sr1, false); - msr = inb(VGA_MIS_R); + msr = intel_vga_read(display, VGA_MIS_R, false); /* * Always disable VGA memory decode for iGPU so that * intel_vga_set_decode() doesn't need to access VGA registers. @@ -217,7 +234,7 @@ void intel_vga_disable(struct intel_display *display) * RMbus NoClaim errors. */ msr &= ~VGA_MIS_COLOR; - outb(msr, VGA_MIS_W); + intel_vga_write(display, VGA_MIS_W, msr, false); intel_vga_put(display, io_decode); diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h index 80084265c6cd..72131cb536cd 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.h +++ b/drivers/gpu/drm/i915/display/intel_vga.h @@ -6,8 +6,11 @@ #ifndef __INTEL_VGA_H__ #define __INTEL_VGA_H__ +#include <linux/types.h> + struct intel_display; +u8 intel_vga_read(struct intel_display *display, u16 reg, bool mmio); void intel_vga_reset_io_mem(struct intel_display *display); void intel_vga_disable(struct intel_display *display); void intel_vga_register(struct intel_display *display); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() 2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala @ 2025-12-09 10:52 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:52 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > VGA register are rather special since they either get accessed > via the global IO addresses, or possibly through MMIO on > pre-g4x platforms. Wrap all VGA register accesses in > intel_vga_{read,write}() to make it obvious where they get > accessed. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_crt.c | 6 +++-- > drivers/gpu/drm/i915/display/intel_crt_regs.h | 2 -- > drivers/gpu/drm/i915/display/intel_vga.c | 27 +++++++++++++++---- > drivers/gpu/drm/i915/display/intel_vga.h | 3 +++ > 4 files changed, 29 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > index 5f9a03877ea9..dedc26f6a2b2 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -33,6 +33,7 @@ > #include <drm/drm_edid.h> > #include <drm/drm_print.h> > #include <drm/drm_probe_helper.h> > +#include <video/vga.h> > > #include "intel_connector.h" > #include "intel_crt.h" > @@ -55,6 +56,7 @@ > #include "intel_pch_display.h" > #include "intel_pch_refclk.h" > #include "intel_pfit.h" > +#include "intel_vga.h" > > /* Here's the desired hotplug mode */ > #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_ENABLE | \ > @@ -736,7 +738,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > * border color for Color info. > */ > intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); > - st00 = intel_de_read8(display, _VGA_MSR_WRITE); > + st00 = intel_vga_read(display, VGA_MIS_W, true); > status = ((st00 & (1 << 4)) != 0) ? > connector_status_connected : > connector_status_disconnected; > @@ -784,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > do { > count++; > /* Read the ST00 VGA status register */ > - st00 = intel_de_read8(display, _VGA_MSR_WRITE); > + st00 = intel_vga_read(display, VGA_MIS_W, true); > if (st00 & (1 << 4)) > detect++; > } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); > diff --git a/drivers/gpu/drm/i915/display/intel_crt_regs.h b/drivers/gpu/drm/i915/display/intel_crt_regs.h > index 571a67ae9afa..9a93020b9a7e 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_crt_regs.h > @@ -45,6 +45,4 @@ > #define ADPA_VSYNC_ACTIVE_HIGH REG_BIT(4) > #define ADPA_HSYNC_ACTIVE_HIGH REG_BIT(3) > > -#define _VGA_MSR_WRITE _MMIO(0x3c2) > - > #endif /* __INTEL_CRT_REGS_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index e51451966f72..c1942520c765 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -140,6 +140,22 @@ static void intel_vga_put(struct intel_display *display, bool io_decode) > vga_put(pdev, VGA_RSRC_LEGACY_IO); > } > > +u8 intel_vga_read(struct intel_display *display, u16 reg, bool mmio) > +{ > + if (mmio) > + return intel_de_read8(display, _MMIO(reg)); > + else > + return inb(reg); > +} > + > +static void intel_vga_write(struct intel_display *display, u16 reg, u8 val, bool mmio) > +{ > + if (mmio) > + intel_de_write8(display, _MMIO(reg), val); > + else > + outb(val, reg); > +} > + > /* Disable the VGA plane that we never use */ > void intel_vga_disable(struct intel_display *display) > { > @@ -193,11 +209,12 @@ void intel_vga_disable(struct intel_display *display) > > drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); > > - outb(0x01, VGA_SEQ_I); > - sr1 = inb(VGA_SEQ_D); > - outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); > + intel_vga_write(display, VGA_SEQ_I, 0x01, false); > + sr1 = intel_vga_read(display, VGA_SEQ_D, false); > + sr1 |= VGA_SR01_SCREEN_OFF; > + intel_vga_write(display, VGA_SEQ_D, sr1, false); > > - msr = inb(VGA_MIS_R); > + msr = intel_vga_read(display, VGA_MIS_R, false); > /* > * Always disable VGA memory decode for iGPU so that > * intel_vga_set_decode() doesn't need to access VGA registers. > @@ -217,7 +234,7 @@ void intel_vga_disable(struct intel_display *display) > * RMbus NoClaim errors. > */ > msr &= ~VGA_MIS_COLOR; > - outb(msr, VGA_MIS_W); > + intel_vga_write(display, VGA_MIS_W, msr, false); > > intel_vga_put(display, io_decode); > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.h b/drivers/gpu/drm/i915/display/intel_vga.h > index 80084265c6cd..72131cb536cd 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.h > +++ b/drivers/gpu/drm/i915/display/intel_vga.h > @@ -6,8 +6,11 @@ > #ifndef __INTEL_VGA_H__ > #define __INTEL_VGA_H__ > > +#include <linux/types.h> > + > struct intel_display; > > +u8 intel_vga_read(struct intel_display *display, u16 reg, bool mmio); > void intel_vga_reset_io_mem(struct intel_display *display); > void intel_vga_disable(struct intel_display *display); > void intel_vga_register(struct intel_display *display); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (11 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:53 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala ` (9 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> On pre-g4x VGA registers are accessible via MMIO. Make use of it so that we can avoid dealing with the VGA arbiter. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 33 ++++++++++++++++-------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index c1942520c765..9e1f3ab632d5 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -58,6 +58,12 @@ static bool has_vga_pipe_sel(struct intel_display *display) return DISPLAY_VER(display) < 7; } +static bool has_vga_mmio_access(struct intel_display *display) +{ + /* WaEnableVGAAccessThroughIOPort:ctg+ */ + return DISPLAY_VER(display) < 5 && !display->platform.g4x; +} + static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev) { u16 cmd = 0; @@ -106,11 +112,12 @@ static bool intel_pci_bridge_set_vga(struct pci_dev *pdev, bool enable) return old & PCI_BRIDGE_CTL_VGA; } -static bool intel_vga_get(struct intel_display *display) +static bool intel_vga_get(struct intel_display *display, bool mmio) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); - /* WaEnableVGAAccessThroughIOPort:ctg+ */ + if (mmio) + return false; /* * Bypass the VGA arbiter on the iGPU and just enable @@ -129,10 +136,13 @@ static bool intel_vga_get(struct intel_display *display) return intel_pci_set_io_decode(pdev, true); } -static void intel_vga_put(struct intel_display *display, bool io_decode) +static void intel_vga_put(struct intel_display *display, bool io_decode, bool mmio) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); + if (mmio) + return; + /* see intel_vga_get() */ intel_pci_set_io_decode(pdev, io_decode); @@ -161,6 +171,7 @@ void intel_vga_disable(struct intel_display *display) { struct pci_dev *pdev = to_pci_dev(display->drm->dev); i915_reg_t vga_reg = intel_vga_cntrl_reg(display); + bool mmio = has_vga_mmio_access(display); bool io_decode; u8 msr, sr1; u32 tmp; @@ -205,16 +216,16 @@ void intel_vga_disable(struct intel_display *display) goto reset_vgacntr; } - io_decode = intel_vga_get(display); + io_decode = intel_vga_get(display, mmio); - drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); + drm_WARN_ON(display->drm, !mmio && !intel_pci_has_vga_io_decode(pdev)); - intel_vga_write(display, VGA_SEQ_I, 0x01, false); - sr1 = intel_vga_read(display, VGA_SEQ_D, false); + intel_vga_write(display, VGA_SEQ_I, 0x01, mmio); + sr1 = intel_vga_read(display, VGA_SEQ_D, mmio); sr1 |= VGA_SR01_SCREEN_OFF; - intel_vga_write(display, VGA_SEQ_D, sr1, false); + intel_vga_write(display, VGA_SEQ_D, sr1, mmio); - msr = intel_vga_read(display, VGA_MIS_R, false); + msr = intel_vga_read(display, VGA_MIS_R, mmio); /* * Always disable VGA memory decode for iGPU so that * intel_vga_set_decode() doesn't need to access VGA registers. @@ -234,9 +245,9 @@ void intel_vga_disable(struct intel_display *display) * RMbus NoClaim errors. */ msr &= ~VGA_MIS_COLOR; - intel_vga_write(display, VGA_MIS_W, msr, false); + intel_vga_write(display, VGA_MIS_W, msr, mmio); - intel_vga_put(display, io_decode); + intel_vga_put(display, io_decode, mmio); /* * Inform the arbiter about VGA memory decode being disabled so -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x 2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala @ 2025-12-09 10:53 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:53 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > On pre-g4x VGA registers are accessible via MMIO. Make use of > it so that we can avoid dealing with the VGA arbiter. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 33 ++++++++++++++++-------- > 1 file changed, 22 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index c1942520c765..9e1f3ab632d5 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -58,6 +58,12 @@ static bool has_vga_pipe_sel(struct intel_display *display) > return DISPLAY_VER(display) < 7; > } > > +static bool has_vga_mmio_access(struct intel_display *display) > +{ > + /* WaEnableVGAAccessThroughIOPort:ctg+ */ > + return DISPLAY_VER(display) < 5 && !display->platform.g4x; > +} > + > static bool intel_pci_has_vga_io_decode(struct pci_dev *pdev) > { > u16 cmd = 0; > @@ -106,11 +112,12 @@ static bool intel_pci_bridge_set_vga(struct pci_dev *pdev, bool enable) > return old & PCI_BRIDGE_CTL_VGA; > } > > -static bool intel_vga_get(struct intel_display *display) > +static bool intel_vga_get(struct intel_display *display, bool mmio) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > > - /* WaEnableVGAAccessThroughIOPort:ctg+ */ > + if (mmio) > + return false; > > /* > * Bypass the VGA arbiter on the iGPU and just enable > @@ -129,10 +136,13 @@ static bool intel_vga_get(struct intel_display *display) > return intel_pci_set_io_decode(pdev, true); > } > > -static void intel_vga_put(struct intel_display *display, bool io_decode) > +static void intel_vga_put(struct intel_display *display, bool io_decode, bool mmio) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > > + if (mmio) > + return; > + > /* see intel_vga_get() */ > intel_pci_set_io_decode(pdev, io_decode); > > @@ -161,6 +171,7 @@ void intel_vga_disable(struct intel_display *display) > { > struct pci_dev *pdev = to_pci_dev(display->drm->dev); > i915_reg_t vga_reg = intel_vga_cntrl_reg(display); > + bool mmio = has_vga_mmio_access(display); > bool io_decode; > u8 msr, sr1; > u32 tmp; > @@ -205,16 +216,16 @@ void intel_vga_disable(struct intel_display *display) > goto reset_vgacntr; > } > > - io_decode = intel_vga_get(display); > + io_decode = intel_vga_get(display, mmio); > > - drm_WARN_ON(display->drm, !intel_pci_has_vga_io_decode(pdev)); > + drm_WARN_ON(display->drm, !mmio && !intel_pci_has_vga_io_decode(pdev)); > > - intel_vga_write(display, VGA_SEQ_I, 0x01, false); > - sr1 = intel_vga_read(display, VGA_SEQ_D, false); > + intel_vga_write(display, VGA_SEQ_I, 0x01, mmio); > + sr1 = intel_vga_read(display, VGA_SEQ_D, mmio); > sr1 |= VGA_SR01_SCREEN_OFF; > - intel_vga_write(display, VGA_SEQ_D, sr1, false); > + intel_vga_write(display, VGA_SEQ_D, sr1, mmio); > > - msr = intel_vga_read(display, VGA_MIS_R, false); > + msr = intel_vga_read(display, VGA_MIS_R, mmio); > /* > * Always disable VGA memory decode for iGPU so that > * intel_vga_set_decode() doesn't need to access VGA registers. > @@ -234,9 +245,9 @@ void intel_vga_disable(struct intel_display *display) > * RMbus NoClaim errors. > */ > msr &= ~VGA_MIS_COLOR; > - intel_vga_write(display, VGA_MIS_W, msr, false); > + intel_vga_write(display, VGA_MIS_W, msr, mmio); > > - intel_vga_put(display, io_decode); > + intel_vga_put(display, io_decode, mmio); > > /* > * Inform the arbiter about VGA memory decode being disabled so -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (12 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-08 21:07 ` kernel test robot ` (5 more replies) 2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala ` (8 subsequent siblings) 22 siblings, 6 replies; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe, Helge Deller, linux-fbdev, dri-devel From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a proper name for the "Input status register 0" IO address. Currently we have some code that does read addressed using the aliasing VGA_MSR_W define, making it unclear what register we're actually reading. Cc: Helge Deller <deller@gmx.de> Cc: linux-fbdev@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/video/vga.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/video/vga.h b/include/video/vga.h index 468764d6727a..d83c5f153253 100644 --- a/include/video/vga.h +++ b/include/video/vga.h @@ -46,6 +46,7 @@ #define VGA_MIS_R 0x3CC /* Misc Output Read Register */ #define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ #define VGA_FTC_R 0x3CA /* Feature Control Read Register */ +#define VGA_IS0_R 0x3C2 /* Input Status Register 0 */ #define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ #define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ #define VGA_PEL_D 0x3C9 /* PEL Data Register */ @@ -485,3 +486,4 @@ static inline void vga_mm_wattr (void __iomem *regbase, unsigned char reg, unsig } #endif /* __linux_video_vga_h__ */ +? -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala @ 2025-12-08 21:07 ` kernel test robot 2025-12-08 21:18 ` kernel test robot ` (4 subsequent siblings) 5 siblings, 0 replies; 51+ messages in thread From: kernel test robot @ 2025-12-08 21:07 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Cc: oe-kbuild-all, intel-xe, Helge Deller, linux-fbdev, dri-devel Hi Ville, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] [cannot apply to drm-i915/for-linux-next drm-i915/for-linux-next-fixes linus/master v6.18 next-20251208] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-vga-Register-vgaarb-client-later/20251209-030730 base: https://gitlab.freedesktop.org/drm/tip.git drm-tip patch link: https://lore.kernel.org/r/20251208182637.334-15-ville.syrjala%40linux.intel.com patch subject: [PATCH 14/19] video/vga: Add VGA_IS0_R config: microblaze-randconfig-r072-20251209 (https://download.01.org/0day-ci/archive/20251209/202512090434.DRy1Kvan-lkp@intel.com/config) compiler: microblaze-linux-gcc (GCC) 8.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251209/202512090434.DRy1Kvan-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202512090434.DRy1Kvan-lkp@intel.com/ All error/warnings (new ones prefixed by >>): In file included from include/linux/vgaarb.h:15, from drivers/video/aperture.c:12: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from drivers/video/aperture.c:14: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ drivers/video/aperture.c: In function 'devm_aperture_acquire_release': >> drivers/video/aperture.c:153:21: error: dereferencing pointer to incomplete type 'struct aperture_range' bool detached = !ap->dev; ^~ In file included from include/linux/bits.h:30, from include/linux/ratelimit_types.h:5, from include/linux/ratelimit.h:5, from include/linux/dev_printk.h:16, from include/linux/device.h:15, from drivers/video/aperture.c:4: drivers/video/aperture.c: In function 'devm_aperture_acquire': >> include/linux/container_of.h:21:47: error: dereferencing pointer to incomplete type 'struct aperture_range' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~ include/linux/build_bug.h:78:56: note: in definition of macro '__static_assert' #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) ^~~~ include/linux/container_of.h:21:2: note: in expansion of macro 'static_assert' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~~~ include/linux/container_of.h:21:16: note: in expansion of macro '__same_type' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~ drivers/video/aperture.c:174:8: note: in expansion of macro 'container_of' ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ include/linux/compiler_types.h:537:27: error: expression in static assertion is not an integer #define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/linux/build_bug.h:78:56: note: in definition of macro '__static_assert' #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) ^~~~ include/linux/container_of.h:21:2: note: in expansion of macro 'static_assert' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~~~ include/linux/container_of.h:21:16: note: in expansion of macro '__same_type' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~ drivers/video/aperture.c:174:8: note: in expansion of macro 'container_of' ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ In file included from include/uapi/linux/posix_types.h:5, from include/uapi/linux/types.h:14, from include/linux/types.h:6, from include/linux/aperture.h:6, from drivers/video/aperture.c:3: >> include/linux/stddef.h:16:32: error: invalid use of undefined type 'struct aperture_range' #define offsetof(TYPE, MEMBER) __builtin_offsetof(TYPE, MEMBER) ^~~~~~~~~~~~~~~~~~ include/linux/container_of.h:24:21: note: in expansion of macro 'offsetof' ((type *)(__mptr - offsetof(type, member))); }) ^~~~~~~~ drivers/video/aperture.c:174:8: note: in expansion of macro 'container_of' ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ In file included from include/linux/bits.h:30, from include/linux/ratelimit_types.h:5, from include/linux/ratelimit.h:5, from include/linux/dev_printk.h:16, from include/linux/device.h:15, from drivers/video/aperture.c:4: drivers/video/aperture.c: In function 'aperture_detach_devices': >> include/linux/container_of.h:21:47: error: dereferencing pointer to incomplete type 'struct aperture_range' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~ include/linux/build_bug.h:78:56: note: in definition of macro '__static_assert' #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) ^~~~ include/linux/container_of.h:21:2: note: in expansion of macro 'static_assert' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~~~ include/linux/container_of.h:21:16: note: in expansion of macro '__same_type' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~ drivers/video/aperture.c:255:31: note: in expansion of macro 'container_of' struct aperture_range *ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ include/linux/compiler_types.h:537:27: error: expression in static assertion is not an integer #define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/linux/build_bug.h:78:56: note: in definition of macro '__static_assert' #define __static_assert(expr, msg, ...) _Static_assert(expr, msg) ^~~~ include/linux/container_of.h:21:2: note: in expansion of macro 'static_assert' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~~~ include/linux/container_of.h:21:16: note: in expansion of macro '__same_type' static_assert(__same_type(*(ptr), ((type *)0)->member) || \ ^~~~~~~~~~~ drivers/video/aperture.c:255:31: note: in expansion of macro 'container_of' struct aperture_range *ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ In file included from include/uapi/linux/posix_types.h:5, from include/uapi/linux/types.h:14, from include/linux/types.h:6, from include/linux/aperture.h:6, from drivers/video/aperture.c:3: >> include/linux/stddef.h:16:32: error: invalid use of undefined type 'struct aperture_range' #define offsetof(TYPE, MEMBER) __builtin_offsetof(TYPE, MEMBER) ^~~~~~~~~~~~~~~~~~ include/linux/container_of.h:24:21: note: in expansion of macro 'offsetof' ((type *)(__mptr - offsetof(type, member))); }) ^~~~~~~~ drivers/video/aperture.c:255:31: note: in expansion of macro 'container_of' struct aperture_range *ap = container_of(pos, struct aperture_range, lh); ^~~~~~~~~~~~ -- In file included from drivers/gpu/drm/mgag200/mgag200_drv.h:13, from drivers/gpu/drm/mgag200/mgag200_bmc.c:10: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from include/linux/dma-buf.h:16, from include/drm/drm_gem.h:38, from drivers/gpu/drm/mgag200/mgag200_drv.h:18, from drivers/gpu/drm/mgag200/mgag200_bmc.c:10: >> include/linux/iosys-map.h:183:47: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_set_vaddr(struct iosys_map *map, void *vaddr) ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_set_vaddr': >> include/linux/iosys-map.h:185:5: error: dereferencing pointer to incomplete type 'struct iosys_map' map->vaddr = vaddr; ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:196:53: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_set_vaddr_iomem(struct iosys_map *map, ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_set_vaddr_iomem': include/linux/iosys-map.h:199:5: error: dereferencing pointer to incomplete type 'struct iosys_map' map->vaddr_iomem = vaddr_iomem; ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:214:52: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline bool iosys_map_is_equal(const struct iosys_map *lhs, ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_is_equal': >> include/linux/iosys-map.h:217:9: error: dereferencing pointer to incomplete type 'const struct iosys_map' if (lhs->is_iomem != rhs->is_iomem) ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:235:51: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline bool iosys_map_is_null(const struct iosys_map *map) ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_is_null': include/linux/iosys-map.h:237:9: error: dereferencing pointer to incomplete type 'const struct iosys_map' if (map->is_iomem) ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:252:50: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline bool iosys_map_is_set(const struct iosys_map *map) ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_is_set': >> include/linux/iosys-map.h:254:28: error: passing argument 1 of 'iosys_map_is_null' from incompatible pointer type [-Werror=incompatible-pointer-types] return !iosys_map_is_null(map); ^~~ include/linux/iosys-map.h:235:62: note: expected 'const struct iosys_map *' but argument is of type 'const struct iosys_map *' static inline bool iosys_map_is_null(const struct iosys_map *map) ~~~~~~~~~~~~~~~~~~~~~~~~^~~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:265:43: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_clear(struct iosys_map *map) ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_clear': include/linux/iosys-map.h:267:24: error: dereferencing pointer to incomplete type 'struct iosys_map' memset(map, 0, sizeof(*map)); ^~~~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:281:47: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_memcpy_to(struct iosys_map *dst, size_t dst_offset, ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_memcpy_to': include/linux/iosys-map.h:284:9: error: dereferencing pointer to incomplete type 'struct iosys_map' if (dst->is_iomem) ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:301:66: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_memcpy_from(void *dst, const struct iosys_map *src, ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_memcpy_from': include/linux/iosys-map.h:304:9: error: dereferencing pointer to incomplete type 'const struct iosys_map' if (src->is_iomem) ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:318:42: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_incr(struct iosys_map *map, size_t incr) ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_incr': include/linux/iosys-map.h:320:9: error: dereferencing pointer to incomplete type 'struct iosys_map' if (map->is_iomem) ^~ include/linux/iosys-map.h: At top level: include/linux/iosys-map.h:336:44: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration static inline void iosys_map_memset(struct iosys_map *dst, size_t offset, ^~~~~~~~~ include/linux/iosys-map.h: In function 'iosys_map_memset': include/linux/iosys-map.h:339:9: error: dereferencing pointer to incomplete type 'struct iosys_map' if (dst->is_iomem) ^~ In file included from include/drm/drm_gem.h:38, from drivers/gpu/drm/mgag200/mgag200_drv.h:18, from drivers/gpu/drm/mgag200/mgag200_bmc.c:10: include/linux/dma-buf.h: At top level: >> include/linux/dma-buf.h:277:45: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration int (*vmap)(struct dma_buf *dmabuf, struct iosys_map *map); ^~~~~~~~~ include/linux/dma-buf.h:278:48: warning: 'struct iosys_map' declared inside parameter list will not be visible outside of this definition or declaration void (*vunmap)(struct dma_buf *dmabuf, struct iosys_map *map); ^~~~~~~~~ >> include/linux/dma-buf.h:332:19: error: field 'vmap_ptr' has incomplete type struct iosys_map vmap_ptr; ^~~~~~~~ cc1: some warnings being treated as errors -- In file included from drivers/gpu/drm/mgag200/mgag200_drv.h:13, from drivers/gpu/drm/mgag200/mgag200_ddc.c:36: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ -- In file included from drivers/gpu/drm/mgag200/mgag200_drv.h:13, from drivers/gpu/drm/mgag200/mgag200_drv.c:25: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from include/linux/dma-buf.h:16, from include/drm/drm_gem.h:38, from drivers/gpu/drm/mgag200/mgag200_drv.h:18, from drivers/gpu/drm/mgag200/mgag200_drv.c:25: include/linux/iosys-map.h: In function 'iosys_map_set_vaddr': >> include/linux/iosys-map.h:185:5: error: dereferencing pointer to incomplete type 'struct iosys_map' map->vaddr = vaddr; ^~ include/linux/iosys-map.h: In function 'iosys_map_is_equal': >> include/linux/iosys-map.h:217:9: error: dereferencing pointer to incomplete type 'const struct iosys_map' if (lhs->is_iomem != rhs->is_iomem) ^~ In file included from include/drm/drm_gem.h:38, from drivers/gpu/drm/mgag200/mgag200_drv.h:18, from drivers/gpu/drm/mgag200/mgag200_drv.c:25: include/linux/dma-buf.h: At top level: >> include/linux/dma-buf.h:332:19: error: field 'vmap_ptr' has incomplete type struct iosys_map vmap_ptr; ^~~~~~~~ -- In file included from drivers/gpu/drm/tiny/bochs.c:29: >> include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from include/linux/module.h:23, from drivers/gpu/drm/tiny/bochs.c:5: drivers/gpu/drm/tiny/bochs.c: In function '__check_modeset': >> drivers/gpu/drm/tiny/bochs.c:66:29: error: 'bochs_modeset' undeclared (first use in this function); did you mean 'drm_mode_set'? module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~ include/linux/moduleparam.h:430:68: note: in definition of macro '__param_check' static inline type __always_unused *__check_##name(void) { return(p); } ^ include/linux/moduleparam.h:155:2: note: in expansion of macro 'param_check_int' param_check_##type(name, &(value)); \ ^~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:29: note: each undeclared identifier is reported only once for each function it appears in module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~ include/linux/moduleparam.h:430:68: note: in definition of macro '__param_check' static inline type __always_unused *__check_##name(void) { return(p); } ^ include/linux/moduleparam.h:155:2: note: in expansion of macro 'param_check_int' param_check_##type(name, &(value)); \ ^~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c: At top level: >> drivers/gpu/drm/tiny/bochs.c:66:29: error: 'bochs_modeset' undeclared here (not in a function); did you mean 'drm_mode_set'? module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~ include/linux/moduleparam.h:298:54: note: in definition of macro '__module_param_call' VERIFY_OCTAL_PERMISSIONS(perm), level, flags, { arg } } ^~~ include/linux/moduleparam.h:156:2: note: in expansion of macro 'module_param_cb' module_param_cb(name, ¶m_ops_##type, &value, perm); \ ^~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' module_param_named(modeset, bochs_modeset, int, 0444); ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c: In function 'bochs_pci_driver_init': drivers/gpu/drm/tiny/bochs.c:835:1: warning: control reaches end of non-void function [-Wreturn-type] drm_module_pci_driver_if_modeset(bochs_pci_driver, bochs_modeset); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .. vim +489 include/video/vga.h 487 488 #endif /* __linux_video_vga_h__ */ > 489 ? -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala 2025-12-08 21:07 ` kernel test robot @ 2025-12-08 21:18 ` kernel test robot 2025-12-08 22:22 ` kernel test robot ` (3 subsequent siblings) 5 siblings, 0 replies; 51+ messages in thread From: kernel test robot @ 2025-12-08 21:18 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Cc: llvm, oe-kbuild-all, intel-xe, Helge Deller, linux-fbdev, dri-devel Hi Ville, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] [cannot apply to drm-i915/for-linux-next drm-i915/for-linux-next-fixes linus/master v6.18 next-20251208] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-vga-Register-vgaarb-client-later/20251209-030730 base: https://gitlab.freedesktop.org/drm/tip.git drm-tip patch link: https://lore.kernel.org/r/20251208182637.334-15-ville.syrjala%40linux.intel.com patch subject: [PATCH 14/19] video/vga: Add VGA_IS0_R config: x86_64-allnoconfig (https://download.01.org/0day-ci/archive/20251209/202512090554.7pZ9xOQ5-lkp@intel.com/config) compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251209/202512090554.7pZ9xOQ5-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202512090554.7pZ9xOQ5-lkp@intel.com/ All errors (new ones prefixed by >>): In file included from drivers/video/console/vgacon.c:51: >> include/video/vga.h:489:1: error: expected identifier or '(' 489 | ? | ^ >> drivers/video/console/vgacon.c:126:25: error: use of undeclared identifier 'vga_lock'; did you mean 'pgd_lock'? 126 | raw_spin_lock_irqsave(&vga_lock, flags); | ^~~~~~~~ | pgd_lock include/linux/spinlock.h:266:26: note: expanded from macro 'raw_spin_lock_irqsave' 266 | _raw_spin_lock_irqsave(lock, flags); \ | ^ include/linux/spinlock_api_up.h:69:60: note: expanded from macro '_raw_spin_lock_irqsave' 69 | #define _raw_spin_lock_irqsave(lock, flags) __LOCK_IRQSAVE(lock, flags) | ^ include/linux/spinlock_api_up.h:40:38: note: expanded from macro '__LOCK_IRQSAVE' 40 | do { local_irq_save(flags); __LOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:31:35: note: expanded from macro '__LOCK' 31 | do { preempt_disable(); ___LOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:28:32: note: expanded from macro '___LOCK' 28 | do { __acquire(lock); (void)(lock); } while (0) | ^ arch/x86/include/asm/pgtable.h:58:19: note: 'pgd_lock' declared here 58 | extern spinlock_t pgd_lock; | ^ drivers/video/console/vgacon.c:131:30: error: use of undeclared identifier 'vga_lock'; did you mean 'pgd_lock'? 131 | raw_spin_unlock_irqrestore(&vga_lock, flags); | ^~~~~~~~ | pgd_lock include/linux/spinlock.h:282:31: note: expanded from macro 'raw_spin_unlock_irqrestore' 282 | _raw_spin_unlock_irqrestore(lock, flags); \ | ^ include/linux/spinlock_api_up.h:86:26: note: expanded from macro '_raw_spin_unlock_irqrestore' 86 | __UNLOCK_IRQRESTORE(lock, flags) | ^ include/linux/spinlock_api_up.h:56:43: note: expanded from macro '__UNLOCK_IRQRESTORE' 56 | do { local_irq_restore(flags); __UNLOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:46:36: note: expanded from macro '__UNLOCK' 46 | do { preempt_enable(); ___UNLOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:43:32: note: expanded from macro '___UNLOCK' 43 | do { __release(lock); (void)(lock); } while (0) | ^ arch/x86/include/asm/pgtable.h:58:19: note: 'pgd_lock' declared here 58 | extern spinlock_t pgd_lock; | ^ drivers/video/console/vgacon.c:485:25: error: use of undeclared identifier 'vga_lock'; did you mean 'pgd_lock'? 485 | raw_spin_lock_irqsave(&vga_lock, flags); | ^~~~~~~~ | pgd_lock include/linux/spinlock.h:266:26: note: expanded from macro 'raw_spin_lock_irqsave' 266 | _raw_spin_lock_irqsave(lock, flags); \ | ^ include/linux/spinlock_api_up.h:69:60: note: expanded from macro '_raw_spin_lock_irqsave' 69 | #define _raw_spin_lock_irqsave(lock, flags) __LOCK_IRQSAVE(lock, flags) | ^ include/linux/spinlock_api_up.h:40:38: note: expanded from macro '__LOCK_IRQSAVE' 40 | do { local_irq_save(flags); __LOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:31:35: note: expanded from macro '__LOCK' 31 | do { preempt_disable(); ___LOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:28:32: note: expanded from macro '___LOCK' 28 | do { __acquire(lock); (void)(lock); } while (0) | ^ arch/x86/include/asm/pgtable.h:58:19: note: 'pgd_lock' declared here 58 | extern spinlock_t pgd_lock; | ^ drivers/video/console/vgacon.c:503:30: error: use of undeclared identifier 'vga_lock'; did you mean 'pgd_lock'? 503 | raw_spin_unlock_irqrestore(&vga_lock, flags); | ^~~~~~~~ | pgd_lock include/linux/spinlock.h:282:31: note: expanded from macro 'raw_spin_unlock_irqrestore' 282 | _raw_spin_unlock_irqrestore(lock, flags); \ | ^ include/linux/spinlock_api_up.h:86:26: note: expanded from macro '_raw_spin_unlock_irqrestore' 86 | __UNLOCK_IRQRESTORE(lock, flags) | ^ include/linux/spinlock_api_up.h:56:43: note: expanded from macro '__UNLOCK_IRQRESTORE' 56 | do { local_irq_restore(flags); __UNLOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:46:36: note: expanded from macro '__UNLOCK' 46 | do { preempt_enable(); ___UNLOCK(lock); } while (0) | ^ include/linux/spinlock_api_up.h:43:32: note: expanded from macro '___UNLOCK' 43 | do { __release(lock); (void)(lock); } while (0) | ^ arch/x86/include/asm/pgtable.h:58:19: note: 'pgd_lock' declared here 58 | extern spinlock_t pgd_lock; | ^ drivers/video/console/vgacon.c:563:25: error: use of undeclared identifier 'vga_lock'; did you mean 'pgd_lock'? 563 | raw_spin_lock_irqsave(&vga_lock, flags); | ^~~~~~~~ | pgd_lock include/linux/spinlock.h:266:26: note: expanded from macro 'raw_spin_lock_irqsave' 266 | _raw_spin_lock_irqsave(lock, flags); \ | ^ include/linux/spinlock_api_up.h:69:60: note: expanded from macro '_raw_spin_lock_irqsave' 69 | #define _raw_spin_lock_irqsave(lock, flags) __LOCK_IRQSAVE(lock, flags) | ^ include/linux/spinlock_api_up.h:40:38: note: expanded from macro '__LOCK_IRQSAVE' 40 | do { local_irq_save(flags); __LOCK(lock); } while (0) | ^ vim +489 include/video/vga.h 487 488 #endif /* __linux_video_vga_h__ */ > 489 ? -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala 2025-12-08 21:07 ` kernel test robot 2025-12-08 21:18 ` kernel test robot @ 2025-12-08 22:22 ` kernel test robot 2025-12-09 7:55 ` [PATCH v2 " Ville Syrjala ` (2 subsequent siblings) 5 siblings, 0 replies; 51+ messages in thread From: kernel test robot @ 2025-12-08 22:22 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Cc: oe-kbuild-all, intel-xe, Helge Deller, linux-fbdev, dri-devel Hi Ville, kernel test robot noticed the following build warnings: [auto build test WARNING on drm-tip/drm-tip] [cannot apply to drm-i915/for-linux-next drm-i915/for-linux-next-fixes linus/master v6.18 next-20251208] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-vga-Register-vgaarb-client-later/20251209-030730 base: https://gitlab.freedesktop.org/drm/tip.git drm-tip patch link: https://lore.kernel.org/r/20251208182637.334-15-ville.syrjala%40linux.intel.com patch subject: [PATCH 14/19] video/vga: Add VGA_IS0_R config: i386-randconfig-141-20251209 (https://download.01.org/0day-ci/archive/20251209/202512090603.ycfxEuHJ-lkp@intel.com/config) compiler: gcc-14 (Debian 14.2.0-19) 14.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251209/202512090603.ycfxEuHJ-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202512090603.ycfxEuHJ-lkp@intel.com/ All warnings (new ones prefixed by >>): In file included from drivers/gpu/drm/tiny/bochs.c:29: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token 489 | ? | ^ In file included from include/linux/module.h:23, from drivers/gpu/drm/tiny/bochs.c:5: drivers/gpu/drm/tiny/bochs.c: In function '__check_modeset': drivers/gpu/drm/tiny/bochs.c:66:29: error: 'bochs_modeset' undeclared (first use in this function) 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~ include/linux/moduleparam.h:430:75: note: in definition of macro '__param_check' 430 | static inline type __always_unused *__check_##name(void) { return(p); } | ^ include/linux/moduleparam.h:155:9: note: in expansion of macro 'param_check_int' 155 | param_check_##type(name, &(value)); \ | ^~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:29: note: each undeclared identifier is reported only once for each function it appears in 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~ include/linux/moduleparam.h:430:75: note: in definition of macro '__param_check' 430 | static inline type __always_unused *__check_##name(void) { return(p); } | ^ include/linux/moduleparam.h:155:9: note: in expansion of macro 'param_check_int' 155 | param_check_##type(name, &(value)); \ | ^~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c: At top level: drivers/gpu/drm/tiny/bochs.c:66:29: error: 'bochs_modeset' undeclared here (not in a function) 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~ include/linux/moduleparam.h:298:61: note: in definition of macro '__module_param_call' 298 | VERIFY_OCTAL_PERMISSIONS(perm), level, flags, { arg } } | ^~~ include/linux/moduleparam.h:156:9: note: in expansion of macro 'module_param_cb' 156 | module_param_cb(name, ¶m_ops_##type, &value, perm); \ | ^~~~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:66:1: note: in expansion of macro 'module_param_named' 66 | module_param_named(modeset, bochs_modeset, int, 0444); | ^~~~~~~~~~~~~~~~~~ In file included from include/linux/device.h:32, from include/linux/pci.h:37, from drivers/gpu/drm/tiny/bochs.c:6: drivers/gpu/drm/tiny/bochs.c: In function 'bochs_pci_driver_init': >> include/linux/device/driver.h:261:1: warning: control reaches end of non-void function [-Wreturn-type] 261 | } \ | ^ include/drm/drm_module.h:93:9: note: in expansion of macro 'module_driver' 93 | module_driver(__pci_drv, drm_pci_register_driver_if_modeset, \ | ^~~~~~~~~~~~~ drivers/gpu/drm/tiny/bochs.c:835:1: note: in expansion of macro 'drm_module_pci_driver_if_modeset' 835 | drm_module_pci_driver_if_modeset(bochs_pci_driver, bochs_modeset); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ vim +261 include/linux/device/driver.h 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 242 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 243 /** 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 244 * module_driver() - Helper macro for drivers that don't do anything 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 245 * special in module init/exit. This eliminates a lot of boilerplate. 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 246 * Each module may only use this macro once, and calling it replaces 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 247 * module_init() and module_exit(). 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 248 * 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 249 * @__driver: driver name 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 250 * @__register: register function for this driver type 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 251 * @__unregister: unregister function for this driver type 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 252 * @...: Additional arguments to be passed to __register and __unregister. 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 253 * 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 254 * Use this macro to construct bus specific macros for registering 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 255 * drivers, and do not use it on its own. 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 256 */ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 257 #define module_driver(__driver, __register, __unregister, ...) \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 258 static int __init __driver##_init(void) \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 259 { \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 260 return __register(&(__driver) , ##__VA_ARGS__); \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 @261 } \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 262 module_init(__driver##_init); \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 263 static void __exit __driver##_exit(void) \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 264 { \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 265 __unregister(&(__driver) , ##__VA_ARGS__); \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 266 } \ 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 267 module_exit(__driver##_exit); 4c002c978b7f2f Greg Kroah-Hartman 2019-12-09 268 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH v2 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala ` (2 preceding siblings ...) 2025-12-08 22:22 ` kernel test robot @ 2025-12-09 7:55 ` Ville Syrjala 2025-12-09 10:55 ` Jani Nikula 2025-12-10 14:13 ` [PATCH " kernel test robot 2025-12-10 14:24 ` kernel test robot 5 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-09 7:55 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe, Helge Deller, linux-fbdev, dri-devel From: Ville Syrjälä <ville.syrjala@linux.intel.com> Add a proper name for the "Input status register 0" IO address. Currently we have some code that does read addressed using the aliasing VGA_MSR_W define, making it unclear what register we're actually reading. v2: Remove stray '?' Cc: Helge Deller <deller@gmx.de> Cc: linux-fbdev@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/video/vga.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/video/vga.h b/include/video/vga.h index 468764d6727a..2f13c371800b 100644 --- a/include/video/vga.h +++ b/include/video/vga.h @@ -46,6 +46,7 @@ #define VGA_MIS_R 0x3CC /* Misc Output Read Register */ #define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ #define VGA_FTC_R 0x3CA /* Feature Control Read Register */ +#define VGA_IS0_R 0x3C2 /* Input Status Register 0 */ #define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ #define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ #define VGA_PEL_D 0x3C9 /* PEL Data Register */ -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH v2 14/19] video/vga: Add VGA_IS0_R 2025-12-09 7:55 ` [PATCH v2 " Ville Syrjala @ 2025-12-09 10:55 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:55 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Helge Deller, linux-fbdev, dri-devel On Tue, 09 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Add a proper name for the "Input status register 0" IO address. > Currently we have some code that does read addressed using the > aliasing VGA_MSR_W define, making it unclear what register we're > actually reading. > > v2: Remove stray '?' > > Cc: Helge Deller <deller@gmx.de> > Cc: linux-fbdev@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > include/video/vga.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/include/video/vga.h b/include/video/vga.h > index 468764d6727a..2f13c371800b 100644 > --- a/include/video/vga.h > +++ b/include/video/vga.h > @@ -46,6 +46,7 @@ > #define VGA_MIS_R 0x3CC /* Misc Output Read Register */ > #define VGA_MIS_W 0x3C2 /* Misc Output Write Register */ > #define VGA_FTC_R 0x3CA /* Feature Control Read Register */ > +#define VGA_IS0_R 0x3C2 /* Input Status Register 0 */ > #define VGA_IS1_RC 0x3DA /* Input Status Register 1 - color emulation */ > #define VGA_IS1_RM 0x3BA /* Input Status Register 1 - mono emulation */ > #define VGA_PEL_D 0x3C9 /* PEL Data Register */ -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala ` (3 preceding siblings ...) 2025-12-09 7:55 ` [PATCH v2 " Ville Syrjala @ 2025-12-10 14:13 ` kernel test robot 2025-12-10 14:24 ` kernel test robot 5 siblings, 0 replies; 51+ messages in thread From: kernel test robot @ 2025-12-10 14:13 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Cc: oe-kbuild-all, intel-xe, Helge Deller, linux-fbdev, dri-devel Hi Ville, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] [cannot apply to drm-i915/for-linux-next drm-i915/for-linux-next-fixes drm-xe/drm-xe-next linus/master v6.18 next-20251210] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-vga-Register-vgaarb-client-later/20251209-195929 base: https://gitlab.freedesktop.org/drm/tip.git drm-tip patch link: https://lore.kernel.org/r/20251208182637.334-15-ville.syrjala%40linux.intel.com patch subject: [PATCH 14/19] video/vga: Add VGA_IS0_R config: parisc-randconfig-002-20251210 (https://download.01.org/0day-ci/archive/20251210/202512102159.xsvvXCXy-lkp@intel.com/config) compiler: hppa-linux-gcc (GCC) 8.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251210/202512102159.xsvvXCXy-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202512102159.xsvvXCXy-lkp@intel.com/ All errors (new ones prefixed by >>): In file included from include/linux/svga.h:6, from drivers/video/fbdev/arkfb.c:24: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from drivers/video/fbdev/arkfb.c:28: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ drivers/video/fbdev/arkfb.c:68:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_total_regs[] = {{0x00, 0, 7}, {0x41, 7, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:69:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_display_regs[] = {{0x01, 0, 7}, {0x41, 6, 6}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:70:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_blank_start_regs[] = {{0x02, 0, 7}, {0x41, 5, 5}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:71:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7 }, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:72:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_sync_start_regs[] = {{0x04, 0, 7}, {0x41, 4, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:73:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:75:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x40, 7, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:76:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x40, 6, 6}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:77:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x40, 5, 5}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:79:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:80:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x40, 4, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:81:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:83:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:84:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x40, 0, 2}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:85:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset ark_offset_regs[] = {{0x13, 0, 7}, {0x41, 3, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c: In function 'arkfb_tilecursor': >> drivers/video/fbdev/arkfb.c:152:21: error: dereferencing pointer to incomplete type 'struct arkfb_info' svga_tilecursor(par->state.vgabase, info, cursor); ^~ drivers/video/fbdev/arkfb.c: At top level: drivers/video/fbdev/arkfb.c:303:29: warning: 'struct dac_info' declared inside parameter list will not be visible outside of this definition or declaration int (*dac_get_mode)(struct dac_info *info); ^~~~~~~~ drivers/video/fbdev/arkfb.c:304:29: warning: 'struct dac_info' declared inside parameter list will not be visible outside of this definition or declaration int (*dac_set_mode)(struct dac_info *info, int mode); ^~~~~~~~ drivers/video/fbdev/arkfb.c:305:29: warning: 'struct dac_info' declared inside parameter list will not be visible outside of this definition or declaration int (*dac_get_freq)(struct dac_info *info, int channel); ^~~~~~~~ drivers/video/fbdev/arkfb.c:306:29: warning: 'struct dac_info' declared inside parameter list will not be visible outside of this definition or declaration int (*dac_set_freq)(struct dac_info *info, int channel, u32 freq); ^~~~~~~~ drivers/video/fbdev/arkfb.c:307:29: warning: 'struct dac_info' declared inside parameter list will not be visible outside of this definition or declaration void (*dac_release)(struct dac_info *info); ^~~~~~~~ drivers/video/fbdev/arkfb.c: In function 'dac_set_mode': drivers/video/fbdev/arkfb.c:339:36: error: passing argument 1 of 'info->dacops->dac_set_mode' from incompatible pointer type [-Werror=incompatible-pointer-types] return info->dacops->dac_set_mode(info, mode); ^~~~ drivers/video/fbdev/arkfb.c:339:36: note: expected 'struct dac_info *' but argument is of type 'struct dac_info *' drivers/video/fbdev/arkfb.c: In function 'dac_set_freq': drivers/video/fbdev/arkfb.c:344:36: error: passing argument 1 of 'info->dacops->dac_set_freq' from incompatible pointer type [-Werror=incompatible-pointer-types] return info->dacops->dac_set_freq(info, channel, freq); ^~~~ drivers/video/fbdev/arkfb.c:344:36: note: expected 'struct dac_info *' but argument is of type 'struct dac_info *' drivers/video/fbdev/arkfb.c: In function 'dac_release': drivers/video/fbdev/arkfb.c:349:28: error: passing argument 1 of 'info->dacops->dac_release' from incompatible pointer type [-Werror=incompatible-pointer-types] info->dacops->dac_release(info); ^~~~ drivers/video/fbdev/arkfb.c:349:28: note: expected 'struct dac_info *' but argument is of type 'struct dac_info *' drivers/video/fbdev/arkfb.c: At top level: drivers/video/fbdev/arkfb.c:426:18: error: initialization of 'int (*)(struct dac_info *, int)' from incompatible pointer type 'int (*)(struct dac_info *, int)' [-Werror=incompatible-pointer-types] .dac_set_mode = ics5342_set_mode, ^~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:426:18: note: (near initialization for 'ics5342_ops.dac_set_mode') drivers/video/fbdev/arkfb.c:427:18: error: initialization of 'int (*)(struct dac_info *, int, u32)' {aka 'int (*)(struct dac_info *, int, unsigned int)'} from incompatible pointer type 'int (*)(struct dac_info *, int, u32)' {aka 'int (*)(struct dac_info *, int, unsigned int)'} [-Werror=incompatible-pointer-types] .dac_set_freq = ics5342_set_freq, ^~~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:427:18: note: (near initialization for 'ics5342_ops.dac_set_freq') drivers/video/fbdev/arkfb.c:428:17: error: initialization of 'void (*)(struct dac_info *)' from incompatible pointer type 'void (*)(struct dac_info *)' [-Werror=incompatible-pointer-types] .dac_release = ics5342_release ^~~~~~~~~~~~~~~ drivers/video/fbdev/arkfb.c:428:17: note: (near initialization for 'ics5342_ops.dac_release') drivers/video/fbdev/arkfb.c: In function 'ark_dac_read_regs': drivers/video/fbdev/arkfb.c:461:23: error: dereferencing pointer to incomplete type 'struct arkfb_info' regval = vga_rseq(par->state.vgabase, 0x1C); ^~ drivers/video/fbdev/arkfb.c: In function 'ark_dac_write_regs': drivers/video/fbdev/arkfb.c:480:23: error: dereferencing pointer to incomplete type 'struct arkfb_info' regval = vga_rseq(par->state.vgabase, 0x1C); ^~ drivers/video/fbdev/arkfb.c: In function 'ark_set_pixclock': drivers/video/fbdev/arkfb.c:498:27: error: dereferencing pointer to incomplete type 'struct arkfb_info' int rv = dac_set_freq(par->dac, 0, 1000000000 / pixclock); ^~ In file included from include/linux/seqlock.h:19, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, from include/linux/module.h:18, from drivers/video/fbdev/arkfb.c:15: drivers/video/fbdev/arkfb.c: In function 'arkfb_open': drivers/video/fbdev/arkfb.c:516:18: error: dereferencing pointer to incomplete type 'struct arkfb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ drivers/video/fbdev/arkfb.c: In function 'arkfb_release': drivers/video/fbdev/arkfb.c:540:18: error: dereferencing pointer to incomplete type 'struct arkfb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ drivers/video/fbdev/arkfb.c: In function 'arkfb_set_par': drivers/video/fbdev/arkfb.c:658:20: error: dereferencing pointer to incomplete type 'struct arkfb_info' svga_wcrt_mask(par->state.vgabase, 0x11, 0x00, 0x80); ^~ drivers/video/fbdev/arkfb.c: In function 'arkfb_blank': drivers/video/fbdev/arkfb.c:881:21: error: dereferencing pointer to incomplete type 'struct arkfb_info' svga_wseq_mask(par->state.vgabase, 0x01, 0x00, 0x20); ^~ drivers/video/fbdev/arkfb.c: In function 'arkfb_pan_display': drivers/video/fbdev/arkfb.c:920:21: error: dereferencing pointer to incomplete type 'struct arkfb_info' svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); ^~ drivers/video/fbdev/arkfb.c: In function 'ark_pci_probe': drivers/video/fbdev/arkfb.c:973:34: error: invalid application of 'sizeof' to incomplete type 'struct arkfb_info' info = framebuffer_alloc(sizeof(struct arkfb_info), &(dev->dev)); ^~~~~~ In file included from include/linux/seqlock.h:19, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, -- In file included from include/linux/svga.h:6, from drivers/video/fbdev/vt8623fb.c:24: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ In file included from drivers/video/fbdev/vt8623fb.c:28: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token ? ^ drivers/video/fbdev/vt8623fb.c:66:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_total_regs[] = {{0x00, 0, 7}, {0x36, 3, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:67:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_display_regs[] = {{0x01, 0, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:68:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_blank_start_regs[] = {{0x02, 0, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:69:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, {0x33, 5, 5}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:70:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_sync_start_regs[] = {{0x04, 0, 7}, {0x33, 4, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:71:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:73:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x35, 0, 0}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:74:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x35, 2, 2}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:75:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x35, 3, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:76:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:77:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:78:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:80:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:81:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:82:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:83:32: error: array type has incomplete element type 'struct vga_regset' static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_tilecursor': >> drivers/video/fbdev/vt8623fb.c:119:21: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' svga_tilecursor(par->state.vgabase, info, cursor); ^~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623_set_pixclock': drivers/video/fbdev/vt8623fb.c:265:20: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' regval = vga_r(par->state.vgabase, VGA_MIS_R); ^~ In file included from include/linux/seqlock.h:19, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, from include/linux/module.h:18, from drivers/video/fbdev/vt8623fb.c:16: drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_open': drivers/video/fbdev/vt8623fb.c:284:18: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_release': drivers/video/fbdev/vt8623fb.c:306:18: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_set_par': drivers/video/fbdev/vt8623fb.c:431:20: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' svga_wseq_mask(par->state.vgabase, 0x10, 0x01, 0x01); ^~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_blank': drivers/video/fbdev/vt8623fb.c:593:21: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' svga_wcrt_mask(par->state.vgabase, 0x36, 0x00, 0x30); ^~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623fb_pan_display': drivers/video/fbdev/vt8623fb.c:639:21: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); ^~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623_pci_probe': drivers/video/fbdev/vt8623fb.c:690:34: error: invalid application of 'sizeof' to incomplete type 'struct vt8623fb_info' info = framebuffer_alloc(sizeof(struct vt8623fb_info), &(dev->dev)); ^~~~~~ In file included from include/linux/seqlock.h:19, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, from include/linux/module.h:18, from drivers/video/fbdev/vt8623fb.c:16: drivers/video/fbdev/vt8623fb.c:695:17: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' mutex_init(&par->open_lock); ^~ include/linux/mutex.h:64:16: note: in definition of macro 'mutex_init' __mutex_init((mutex), #mutex, &__key); \ ^~~~~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623_pci_remove': drivers/video/fbdev/vt8623fb.c:823:23: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' arch_phys_wc_del(par->wc_cookie); ^~ In file included from include/linux/seqlock.h:19, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, from include/linux/module.h:18, from drivers/video/fbdev/vt8623fb.c:16: drivers/video/fbdev/vt8623fb.c: In function 'vt8623_pci_suspend': drivers/video/fbdev/vt8623fb.c:847:18: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ drivers/video/fbdev/vt8623fb.c: In function 'vt8623_pci_resume': drivers/video/fbdev/vt8623fb.c:874:18: error: dereferencing pointer to incomplete type 'struct vt8623fb_info' mutex_lock(&(par->open_lock)); ^~ include/linux/mutex.h:168:44: note: in definition of macro 'mutex_lock' #define mutex_lock(lock) mutex_lock_nested(lock, 0) ^~~~ At top level: drivers/video/fbdev/vt8623fb.c:83:32: warning: 'vt8623_start_address_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x34, 0, 7}, {0x48, 0, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:82:32: warning: 'vt8623_fetch_count_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_fetch_count_regs[] = {{0x1C, 0, 7}, {0x1D, 0, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:81:32: warning: 'vt8623_line_compare_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x33, 0, 2}, {0x35, 4, 4}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:80:32: warning: 'vt8623_offset_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_offset_regs[] = {{0x13, 0, 7}, {0x35, 5, 7}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:78:32: warning: 'vt8623_v_sync_end_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~ drivers/video/fbdev/vt8623fb.c:77:32: warning: 'vt8623_v_sync_start_regs' defined but not used [-Wunused-variable] static const struct vga_regset vt8623_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x35, 1, 1}, VGA_REGSET_END}; ^~~~~~~~~~~~~~~~~~~~~~~~ .. vim +152 drivers/video/fbdev/arkfb.c 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 82 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 83 static const struct vga_regset ark_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, VGA_REGSET_END}; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 @84 static const struct vga_regset ark_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x40, 0, 2}, VGA_REGSET_END}; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 85 static const struct vga_regset ark_offset_regs[] = {{0x13, 0, 7}, {0x41, 3, 3}, VGA_REGSET_END}; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 86 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 87 static const struct svga_timing_regs ark_timing_regs = { 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 88 ark_h_total_regs, ark_h_display_regs, ark_h_blank_start_regs, 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 89 ark_h_blank_end_regs, ark_h_sync_start_regs, ark_h_sync_end_regs, 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 90 ark_v_total_regs, ark_v_display_regs, ark_v_blank_start_regs, 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 91 ark_v_blank_end_regs, ark_v_sync_start_regs, ark_v_sync_end_regs, 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 92 }; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 93 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 94 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 95 /* ------------------------------------------------------------------------- */ 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 96 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 97 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 98 /* Module parameters */ 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 99 48c68c4f1b5424 drivers/video/arkfb.c Greg Kroah-Hartman 2012-12-21 100 static char *mode_option = "640x480-8@60"; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 101 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 102 MODULE_AUTHOR("(c) 2007 Ondrej Zajicek <santiago@crfreenet.org>"); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 103 MODULE_LICENSE("GPL"); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 104 MODULE_DESCRIPTION("fbdev driver for ARK 2000PV"); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 105 1abf91729faf2f drivers/video/arkfb.c Krzysztof Helt 2008-04-28 106 module_param(mode_option, charp, 0444); 1abf91729faf2f drivers/video/arkfb.c Krzysztof Helt 2008-04-28 107 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)"); 1abf91729faf2f drivers/video/arkfb.c Krzysztof Helt 2008-04-28 108 module_param_named(mode, mode_option, charp, 0444); 1abf91729faf2f drivers/video/arkfb.c Krzysztof Helt 2008-04-28 109 MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc) (deprecated)"); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 110 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 111 static int threshold = 4; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 112 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 113 module_param(threshold, int, 0644); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 114 MODULE_PARM_DESC(threshold, "FIFO threshold"); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 115 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 116 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 117 /* ------------------------------------------------------------------------- */ 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 118 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 119 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 120 static void arkfb_settile(struct fb_info *info, struct fb_tilemap *map) 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 121 { 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 122 const u8 *font = map->data; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 123 u8 __iomem *fb = (u8 __iomem *)info->screen_base; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 124 int i, c; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 125 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 126 if ((map->width != 8) || (map->height != 16) || 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 127 (map->depth != 1) || (map->length != 256)) { 31b6780c15a4e3 drivers/video/arkfb.c Joe Perches 2013-09-19 128 fb_err(info, "unsupported font parameters: width %d, height %d, depth %d, length %d\n", 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 129 map->width, map->height, map->depth, map->length); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 130 return; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 131 } 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 132 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 133 fb += 2; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 134 for (c = 0; c < map->length; c++) { 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 135 for (i = 0; i < map->height; i++) { 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 136 fb_writeb(font[i], &fb[i * 4]); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 137 fb_writeb(font[i], &fb[i * 4 + (128 * 8)]); 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 138 } 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 139 fb += 128; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 140 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 141 if ((c % 8) == 7) 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 142 fb += 128*8; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 143 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 144 font += map->height; 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 145 } 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 146 } 681e14730c73cc drivers/video/arkfb.c Ondrej Zajicek 2007-05-09 147 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 148 static void arkfb_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 149 { 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 150 struct arkfb_info *par = info->par; 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 151 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 @152 svga_tilecursor(par->state.vgabase, info, cursor); 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 153 } 55db0923884554 drivers/video/arkfb.c David Miller 2011-01-11 154 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 14/19] video/vga: Add VGA_IS0_R 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala ` (4 preceding siblings ...) 2025-12-10 14:13 ` [PATCH " kernel test robot @ 2025-12-10 14:24 ` kernel test robot 5 siblings, 0 replies; 51+ messages in thread From: kernel test robot @ 2025-12-10 14:24 UTC (permalink / raw) To: Ville Syrjala, intel-gfx Cc: oe-kbuild-all, intel-xe, Helge Deller, linux-fbdev, dri-devel Hi Ville, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] [cannot apply to drm-i915/for-linux-next drm-i915/for-linux-next-fixes drm-xe/drm-xe-next linus/master v6.18 next-20251210] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-vga-Register-vgaarb-client-later/20251209-195929 base: https://gitlab.freedesktop.org/drm/tip.git drm-tip patch link: https://lore.kernel.org/r/20251208182637.334-15-ville.syrjala%40linux.intel.com patch subject: [PATCH 14/19] video/vga: Add VGA_IS0_R config: s390-randconfig-002-20251210 (https://download.01.org/0day-ci/archive/20251210/202512102200.KIAC3RLu-lkp@intel.com/config) compiler: s390-linux-gcc (GCC) 9.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251210/202512102200.KIAC3RLu-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202512102200.KIAC3RLu-lkp@intel.com/ All errors (new ones prefixed by >>): In file included from drivers/video/vgastate.c:20: include/video/vga.h:489:1: error: expected identifier or '(' before '?' token 489 | ? | ^ drivers/video/vgastate.c: In function 'save_vga_text': >> drivers/video/vgastate.c:89:9: error: dereferencing pointer to incomplete type 'struct regstate' 89 | saved->vga_font0[i] = vga_r(fbbase, i); | ^~ drivers/video/vgastate.c: In function 'restore_vga_text': drivers/video/vgastate.c:175:26: error: dereferencing pointer to incomplete type 'struct regstate' 175 | vga_w(fbbase, i, saved->vga_font0[i]); | ^~ drivers/video/vgastate.c: In function 'save_vga_mode': drivers/video/vgastate.c:232:7: error: dereferencing pointer to incomplete type 'struct regstate' 232 | saved->misc = vga_r(state->vgabase, VGA_MIS_R); | ^~ drivers/video/vgastate.c: In function 'restore_vga_mode': drivers/video/vgastate.c:263:40: error: dereferencing pointer to incomplete type 'struct regstate' 263 | vga_w(state->vgabase, VGA_MIS_W, saved->misc); | ^~ drivers/video/vgastate.c: In function 'save_vga_cmap': drivers/video/vgastate.c:319:8: error: dereferencing pointer to incomplete type 'struct regstate' 319 | saved->vga_cmap[i] = vga_r(state->vgabase, VGA_PEL_D); | ^~ drivers/video/vgastate.c: In function 'restore_vga_cmap': drivers/video/vgastate.c:332:41: error: dereferencing pointer to incomplete type 'struct regstate' 332 | vga_w(state->vgabase, VGA_PEL_D, saved->vga_cmap[i]); | ^~ drivers/video/vgastate.c: In function 'vga_cleanup': drivers/video/vgastate.c:340:14: error: dereferencing pointer to incomplete type 'struct regstate' 340 | vfree(saved->vga_font0); | ^~ In file included from include/linux/workqueue.h:9, from include/linux/mm_types.h:19, from include/linux/mmzone.h:22, from include/linux/gfp.h:7, from include/linux/umh.h:4, from include/linux/kmod.h:9, from include/linux/module.h:18, from drivers/video/vgastate.c:16: drivers/video/vgastate.c: In function 'save_vga': drivers/video/vgastate.c:354:25: error: invalid application of 'sizeof' to incomplete type 'struct regstate' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~ include/linux/alloc_tag.h:251:9: note: in definition of macro 'alloc_hooks_tag' 251 | typeof(_do_alloc) _res; \ | ^~~~~~~~~ include/linux/slab.h:1096:25: note: in expansion of macro 'alloc_hooks' 1096 | #define kzalloc(...) alloc_hooks(kzalloc_noprof(__VA_ARGS__)) | ^~~~~~~~~~~ drivers/video/vgastate.c:354:10: note: in expansion of macro 'kzalloc' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~~ drivers/video/vgastate.c:354:25: error: invalid application of 'sizeof' to incomplete type 'struct regstate' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~ include/linux/alloc_tag.h:255:10: note: in definition of macro 'alloc_hooks_tag' 255 | _res = _do_alloc; \ | ^~~~~~~~~ include/linux/slab.h:1096:25: note: in expansion of macro 'alloc_hooks' 1096 | #define kzalloc(...) alloc_hooks(kzalloc_noprof(__VA_ARGS__)) | ^~~~~~~~~~~ drivers/video/vgastate.c:354:10: note: in expansion of macro 'kzalloc' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~~ drivers/video/vgastate.c:354:25: error: invalid application of 'sizeof' to incomplete type 'struct regstate' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~ include/linux/alloc_tag.h:258:10: note: in definition of macro 'alloc_hooks_tag' 258 | _res = _do_alloc; \ | ^~~~~~~~~ include/linux/slab.h:1096:25: note: in expansion of macro 'alloc_hooks' 1096 | #define kzalloc(...) alloc_hooks(kzalloc_noprof(__VA_ARGS__)) | ^~~~~~~~~~~ drivers/video/vgastate.c:354:10: note: in expansion of macro 'kzalloc' 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^~~~~~~ drivers/video/vgastate.c:354:8: warning: assignment to 'struct regstate *' from 'int' makes pointer from integer without a cast [-Wint-conversion] 354 | saved = kzalloc(sizeof(struct regstate), GFP_KERNEL); | ^ drivers/video/vgastate.c:362:8: error: dereferencing pointer to incomplete type 'struct regstate' 362 | saved->vga_cmap = vmalloc(768); | ^~ vim +89 drivers/video/vgastate.c ^1da177e4c3f41 Linus Torvalds 2005-04-16 47 ^1da177e4c3f41 Linus Torvalds 2005-04-16 48 static void save_vga_text(struct vgastate *state, void __iomem *fbbase) ^1da177e4c3f41 Linus Torvalds 2005-04-16 49 { ^1da177e4c3f41 Linus Torvalds 2005-04-16 50 struct regstate *saved = (struct regstate *) state->vidstate; ^1da177e4c3f41 Linus Torvalds 2005-04-16 51 int i; ^1da177e4c3f41 Linus Torvalds 2005-04-16 52 u8 misc, attr10, gr4, gr5, gr6, seq1, seq2, seq4; 0449359f053829 Ondrej Zajicek 2007-05-08 53 unsigned short iobase; ^1da177e4c3f41 Linus Torvalds 2005-04-16 54 ^1da177e4c3f41 Linus Torvalds 2005-04-16 55 /* if in graphics mode, no need to save */ 0449359f053829 Ondrej Zajicek 2007-05-08 56 misc = vga_r(state->vgabase, VGA_MIS_R); 0449359f053829 Ondrej Zajicek 2007-05-08 57 iobase = (misc & 1) ? 0x3d0 : 0x3b0; 0449359f053829 Ondrej Zajicek 2007-05-08 58 0449359f053829 Ondrej Zajicek 2007-05-08 59 vga_r(state->vgabase, iobase + 0xa); 0449359f053829 Ondrej Zajicek 2007-05-08 60 vga_w(state->vgabase, VGA_ATT_W, 0x00); ^1da177e4c3f41 Linus Torvalds 2005-04-16 61 attr10 = vga_rattr(state->vgabase, 0x10); 0449359f053829 Ondrej Zajicek 2007-05-08 62 vga_r(state->vgabase, iobase + 0xa); 0449359f053829 Ondrej Zajicek 2007-05-08 63 vga_w(state->vgabase, VGA_ATT_W, 0x20); 0449359f053829 Ondrej Zajicek 2007-05-08 64 ^1da177e4c3f41 Linus Torvalds 2005-04-16 65 if (attr10 & 1) ^1da177e4c3f41 Linus Torvalds 2005-04-16 66 return; ^1da177e4c3f41 Linus Torvalds 2005-04-16 67 ^1da177e4c3f41 Linus Torvalds 2005-04-16 68 /* save regs */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 69 gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ); ^1da177e4c3f41 Linus Torvalds 2005-04-16 70 gr5 = vga_rgfx(state->vgabase, VGA_GFX_MODE); ^1da177e4c3f41 Linus Torvalds 2005-04-16 71 gr6 = vga_rgfx(state->vgabase, VGA_GFX_MISC); ^1da177e4c3f41 Linus Torvalds 2005-04-16 72 seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE); ^1da177e4c3f41 Linus Torvalds 2005-04-16 73 seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE); ^1da177e4c3f41 Linus Torvalds 2005-04-16 74 ^1da177e4c3f41 Linus Torvalds 2005-04-16 75 /* blank screen */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 76 seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE); ^1da177e4c3f41 Linus Torvalds 2005-04-16 77 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); ^1da177e4c3f41 Linus Torvalds 2005-04-16 78 vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, seq1 | 1 << 5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 79 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x3); ^1da177e4c3f41 Linus Torvalds 2005-04-16 80 ^1da177e4c3f41 Linus Torvalds 2005-04-16 81 /* save font at plane 2 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 82 if (state->flags & VGA_SAVE_FONT0) { ^1da177e4c3f41 Linus Torvalds 2005-04-16 83 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x4); ^1da177e4c3f41 Linus Torvalds 2005-04-16 84 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x6); ^1da177e4c3f41 Linus Torvalds 2005-04-16 85 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x2); ^1da177e4c3f41 Linus Torvalds 2005-04-16 86 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x0); ^1da177e4c3f41 Linus Torvalds 2005-04-16 87 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 88 for (i = 0; i < 4 * 8192; i++) ^1da177e4c3f41 Linus Torvalds 2005-04-16 @89 saved->vga_font0[i] = vga_r(fbbase, i); ^1da177e4c3f41 Linus Torvalds 2005-04-16 90 } ^1da177e4c3f41 Linus Torvalds 2005-04-16 91 ^1da177e4c3f41 Linus Torvalds 2005-04-16 92 /* save font at plane 3 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 93 if (state->flags & VGA_SAVE_FONT1) { ^1da177e4c3f41 Linus Torvalds 2005-04-16 94 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x8); ^1da177e4c3f41 Linus Torvalds 2005-04-16 95 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x6); ^1da177e4c3f41 Linus Torvalds 2005-04-16 96 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x3); ^1da177e4c3f41 Linus Torvalds 2005-04-16 97 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x0); ^1da177e4c3f41 Linus Torvalds 2005-04-16 98 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 99 for (i = 0; i < state->memsize; i++) ^1da177e4c3f41 Linus Torvalds 2005-04-16 100 saved->vga_font1[i] = vga_r(fbbase, i); ^1da177e4c3f41 Linus Torvalds 2005-04-16 101 } ^1da177e4c3f41 Linus Torvalds 2005-04-16 102 ^1da177e4c3f41 Linus Torvalds 2005-04-16 103 /* save font at plane 0/1 */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 104 if (state->flags & VGA_SAVE_TEXT) { ^1da177e4c3f41 Linus Torvalds 2005-04-16 105 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x1); ^1da177e4c3f41 Linus Torvalds 2005-04-16 106 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x6); ^1da177e4c3f41 Linus Torvalds 2005-04-16 107 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x0); ^1da177e4c3f41 Linus Torvalds 2005-04-16 108 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x0); ^1da177e4c3f41 Linus Torvalds 2005-04-16 109 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 110 for (i = 0; i < 8192; i++) ^1da177e4c3f41 Linus Torvalds 2005-04-16 111 saved->vga_text[i] = vga_r(fbbase, i); ^1da177e4c3f41 Linus Torvalds 2005-04-16 112 ^1da177e4c3f41 Linus Torvalds 2005-04-16 113 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, 0x2); ^1da177e4c3f41 Linus Torvalds 2005-04-16 114 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, 0x6); ^1da177e4c3f41 Linus Torvalds 2005-04-16 115 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, 0x1); ^1da177e4c3f41 Linus Torvalds 2005-04-16 116 vga_wgfx(state->vgabase, VGA_GFX_MODE, 0x0); ^1da177e4c3f41 Linus Torvalds 2005-04-16 117 vga_wgfx(state->vgabase, VGA_GFX_MISC, 0x5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 118 for (i = 0; i < 8192; i++) ^1da177e4c3f41 Linus Torvalds 2005-04-16 119 saved->vga_text[8192+i] = vga_r(fbbase + 2 * 8192, i); ^1da177e4c3f41 Linus Torvalds 2005-04-16 120 } ^1da177e4c3f41 Linus Torvalds 2005-04-16 121 ^1da177e4c3f41 Linus Torvalds 2005-04-16 122 /* restore regs */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 123 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, seq2); ^1da177e4c3f41 Linus Torvalds 2005-04-16 124 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, seq4); ^1da177e4c3f41 Linus Torvalds 2005-04-16 125 ^1da177e4c3f41 Linus Torvalds 2005-04-16 126 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4); ^1da177e4c3f41 Linus Torvalds 2005-04-16 127 vga_wgfx(state->vgabase, VGA_GFX_MODE, gr5); ^1da177e4c3f41 Linus Torvalds 2005-04-16 128 vga_wgfx(state->vgabase, VGA_GFX_MISC, gr6); ^1da177e4c3f41 Linus Torvalds 2005-04-16 129 ^1da177e4c3f41 Linus Torvalds 2005-04-16 130 /* unblank screen */ ^1da177e4c3f41 Linus Torvalds 2005-04-16 131 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); ^1da177e4c3f41 Linus Torvalds 2005-04-16 132 vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, seq1 & ~(1 << 5)); ^1da177e4c3f41 Linus Torvalds 2005-04-16 133 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x3); ^1da177e4c3f41 Linus Torvalds 2005-04-16 134 ^1da177e4c3f41 Linus Torvalds 2005-04-16 135 vga_wseq(state->vgabase, VGA_SEQ_CLOCK_MODE, seq1); ^1da177e4c3f41 Linus Torvalds 2005-04-16 136 } ^1da177e4c3f41 Linus Torvalds 2005-04-16 137 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (13 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:56 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala ` (7 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Use the proper IS0_R name for the VGA input status register 0, instead of using the VGA_MIS_W alias which is meant for write accesses to the same address. Yes, VGA registers are weird. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_crt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index dedc26f6a2b2..6f216ba887bc 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -738,7 +738,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) * border color for Color info. */ intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); - st00 = intel_vga_read(display, VGA_MIS_W, true); + st00 = intel_vga_read(display, VGA_IS0_R, true); status = ((st00 & (1 << 4)) != 0) ? connector_status_connected : connector_status_disconnected; @@ -786,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) do { count++; /* Read the ST00 VGA status register */ - st00 = intel_vga_read(display, VGA_MIS_W, true); + st00 = intel_vga_read(display, VGA_IS0_R, true); if (st00 & (1 << 4)) detect++; } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W 2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala @ 2025-12-09 10:56 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:56 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Use the proper IS0_R name for the VGA input status register 0, instead > of using the VGA_MIS_W alias which is meant for write accesses to the > same address. Yes, VGA registers are weird. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_crt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > index dedc26f6a2b2..6f216ba887bc 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -738,7 +738,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > * border color for Color info. > */ > intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); > - st00 = intel_vga_read(display, VGA_MIS_W, true); > + st00 = intel_vga_read(display, VGA_IS0_R, true); > status = ((st00 & (1 << 4)) != 0) ? > connector_status_connected : > connector_status_disconnected; > @@ -786,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > do { > count++; > /* Read the ST00 VGA status register */ > - st00 = intel_vga_read(display, VGA_MIS_W, true); > + st00 = intel_vga_read(display, VGA_IS0_R, true); > if (st00 & (1 << 4)) > detect++; > } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (14 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:57 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala ` (6 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> Extract the CRT sense check into a helper instead of repeating the same thing twice. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_crt.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index 6f216ba887bc..b71a8d97cdbb 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -693,6 +693,11 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector) return ret; } +static bool intel_crt_sense_above_threshold(struct intel_display *display) +{ + return intel_vga_read(display, VGA_IS0_R, true) & (1 << 4); +} + static enum drm_connector_status intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) { @@ -704,7 +709,6 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) u32 vsample; u32 vblank, vblank_start, vblank_end; u32 dsl; - u8 st00; enum drm_connector_status status; drm_dbg_kms(display->drm, "starting load-detect on CRT\n"); @@ -738,8 +742,8 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) * border color for Color info. */ intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); - st00 = intel_vga_read(display, VGA_IS0_R, true); - status = ((st00 & (1 << 4)) != 0) ? + + status = intel_crt_sense_above_threshold(display) ? connector_status_connected : connector_status_disconnected; @@ -779,15 +783,13 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) while ((dsl = intel_de_read(display, PIPEDSL(display, pipe))) <= vsample) ; /* - * Watch ST00 for an entire scanline + * Watch sense for an entire scanline */ detect = 0; count = 0; do { count++; - /* Read the ST00 VGA status register */ - st00 = intel_vga_read(display, VGA_IS0_R, true); - if (st00 & (1 << 4)) + if (intel_crt_sense_above_threshold(display)) detect++; } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() 2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala @ 2025-12-09 10:57 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:57 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Extract the CRT sense check into a helper instead of repeating > the same thing twice. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_crt.c | 16 +++++++++------- > 1 file changed, 9 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > index 6f216ba887bc..b71a8d97cdbb 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -693,6 +693,11 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector) > return ret; > } > > +static bool intel_crt_sense_above_threshold(struct intel_display *display) > +{ > + return intel_vga_read(display, VGA_IS0_R, true) & (1 << 4); > +} > + > static enum drm_connector_status > intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > { > @@ -704,7 +709,6 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > u32 vsample; > u32 vblank, vblank_start, vblank_end; > u32 dsl; > - u8 st00; > enum drm_connector_status status; > > drm_dbg_kms(display->drm, "starting load-detect on CRT\n"); > @@ -738,8 +742,8 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > * border color for Color info. > */ > intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(display, pipe)); > - st00 = intel_vga_read(display, VGA_IS0_R, true); > - status = ((st00 & (1 << 4)) != 0) ? > + > + status = intel_crt_sense_above_threshold(display) ? > connector_status_connected : > connector_status_disconnected; > > @@ -779,15 +783,13 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe) > while ((dsl = intel_de_read(display, PIPEDSL(display, pipe))) <= vsample) > ; > /* > - * Watch ST00 for an entire scanline > + * Watch sense for an entire scanline > */ > detect = 0; > count = 0; > do { > count++; > - /* Read the ST00 VGA status register */ > - st00 = intel_vga_read(display, VGA_IS0_R, true); > - if (st00 & (1 << 4)) > + if (intel_crt_sense_above_threshold(display)) > detect++; > } while ((intel_de_read(display, PIPEDSL(display, pipe)) == dsl)); -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (15 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 10:58 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala ` (5 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> INTEL_GMCH_CTRL and I830_GMCH_CTRL are the same register. Get rid of the INTEL_GMCH_CTRL name. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_vga.c | 2 +- include/drm/intel/i915_drm.h | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c index 9e1f3ab632d5..6fc3e3702cb8 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -20,7 +20,7 @@ static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) { - return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; + return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : I830_GMCH_CTRL; } static bool intel_vga_decode_is_enabled(struct intel_display *display) diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h index adff68538484..91f628367f1f 100644 --- a/include/drm/intel/i915_drm.h +++ b/include/drm/intel/i915_drm.h @@ -44,8 +44,6 @@ extern struct resource intel_graphics_stolen_res; * This is all handled in the intel-gtt.ko module. i915.ko only * cares about the vga bit for the vga arbiter. */ -#define INTEL_GMCH_CTRL 0x52 -#define INTEL_GMCH_VGA_DISABLE (1 << 1) #define SNB_GMCH_CTRL 0x50 #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ #define SNB_GMCH_GGMS_MASK 0x3 @@ -80,6 +78,9 @@ extern struct resource intel_graphics_stolen_res; #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) +/* valid for both I830_GMCH_CTRL and SNB_GMCH_CTRL */ +#define INTEL_GMCH_VGA_DISABLE (1 << 1) + #define I830_DRB3 0x63 #define I85X_DRB3 0x43 #define I865_TOUD 0xc4 -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias 2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala @ 2025-12-09 10:58 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 10:58 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > INTEL_GMCH_CTRL and I830_GMCH_CTRL are the same register. > Get rid of the INTEL_GMCH_CTRL name. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vga.c | 2 +- > include/drm/intel/i915_drm.h | 5 +++-- > 2 files changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c > index 9e1f3ab632d5..6fc3e3702cb8 100644 > --- a/drivers/gpu/drm/i915/display/intel_vga.c > +++ b/drivers/gpu/drm/i915/display/intel_vga.c > @@ -20,7 +20,7 @@ > > static unsigned int intel_gmch_ctrl_reg(struct intel_display *display) > { > - return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; > + return DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : I830_GMCH_CTRL; > } > > static bool intel_vga_decode_is_enabled(struct intel_display *display) > diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h > index adff68538484..91f628367f1f 100644 > --- a/include/drm/intel/i915_drm.h > +++ b/include/drm/intel/i915_drm.h > @@ -44,8 +44,6 @@ extern struct resource intel_graphics_stolen_res; > * This is all handled in the intel-gtt.ko module. i915.ko only > * cares about the vga bit for the vga arbiter. > */ > -#define INTEL_GMCH_CTRL 0x52 > -#define INTEL_GMCH_VGA_DISABLE (1 << 1) > #define SNB_GMCH_CTRL 0x50 > #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ > #define SNB_GMCH_GGMS_MASK 0x3 > @@ -80,6 +78,9 @@ extern struct resource intel_graphics_stolen_res; > #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) > #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) > > +/* valid for both I830_GMCH_CTRL and SNB_GMCH_CTRL */ > +#define INTEL_GMCH_VGA_DISABLE (1 << 1) > + > #define I830_DRB3 0x63 > #define I85X_DRB3 0x43 > #define I865_TOUD 0xc4 -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 18/19] drm/i915: Clean up PCI config space reg defines 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (16 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 11:00 ` Jani Nikula 2025-12-09 11:01 ` Jani Nikula 2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala ` (4 subsequent siblings) 22 siblings, 2 replies; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> The PCI config space register defines in i915_drm.h are a bit of a mess; Whitespace is all over the place, register masks and values are defined in inconsitent ways. Clean it up a bit. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/drm/intel/i915_drm.h | 70 ++++++++++++++++++------------------ 1 file changed, 34 insertions(+), 36 deletions(-) diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h index 91f628367f1f..c633ce62f2bf 100644 --- a/include/drm/intel/i915_drm.h +++ b/include/drm/intel/i915_drm.h @@ -45,38 +45,36 @@ extern struct resource intel_graphics_stolen_res; * cares about the vga bit for the vga arbiter. */ #define SNB_GMCH_CTRL 0x50 -#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ -#define SNB_GMCH_GGMS_MASK 0x3 -#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ -#define SNB_GMCH_GMS_MASK 0x1f -#define BDW_GMCH_GGMS_SHIFT 6 -#define BDW_GMCH_GGMS_MASK 0x3 -#define BDW_GMCH_GMS_SHIFT 8 -#define BDW_GMCH_GMS_MASK 0xff +#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ +#define SNB_GMCH_GGMS_MASK 0x3 +#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ +#define SNB_GMCH_GMS_MASK 0x1f +#define BDW_GMCH_GGMS_SHIFT 6 +#define BDW_GMCH_GGMS_MASK 0x3 +#define BDW_GMCH_GMS_SHIFT 8 +#define BDW_GMCH_GMS_MASK 0xff #define I830_GMCH_CTRL 0x52 - -#define I830_GMCH_GMS_MASK 0x70 -#define I830_GMCH_GMS_LOCAL 0x10 -#define I830_GMCH_GMS_STOLEN_512 0x20 -#define I830_GMCH_GMS_STOLEN_1024 0x30 -#define I830_GMCH_GMS_STOLEN_8192 0x40 - -#define I855_GMCH_GMS_MASK 0xF0 -#define I855_GMCH_GMS_STOLEN_0M 0x0 -#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) -#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) -#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) -#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) -#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) -#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) -#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) -#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) -#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) -#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) -#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) -#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) -#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) +#define I830_GMCH_GMS_MASK (0x7 << 4) +#define I830_GMCH_GMS_LOCAL (0x1 << 4) +#define I830_GMCH_GMS_STOLEN_512 (0x2 << 4) +#define I830_GMCH_GMS_STOLEN_1024 (0x3 << 4) +#define I830_GMCH_GMS_STOLEN_8192 (0x4 << 4) +#define I855_GMCH_GMS_MASK (0xF << 4) +#define I855_GMCH_GMS_STOLEN_0M (0x0 << 4) +#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) +#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) +#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) +#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) +#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) +#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) +#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) +#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) +#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) +#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) +#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) +#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) +#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) /* valid for both I830_GMCH_CTRL and SNB_GMCH_CTRL */ #define INTEL_GMCH_VGA_DISABLE (1 << 1) @@ -88,12 +86,12 @@ extern struct resource intel_graphics_stolen_res; #define I830_ESMRAMC 0x91 #define I845_ESMRAMC 0x9e #define I85X_ESMRAMC 0x61 -#define TSEG_ENABLE (1 << 0) -#define I830_TSEG_SIZE_512K (0 << 1) -#define I830_TSEG_SIZE_1M (1 << 1) -#define I845_TSEG_SIZE_MASK (3 << 1) -#define I845_TSEG_SIZE_512K (2 << 1) -#define I845_TSEG_SIZE_1M (3 << 1) +#define TSEG_ENABLE (1 << 0) +#define I830_TSEG_SIZE_512K (0 << 1) +#define I830_TSEG_SIZE_1M (1 << 1) +#define I845_TSEG_SIZE_MASK (3 << 1) +#define I845_TSEG_SIZE_512K (2 << 1) +#define I845_TSEG_SIZE_1M (3 << 1) #define INTEL_BSM 0x5c #define INTEL_GEN11_BSM_DW0 0xc0 -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 18/19] drm/i915: Clean up PCI config space reg defines 2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala @ 2025-12-09 11:00 ` Jani Nikula 2025-12-09 11:01 ` Jani Nikula 1 sibling, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 11:00 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The PCI config space register defines in i915_drm.h are > a bit of a mess; Whitespace is all over the place, register > masks and values are defined in inconsitent ways. > > Clean it up a bit. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > include/drm/intel/i915_drm.h | 70 ++++++++++++++++++------------------ > 1 file changed, 34 insertions(+), 36 deletions(-) > > diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h > index 91f628367f1f..c633ce62f2bf 100644 > --- a/include/drm/intel/i915_drm.h > +++ b/include/drm/intel/i915_drm.h > @@ -45,38 +45,36 @@ extern struct resource intel_graphics_stolen_res; > * cares about the vga bit for the vga arbiter. > */ > #define SNB_GMCH_CTRL 0x50 > -#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ > -#define SNB_GMCH_GGMS_MASK 0x3 > -#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ > -#define SNB_GMCH_GMS_MASK 0x1f > -#define BDW_GMCH_GGMS_SHIFT 6 > -#define BDW_GMCH_GGMS_MASK 0x3 > -#define BDW_GMCH_GMS_SHIFT 8 > -#define BDW_GMCH_GMS_MASK 0xff > +#define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ > +#define SNB_GMCH_GGMS_MASK 0x3 > +#define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ > +#define SNB_GMCH_GMS_MASK 0x1f > +#define BDW_GMCH_GGMS_SHIFT 6 > +#define BDW_GMCH_GGMS_MASK 0x3 > +#define BDW_GMCH_GMS_SHIFT 8 > +#define BDW_GMCH_GMS_MASK 0xff > > #define I830_GMCH_CTRL 0x52 > - > -#define I830_GMCH_GMS_MASK 0x70 > -#define I830_GMCH_GMS_LOCAL 0x10 > -#define I830_GMCH_GMS_STOLEN_512 0x20 > -#define I830_GMCH_GMS_STOLEN_1024 0x30 > -#define I830_GMCH_GMS_STOLEN_8192 0x40 > - > -#define I855_GMCH_GMS_MASK 0xF0 > -#define I855_GMCH_GMS_STOLEN_0M 0x0 > -#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) > -#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) > -#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) > -#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) > -#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) > -#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) > -#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) > -#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) > -#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) > -#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) > -#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) > -#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) > -#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) > +#define I830_GMCH_GMS_MASK (0x7 << 4) > +#define I830_GMCH_GMS_LOCAL (0x1 << 4) > +#define I830_GMCH_GMS_STOLEN_512 (0x2 << 4) > +#define I830_GMCH_GMS_STOLEN_1024 (0x3 << 4) > +#define I830_GMCH_GMS_STOLEN_8192 (0x4 << 4) > +#define I855_GMCH_GMS_MASK (0xF << 4) > +#define I855_GMCH_GMS_STOLEN_0M (0x0 << 4) > +#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) > +#define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) > +#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) > +#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) > +#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) > +#define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) > +#define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) > +#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) > +#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) > +#define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) > +#define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) > +#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) > +#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) > > /* valid for both I830_GMCH_CTRL and SNB_GMCH_CTRL */ > #define INTEL_GMCH_VGA_DISABLE (1 << 1) > @@ -88,12 +86,12 @@ extern struct resource intel_graphics_stolen_res; > #define I830_ESMRAMC 0x91 > #define I845_ESMRAMC 0x9e > #define I85X_ESMRAMC 0x61 > -#define TSEG_ENABLE (1 << 0) > -#define I830_TSEG_SIZE_512K (0 << 1) > -#define I830_TSEG_SIZE_1M (1 << 1) > -#define I845_TSEG_SIZE_MASK (3 << 1) > -#define I845_TSEG_SIZE_512K (2 << 1) > -#define I845_TSEG_SIZE_1M (3 << 1) > +#define TSEG_ENABLE (1 << 0) > +#define I830_TSEG_SIZE_512K (0 << 1) > +#define I830_TSEG_SIZE_1M (1 << 1) > +#define I845_TSEG_SIZE_MASK (3 << 1) > +#define I845_TSEG_SIZE_512K (2 << 1) > +#define I845_TSEG_SIZE_1M (3 << 1) > > #define INTEL_BSM 0x5c > #define INTEL_GEN11_BSM_DW0 0xc0 -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* Re: [PATCH 18/19] drm/i915: Clean up PCI config space reg defines 2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala 2025-12-09 11:00 ` Jani Nikula @ 2025-12-09 11:01 ` Jani Nikula 1 sibling, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 11:01 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The PCI config space register defines in i915_drm.h are > a bit of a mess; Whitespace is all over the place, register > masks and values are defined in inconsitent ways. *inconsistent > > Clean it up a bit. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (17 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala @ 2025-12-08 18:26 ` Ville Syrjala 2025-12-09 11:03 ` Jani Nikula 2025-12-08 19:11 ` ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork ` (3 subsequent siblings) 22 siblings, 1 reply; 51+ messages in thread From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw) To: intel-gfx; +Cc: intel-xe From: Ville Syrjälä <ville.syrjala@linux.intel.com> The actual GMCH_CRTL lives in the host bridge aka. device 0), but device 2 has a read-only mirror on i85x/i865+. Docuemnent that fact. Also remove the ancient tales about where the defines are used. Those haven't been true in a long time. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/drm/intel/i915_drm.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h index c633ce62f2bf..8eee23f94e26 100644 --- a/include/drm/intel/i915_drm.h +++ b/include/drm/intel/i915_drm.h @@ -39,11 +39,11 @@ bool i915_gpu_turbo_disable(void); extern struct resource intel_graphics_stolen_res; /* - * The Bridge device's PCI config space has information about the - * fb aperture size and the amount of pre-reserved memory. - * This is all handled in the intel-gtt.ko module. i915.ko only - * cares about the vga bit for the vga arbiter. + * The Bridge device's (device 0) PCI config space has information + * about the fb aperture size and the amount of pre-reserved memory. */ + +/* device 2 has a read-only mirror */ #define SNB_GMCH_CTRL 0x50 #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ #define SNB_GMCH_GGMS_MASK 0x3 @@ -54,6 +54,7 @@ extern struct resource intel_graphics_stolen_res; #define BDW_GMCH_GMS_SHIFT 8 #define BDW_GMCH_GMS_MASK 0xff +/* device 2 has a read-only mirror from i85x/i865 onwards */ #define I830_GMCH_CTRL 0x52 #define I830_GMCH_GMS_MASK (0x7 << 4) #define I830_GMCH_GMS_LOCAL (0x1 << 4) -- 2.51.2 ^ permalink raw reply related [flat|nested] 51+ messages in thread
* Re: [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit 2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala @ 2025-12-09 11:03 ` Jani Nikula 0 siblings, 0 replies; 51+ messages in thread From: Jani Nikula @ 2025-12-09 11:03 UTC (permalink / raw) To: Ville Syrjala, intel-gfx; +Cc: intel-xe On Mon, 08 Dec 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The actual GMCH_CRTL lives in the host bridge aka. device 0), Superfluous ) or missing (. > but device 2 has a read-only mirror on i85x/i865+. Docuemnent *Document > that fact. > > Also remove the ancient tales about where the defines are used. > Those haven't been true in a long time. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > include/drm/intel/i915_drm.h | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/include/drm/intel/i915_drm.h b/include/drm/intel/i915_drm.h > index c633ce62f2bf..8eee23f94e26 100644 > --- a/include/drm/intel/i915_drm.h > +++ b/include/drm/intel/i915_drm.h > @@ -39,11 +39,11 @@ bool i915_gpu_turbo_disable(void); > extern struct resource intel_graphics_stolen_res; > > /* > - * The Bridge device's PCI config space has information about the > - * fb aperture size and the amount of pre-reserved memory. > - * This is all handled in the intel-gtt.ko module. i915.ko only > - * cares about the vga bit for the vga arbiter. > + * The Bridge device's (device 0) PCI config space has information > + * about the fb aperture size and the amount of pre-reserved memory. > */ > + > +/* device 2 has a read-only mirror */ > #define SNB_GMCH_CTRL 0x50 > #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ > #define SNB_GMCH_GGMS_MASK 0x3 > @@ -54,6 +54,7 @@ extern struct resource intel_graphics_stolen_res; > #define BDW_GMCH_GMS_SHIFT 8 > #define BDW_GMCH_GMS_MASK 0xff > > +/* device 2 has a read-only mirror from i85x/i865 onwards */ > #define I830_GMCH_CTRL 0x52 > #define I830_GMCH_GMS_MASK (0x7 << 4) > #define I830_GMCH_GMS_LOCAL (0x1 << 4) -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 51+ messages in thread
* ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (18 preceding siblings ...) 2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala @ 2025-12-08 19:11 ` Patchwork 2025-12-09 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork ` (2 subsequent siblings) 22 siblings, 0 replies; 51+ messages in thread From: Patchwork @ 2025-12-08 19:11 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx == Series Details == Series: drm/i915/vga: Try to sort out the VGA decode mess URL : https://patchwork.freedesktop.org/series/158651/ State : failure == Summary == Error: make failed CALL scripts/checksyscalls.sh DESCEND objtool INSTALL libsubcmd_headers CC drivers/pci/pci-sysfs.o In file included from ./include/linux/vgaarb.h:15, from drivers/pci/pci-sysfs.c:28: ./include/video/vga.h:489:1: error: expected identifier or ‘(’ before ‘?’ token 489 | ? | ^ make[4]: *** [scripts/Makefile.build:287: drivers/pci/pci-sysfs.o] Error 1 make[3]: *** [scripts/Makefile.build:556: drivers/pci] Error 2 make[2]: *** [scripts/Makefile.build:556: drivers] Error 2 make[1]: *** [/home/kbuild2/kernel/Makefile:2010: .] Error 2 make: *** [Makefile:248: __sub-make] Error 2 Build failed, no error log produced ^ permalink raw reply [flat|nested] 51+ messages in thread
* ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (19 preceding siblings ...) 2025-12-08 19:11 ` ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork @ 2025-12-09 11:31 ` Patchwork 2025-12-10 19:14 ` ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) Patchwork 2025-12-11 3:23 ` ✓ i915.CI.Full: " Patchwork 22 siblings, 0 replies; 51+ messages in thread From: Patchwork @ 2025-12-09 11:31 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 77337 bytes --] == Series Details == Series: drm/i915/vga: Try to sort out the VGA decode mess (rev2) URL : https://patchwork.freedesktop.org/series/158651/ State : failure == Summary == CI Bug Log - changes from CI_DRM_17647 -> Patchwork_158651v2 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_158651v2 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_158651v2, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/index.html Participating hosts (8 -> 38) ------------------------------ Additional (31): fi-rkl-11600 bat-adlp-6 fi-skl-6600u bat-mtlp-9 fi-bsw-n3050 bat-dg2-8 bat-dg2-9 fi-hsw-4770 fi-ivb-3770 bat-twl-1 bat-apl-1 bat-dg2-11 bat-arls-5 fi-bsw-nick bat-twl-2 fi-kbl-7567u bat-dg1-7 bat-kbl-2 bat-arlh-3 bat-adlp-9 fi-cfl-8700k bat-dg1-6 bat-arls-6 bat-mtlp-8 bat-jsl-1 bat-adlp-11 fi-cfl-guc bat-jsl-5 fi-kbl-x1275 fi-kbl-8809g bat-dg2-14 Missing (1): bat-dg2-13 Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_158651v2: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live@hugepages: - fi-cfl-guc: NOTRUN -> [ABORT][1] +1 other test abort [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-guc/igt@i915_selftest@live@hugepages.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - fi-skl-6600u: NOTRUN -> [DMESG-WARN][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-skl-6600u/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html New tests --------- New tests have been introduced between CI_DRM_17647 and Patchwork_158651v2: ### New IGT tests (1) ### * igt@i915_selftest@addfb25-x-tiled-mismatch-legacy: - Statuses : - Exec time: [None] s Known issues ------------ Here are the changes found in Patchwork_158651v2 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@fbdev@eof: - fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#2582]) +3 other tests skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@fbdev@eof.html * igt@fbdev@info: - fi-kbl-x1275: NOTRUN -> [SKIP][4] ([i915#1849]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@fbdev@info.html - bat-adlp-11: NOTRUN -> [SKIP][5] ([i915#1849] / [i915#2582]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@fbdev@info.html - bat-dg1-6: NOTRUN -> [SKIP][6] ([i915#1849] / [i915#2582]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@fbdev@info.html - fi-rkl-11600: NOTRUN -> [SKIP][7] ([i915#1849] / [i915#2582]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@fbdev@info.html - fi-kbl-8809g: NOTRUN -> [SKIP][8] ([i915#1849]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@fbdev@info.html - fi-bsw-nick: NOTRUN -> [SKIP][9] ([i915#1849]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-nick/igt@fbdev@info.html - bat-kbl-2: NOTRUN -> [SKIP][10] ([i915#1849]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-kbl-2/igt@fbdev@info.html * igt@fbdev@nullptr: - bat-adlp-11: NOTRUN -> [SKIP][11] ([i915#2582]) +3 other tests skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@fbdev@nullptr.html - bat-dg1-6: NOTRUN -> [SKIP][12] ([i915#2582]) +3 other tests skip [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@fbdev@nullptr.html * igt@gem_huc_copy@huc-copy: - fi-kbl-7567u: NOTRUN -> [SKIP][13] ([i915#2190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-7567u/igt@gem_huc_copy@huc-copy.html - fi-kbl-8809g: NOTRUN -> [SKIP][14] ([i915#2190]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@gem_huc_copy@huc-copy.html - bat-jsl-5: NOTRUN -> [SKIP][15] ([i915#2190]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@gem_huc_copy@huc-copy.html - bat-jsl-1: NOTRUN -> [SKIP][16] ([i915#2190]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@gem_huc_copy@huc-copy.html - fi-cfl-8700k: NOTRUN -> [SKIP][17] ([i915#2190]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html - fi-rkl-11600: NOTRUN -> [SKIP][18] ([i915#2190]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html - fi-skl-6600u: NOTRUN -> [SKIP][19] ([i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html - fi-kbl-x1275: NOTRUN -> [SKIP][20] ([i915#2190]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - bat-arlh-3: NOTRUN -> [SKIP][21] ([i915#11671]) +3 other tests skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@gem_lmem_swapping@basic.html - bat-adlp-9: NOTRUN -> [SKIP][22] ([i915#4613]) +3 other tests skip [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@gem_lmem_swapping@basic.html - bat-twl-2: NOTRUN -> [SKIP][23] ([i915#10213] / [i915#11671]) +3 other tests skip [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@gem_lmem_swapping@basic.html - fi-kbl-7567u: NOTRUN -> [SKIP][24] ([i915#4613]) +3 other tests skip [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-7567u/igt@gem_lmem_swapping@basic.html - fi-cfl-8700k: NOTRUN -> [SKIP][25] ([i915#4613]) +3 other tests skip [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-8700k/igt@gem_lmem_swapping@basic.html - bat-twl-1: NOTRUN -> [SKIP][26] ([i915#10213] / [i915#11671]) +3 other tests skip [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@gem_lmem_swapping@basic.html - fi-kbl-8809g: NOTRUN -> [SKIP][27] ([i915#4613]) +3 other tests skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@gem_lmem_swapping@basic.html - bat-jsl-5: NOTRUN -> [SKIP][28] ([i915#4613]) +3 other tests skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@gem_lmem_swapping@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-bsw-nick: NOTRUN -> [SKIP][29] +24 other tests skip [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-nick/igt@gem_lmem_swapping@parallel-random-engines.html - bat-kbl-2: NOTRUN -> [SKIP][30] +23 other tests skip [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-kbl-2/igt@gem_lmem_swapping@parallel-random-engines.html - bat-arls-5: NOTRUN -> [SKIP][31] ([i915#10213] / [i915#11671]) +3 other tests skip [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@gem_lmem_swapping@parallel-random-engines.html - fi-rkl-11600: NOTRUN -> [SKIP][32] ([i915#4613]) +3 other tests skip [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html * igt@gem_lmem_swapping@random-engines: - fi-bsw-n3050: NOTRUN -> [SKIP][33] +21 other tests skip [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html - bat-adlp-6: NOTRUN -> [SKIP][34] ([i915#4613]) +3 other tests skip [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@gem_lmem_swapping@random-engines.html - fi-skl-6600u: NOTRUN -> [SKIP][35] ([i915#4613]) +3 other tests skip [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-skl-6600u/igt@gem_lmem_swapping@random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-cfl-guc: NOTRUN -> [SKIP][36] ([i915#4613]) +3 other tests skip [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-guc/igt@gem_lmem_swapping@verify-random.html - bat-mtlp-9: NOTRUN -> [SKIP][37] ([i915#4613]) +3 other tests skip [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@gem_lmem_swapping@verify-random.html - bat-arls-6: NOTRUN -> [SKIP][38] ([i915#10213] / [i915#11671]) +3 other tests skip [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@gem_lmem_swapping@verify-random.html - fi-kbl-x1275: NOTRUN -> [SKIP][39] ([i915#4613]) +3 other tests skip [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@gem_lmem_swapping@verify-random.html - bat-adlp-11: NOTRUN -> [SKIP][40] ([i915#4613]) +3 other tests skip [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@gem_lmem_swapping@verify-random.html - bat-mtlp-8: NOTRUN -> [SKIP][41] ([i915#4613]) +3 other tests skip [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@gem_lmem_swapping@verify-random.html - bat-jsl-1: NOTRUN -> [SKIP][42] ([i915#4613]) +3 other tests skip [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@gem_lmem_swapping@verify-random.html * igt@gem_mmap@basic: - bat-dg1-7: NOTRUN -> [SKIP][43] ([i915#4083]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@gem_mmap@basic.html - bat-mtlp-9: NOTRUN -> [SKIP][44] ([i915#4083]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@gem_mmap@basic.html - bat-dg2-9: NOTRUN -> [SKIP][45] ([i915#4083]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@gem_mmap@basic.html - bat-dg2-11: NOTRUN -> [SKIP][46] ([i915#4083]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@gem_mmap@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][47] ([i915#4083]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@gem_mmap@basic.html - bat-dg1-6: NOTRUN -> [SKIP][48] ([i915#4083]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@gem_mmap@basic.html - bat-dg2-8: NOTRUN -> [SKIP][49] ([i915#4083]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@gem_mmap@basic.html - bat-arls-6: NOTRUN -> [SKIP][50] ([i915#4083]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@gem_mmap@basic.html - bat-arlh-3: NOTRUN -> [SKIP][51] ([i915#11343]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@gem_mmap@basic.html - bat-dg2-14: NOTRUN -> [SKIP][52] ([i915#4083]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@gem_mmap@basic.html - bat-arls-5: NOTRUN -> [SKIP][53] ([i915#4083]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@gem_mmap@basic.html * igt@gem_mmap_gtt@basic: - bat-mtlp-9: NOTRUN -> [SKIP][54] ([i915#4077]) +2 other tests skip [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@gem_mmap_gtt@basic.html - bat-arls-6: NOTRUN -> [SKIP][55] ([i915#12637] / [i915#4077]) +2 other tests skip [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@gem_mmap_gtt@basic.html - bat-dg2-9: NOTRUN -> [SKIP][56] ([i915#4077]) +2 other tests skip [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@gem_mmap_gtt@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][57] ([i915#4077]) +2 other tests skip [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@gem_mmap_gtt@basic.html - bat-dg1-6: NOTRUN -> [SKIP][58] ([i915#4077]) +2 other tests skip [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@gem_mmap_gtt@basic.html - bat-dg2-8: NOTRUN -> [SKIP][59] ([i915#4077]) +2 other tests skip [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@gem_mmap_gtt@basic.html * igt@gem_render_tiled_blits@basic: - bat-mtlp-9: NOTRUN -> [SKIP][60] ([i915#4079]) +1 other test skip [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@gem_render_tiled_blits@basic.html - bat-arls-6: NOTRUN -> [SKIP][61] ([i915#10197] / [i915#10211] / [i915#4079]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@gem_render_tiled_blits@basic.html - bat-dg1-6: NOTRUN -> [SKIP][62] ([i915#4079]) +1 other test skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@gem_render_tiled_blits@basic.html - bat-dg2-14: NOTRUN -> [SKIP][63] ([i915#4079]) +1 other test skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@gem_render_tiled_blits@basic.html - bat-arls-5: NOTRUN -> [SKIP][64] ([i915#10197] / [i915#10211] / [i915#4079]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@gem_render_tiled_blits@basic.html - bat-arlh-3: NOTRUN -> [SKIP][65] ([i915#10211] / [i915#11725] / [i915#4079]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@gem_render_tiled_blits@basic.html - bat-dg2-9: NOTRUN -> [SKIP][66] ([i915#4079]) +1 other test skip [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@gem_render_tiled_blits@basic.html - bat-mtlp-8: NOTRUN -> [SKIP][67] ([i915#4079]) +1 other test skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@gem_render_tiled_blits@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-14: NOTRUN -> [SKIP][68] ([i915#4077]) +2 other tests skip [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@gem_tiled_fence_blits@basic.html - bat-arls-5: NOTRUN -> [SKIP][69] ([i915#12637] / [i915#4077]) +2 other tests skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@gem_tiled_fence_blits@basic.html - bat-dg1-7: NOTRUN -> [SKIP][70] ([i915#4077]) +2 other tests skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@gem_tiled_fence_blits@basic.html - bat-dg2-11: NOTRUN -> [SKIP][71] ([i915#4077]) +2 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@gem_tiled_fence_blits@basic.html * igt@gem_tiled_pread_basic: - bat-arls-5: NOTRUN -> [SKIP][72] ([i915#10206] / [i915#4079]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@gem_tiled_pread_basic.html - bat-adlp-6: NOTRUN -> [SKIP][73] ([i915#3282]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@gem_tiled_pread_basic.html - fi-rkl-11600: NOTRUN -> [SKIP][74] ([i915#3282]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@gem_tiled_pread_basic.html - bat-arlh-3: NOTRUN -> [SKIP][75] ([i915#11724] / [i915#4079]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@gem_tiled_pread_basic.html - bat-dg1-7: NOTRUN -> [SKIP][76] ([i915#4079]) +1 other test skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@gem_tiled_pread_basic.html - bat-adlp-9: NOTRUN -> [SKIP][77] ([i915#3282]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@gem_tiled_pread_basic.html - bat-twl-2: NOTRUN -> [SKIP][78] ([i915#11031]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@gem_tiled_pread_basic.html - bat-dg2-11: NOTRUN -> [SKIP][79] ([i915#4079]) +1 other test skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@gem_tiled_pread_basic.html - bat-twl-1: NOTRUN -> [SKIP][80] ([i915#11031]) [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@gem_tiled_pread_basic.html - bat-dg2-8: NOTRUN -> [SKIP][81] ([i915#4079]) +1 other test skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@gem_tiled_pread_basic.html - bat-arls-6: NOTRUN -> [SKIP][82] ([i915#10206] / [i915#4079]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@gem_tiled_pread_basic.html - bat-adlp-11: NOTRUN -> [SKIP][83] ([i915#3282]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-dg1-7: NOTRUN -> [SKIP][84] ([i915#11681] / [i915#6621]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@i915_pm_rps@basic-api.html - bat-adlp-9: NOTRUN -> [SKIP][85] ([i915#6621]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@i915_pm_rps@basic-api.html - bat-twl-2: NOTRUN -> [SKIP][86] ([i915#10209] / [i915#11681]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@i915_pm_rps@basic-api.html - bat-twl-1: NOTRUN -> [SKIP][87] ([i915#10209] / [i915#11681]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@i915_pm_rps@basic-api.html - bat-dg2-14: NOTRUN -> [SKIP][88] ([i915#11681] / [i915#6621]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@i915_pm_rps@basic-api.html - bat-arls-5: NOTRUN -> [SKIP][89] ([i915#10209] / [i915#11681]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@i915_pm_rps@basic-api.html - bat-adlp-6: NOTRUN -> [SKIP][90] ([i915#6621]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@i915_pm_rps@basic-api.html - bat-mtlp-9: NOTRUN -> [SKIP][91] ([i915#11681] / [i915#6621]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@i915_pm_rps@basic-api.html - bat-dg2-9: NOTRUN -> [SKIP][92] ([i915#11681] / [i915#6621]) [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@i915_pm_rps@basic-api.html - bat-dg2-11: NOTRUN -> [SKIP][93] ([i915#11681] / [i915#6621]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@i915_pm_rps@basic-api.html - bat-adlp-11: NOTRUN -> [SKIP][94] ([i915#6621]) [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@i915_pm_rps@basic-api.html - bat-mtlp-8: NOTRUN -> [SKIP][95] ([i915#11681] / [i915#6621]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@i915_pm_rps@basic-api.html - bat-dg1-6: NOTRUN -> [SKIP][96] ([i915#11681] / [i915#6621]) [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@i915_pm_rps@basic-api.html - bat-dg2-8: NOTRUN -> [SKIP][97] ([i915#11681] / [i915#6621]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@i915_pm_rps@basic-api.html - bat-arls-6: NOTRUN -> [SKIP][98] ([i915#10209] / [i915#11681]) [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@i915_pm_rps@basic-api.html - bat-arlh-3: NOTRUN -> [SKIP][99] ([i915#11681]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@i915_pm_rps@basic-api.html * igt@i915_selftest@live: - fi-kbl-x1275: NOTRUN -> [ABORT][100] ([i915#15399]) +1 other test abort [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@i915_selftest@live.html - bat-adlp-11: NOTRUN -> [ABORT][101] ([i915#14365] / [i915#15399]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@i915_selftest@live.html - fi-hsw-4770: NOTRUN -> [ABORT][102] ([i915#15399]) +1 other test abort [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-hsw-4770/igt@i915_selftest@live.html - fi-kbl-8809g: NOTRUN -> [ABORT][103] ([i915#15399]) +1 other test abort [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@i915_selftest@live.html - fi-ivb-3770: NOTRUN -> [ABORT][104] ([i915#15399]) +1 other test abort [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-ivb-3770/igt@i915_selftest@live.html - bat-mtlp-8: NOTRUN -> [ABORT][105] ([i915#15399]) +1 other test abort [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@i915_selftest@live.html - bat-dg1-6: NOTRUN -> [ABORT][106] ([i915#15399]) +1 other test abort [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@i915_selftest@live.html - bat-dg2-8: NOTRUN -> [ABORT][107] ([i915#15399]) +1 other test abort [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@i915_selftest@live.html - bat-jsl-1: NOTRUN -> [ABORT][108] ([i915#15399]) +1 other test abort [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@i915_selftest@live.html - fi-bsw-n3050: NOTRUN -> [ABORT][109] ([i915#15399]) +1 other test abort [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-n3050/igt@i915_selftest@live.html - bat-adlp-6: NOTRUN -> [ABORT][110] ([i915#14365] / [i915#15399]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@i915_selftest@live.html - fi-skl-6600u: NOTRUN -> [ABORT][111] ([i915#15399]) +1 other test abort [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-skl-6600u/igt@i915_selftest@live.html - bat-arlh-3: NOTRUN -> [ABORT][112] ([i915#15399]) +1 other test abort [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@i915_selftest@live.html - bat-adlp-9: NOTRUN -> [ABORT][113] ([i915#14365] / [i915#15399]) [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@i915_selftest@live.html - bat-twl-2: NOTRUN -> [ABORT][114] ([i915#14365] / [i915#15399]) [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@i915_selftest@live.html - bat-twl-1: NOTRUN -> [ABORT][115] ([i915#14365] / [i915#15399]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@i915_selftest@live.html * igt@i915_selftest@live@hugepages: - bat-adlp-9: NOTRUN -> [ABORT][116] ([i915#15399]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@i915_selftest@live@hugepages.html - bat-twl-2: NOTRUN -> [ABORT][117] ([i915#15399]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@i915_selftest@live@hugepages.html - fi-cfl-8700k: NOTRUN -> [ABORT][118] ([i915#15399]) +1 other test abort [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-8700k/igt@i915_selftest@live@hugepages.html - bat-twl-1: NOTRUN -> [ABORT][119] ([i915#15399]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@i915_selftest@live@hugepages.html - bat-apl-1: NOTRUN -> [ABORT][120] ([i915#15399]) +1 other test abort [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-apl-1/igt@i915_selftest@live@hugepages.html - bat-dg2-14: NOTRUN -> [ABORT][121] ([i915#15399]) +1 other test abort [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@i915_selftest@live@hugepages.html - fi-bsw-nick: NOTRUN -> [ABORT][122] ([i915#15399]) +1 other test abort [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-nick/igt@i915_selftest@live@hugepages.html - bat-kbl-2: NOTRUN -> [ABORT][123] ([i915#15399]) +1 other test abort [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-kbl-2/igt@i915_selftest@live@hugepages.html - bat-arls-5: NOTRUN -> [ABORT][124] ([i915#15399]) +1 other test abort [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@i915_selftest@live@hugepages.html - bat-adlp-6: NOTRUN -> [ABORT][125] ([i915#15399]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@i915_selftest@live@hugepages.html - fi-rkl-11600: NOTRUN -> [ABORT][126] ([i915#15399]) +1 other test abort [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@i915_selftest@live@hugepages.html - bat-dg1-7: NOTRUN -> [ABORT][127] ([i915#15399]) +1 other test abort [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@i915_selftest@live@hugepages.html - bat-dg2-9: NOTRUN -> [ABORT][128] ([i915#15399]) +1 other test abort [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@i915_selftest@live@hugepages.html - bat-dg2-11: NOTRUN -> [ABORT][129] ([i915#15399]) +1 other test abort [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@i915_selftest@live@hugepages.html - bat-adlp-11: NOTRUN -> [ABORT][130] ([i915#15399]) [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@i915_selftest@live@hugepages.html - fi-kbl-7567u: NOTRUN -> [ABORT][131] ([i915#15399]) +1 other test abort [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-7567u/igt@i915_selftest@live@hugepages.html - bat-jsl-5: NOTRUN -> [ABORT][132] ([i915#15399]) +1 other test abort [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@i915_selftest@live@hugepages.html - bat-mtlp-9: NOTRUN -> [ABORT][133] ([i915#15399]) +1 other test abort [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@i915_selftest@live@hugepages.html - bat-arls-6: NOTRUN -> [ABORT][134] ([i915#15399]) +1 other test abort [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@i915_selftest@live@hugepages.html * igt@i915_selftest@live@workarounds: - bat-dg2-11: NOTRUN -> [DMESG-FAIL][135] ([i915#12061]) [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@i915_selftest@live@workarounds.html - bat-dg2-14: NOTRUN -> [DMESG-FAIL][136] ([i915#12061]) [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@i915_selftest@live@workarounds.html - bat-arls-5: NOTRUN -> [DMESG-FAIL][137] ([i915#12061]) [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@i915_selftest@live@workarounds.html - bat-arls-6: NOTRUN -> [DMESG-FAIL][138] ([i915#12061]) [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@i915_selftest@live@workarounds.html * igt@intel_hwmon@hwmon-read: - fi-rkl-11600: NOTRUN -> [SKIP][139] ([i915#7707]) +1 other test skip [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@intel_hwmon@hwmon-read.html - bat-mtlp-9: NOTRUN -> [SKIP][140] ([i915#7707]) +1 other test skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@intel_hwmon@hwmon-read.html - bat-arls-6: NOTRUN -> [SKIP][141] ([i915#7707]) +1 other test skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@intel_hwmon@hwmon-read.html - bat-adlp-11: NOTRUN -> [SKIP][142] ([i915#7707]) +1 other test skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@intel_hwmon@hwmon-read.html - bat-mtlp-8: NOTRUN -> [SKIP][143] ([i915#7707]) +1 other test skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@intel_hwmon@hwmon-read.html - bat-jsl-1: NOTRUN -> [SKIP][144] ([i915#7707]) +1 other test skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@intel_hwmon@hwmon-read.html - bat-adlp-6: NOTRUN -> [SKIP][145] ([i915#7707]) +1 other test skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@intel_hwmon@hwmon-read.html - bat-arlh-3: NOTRUN -> [SKIP][146] ([i915#11680]) +1 other test skip [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@intel_hwmon@hwmon-read.html * igt@intel_hwmon@hwmon-write: - bat-adlp-9: NOTRUN -> [SKIP][147] ([i915#7707]) +1 other test skip [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@intel_hwmon@hwmon-write.html - bat-twl-2: NOTRUN -> [SKIP][148] ([i915#7707]) +1 other test skip [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@intel_hwmon@hwmon-write.html - bat-twl-1: NOTRUN -> [SKIP][149] ([i915#7707]) +1 other test skip [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@intel_hwmon@hwmon-write.html - bat-jsl-5: NOTRUN -> [SKIP][150] ([i915#7707]) +1 other test skip [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@intel_hwmon@hwmon-write.html - bat-arls-5: NOTRUN -> [SKIP][151] ([i915#7707]) +1 other test skip [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@intel_hwmon@hwmon-write.html * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling: - bat-dg1-6: NOTRUN -> [SKIP][152] ([i915#12311] / [i915#4212]) +7 other tests skip [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg1-7: NOTRUN -> [SKIP][153] ([i915#4212]) +7 other tests skip [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html - bat-dg2-11: NOTRUN -> [SKIP][154] ([i915#4212]) +7 other tests skip [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-9: NOTRUN -> [SKIP][155] ([i915#5190]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - fi-hsw-4770: NOTRUN -> [SKIP][156] ([i915#5190]) [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-mtlp-8: NOTRUN -> [SKIP][157] ([i915#5190]) [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-dg2-8: NOTRUN -> [SKIP][158] ([i915#5190]) [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-arls-6: NOTRUN -> [SKIP][159] ([i915#10200] / [i915#12203]) [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-arlh-3: NOTRUN -> [SKIP][160] ([i915#11666] / [i915#12203]) [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-dg2-11: NOTRUN -> [SKIP][161] ([i915#5190]) [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-dg2-14: NOTRUN -> [SKIP][162] ([i915#5190]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-arls-5: NOTRUN -> [SKIP][163] ([i915#10200] / [i915#12203]) [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html - bat-mtlp-9: NOTRUN -> [SKIP][164] ([i915#5190]) [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-x-tiled-legacy: - bat-dg2-14: NOTRUN -> [SKIP][165] ([i915#4212]) +7 other tests skip [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_addfb_basic@basic-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-mtlp-9: NOTRUN -> [SKIP][166] ([i915#4212]) +8 other tests skip [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-arls-6: NOTRUN -> [SKIP][167] ([i915#10200]) +8 other tests skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg2-9: NOTRUN -> [SKIP][168] ([i915#4215] / [i915#5190]) [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-mtlp-8: NOTRUN -> [SKIP][169] ([i915#4212]) +8 other tests skip [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg1-6: NOTRUN -> [SKIP][170] ([i915#12311] / [i915#4215]) [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg2-8: NOTRUN -> [SKIP][171] ([i915#4215] / [i915#5190]) [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg1-7: NOTRUN -> [SKIP][172] ([i915#4215]) [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg2-11: NOTRUN -> [SKIP][173] ([i915#4215] / [i915#5190]) [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_addfb_basic@basic-y-tiled-legacy.html - bat-dg2-14: NOTRUN -> [SKIP][174] ([i915#4215] / [i915#5190]) [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_addfb_basic@basic-y-tiled-legacy.html * igt@kms_addfb_basic@bo-too-small-due-to-tiling: - bat-arlh-3: NOTRUN -> [SKIP][175] ([i915#11666]) +8 other tests skip [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_addfb_basic@bo-too-small-due-to-tiling.html * igt@kms_addfb_basic@clobberred-modifier: - bat-arls-5: NOTRUN -> [SKIP][176] ([i915#10200]) +8 other tests skip [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_addfb_basic@clobberred-modifier.html * igt@kms_addfb_basic@framebuffer-vs-set-tiling: - bat-dg2-9: NOTRUN -> [SKIP][177] ([i915#4212]) +7 other tests skip [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html - bat-dg2-8: NOTRUN -> [SKIP][178] ([i915#4212]) +7 other tests skip [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html * igt@kms_busy@basic: - bat-dg1-6: NOTRUN -> [SKIP][179] ([i915#11190] / [i915#12311] / [i915#4303]) [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_busy@basic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-adlp-9: NOTRUN -> [SKIP][180] ([i915#4103]) +1 other test skip [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - bat-twl-2: NOTRUN -> [SKIP][181] ([i915#11030] / [i915#11731]) +1 other test skip [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - bat-dg2-11: NOTRUN -> [SKIP][182] ([i915#4103] / [i915#4213]) +1 other test skip [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html - bat-arls-6: NOTRUN -> [SKIP][183] ([i915#10202]) +1 other test skip [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-twl-1: NOTRUN -> [SKIP][184] ([i915#11030] / [i915#11731]) +1 other test skip [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-jsl-5: NOTRUN -> [SKIP][185] ([i915#4103]) +1 other test skip [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-dg2-14: NOTRUN -> [SKIP][186] ([i915#4103] / [i915#4213]) +1 other test skip [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-arls-5: NOTRUN -> [SKIP][187] ([i915#10202]) +1 other test skip [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-mtlp-9: NOTRUN -> [SKIP][188] ([i915#4213]) +1 other test skip [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-dg2-9: NOTRUN -> [SKIP][189] ([i915#4103] / [i915#4213]) +1 other test skip [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-mtlp-8: NOTRUN -> [SKIP][190] ([i915#4213]) +1 other test skip [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-dg2-8: NOTRUN -> [SKIP][191] ([i915#4103] / [i915#4213]) +1 other test skip [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-jsl-1: NOTRUN -> [SKIP][192] ([i915#4103]) +1 other test skip [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-adlp-6: NOTRUN -> [SKIP][193] ([i915#4103]) +1 other test skip [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-arlh-3: NOTRUN -> [SKIP][194] ([i915#11731]) +1 other test skip [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html - bat-dg1-7: NOTRUN -> [SKIP][195] ([i915#4103] / [i915#4213]) +1 other test skip [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size: - bat-dg1-6: NOTRUN -> [SKIP][196] ([i915#11190] / [i915#12311]) +15 other tests skip [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html * igt@kms_dsc@dsc-basic: - bat-dg2-11: NOTRUN -> [SKIP][197] ([i915#3555] / [i915#3840]) [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_dsc@dsc-basic.html - bat-twl-1: NOTRUN -> [SKIP][198] ([i915#9886]) [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@kms_dsc@dsc-basic.html - fi-kbl-8809g: NOTRUN -> [SKIP][199] ([i915#11190]) +16 other tests skip [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@kms_dsc@dsc-basic.html - bat-jsl-5: NOTRUN -> [SKIP][200] ([i915#3555] / [i915#9886]) [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_dsc@dsc-basic.html - bat-dg2-14: NOTRUN -> [SKIP][201] ([i915#3555] / [i915#3840]) [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_dsc@dsc-basic.html - bat-arls-5: NOTRUN -> [SKIP][202] ([i915#9886]) [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_dsc@dsc-basic.html - bat-mtlp-9: NOTRUN -> [SKIP][203] ([i915#3555] / [i915#3840] / [i915#9159]) [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_dsc@dsc-basic.html - bat-arls-6: NOTRUN -> [SKIP][204] ([i915#9886]) [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_dsc@dsc-basic.html - bat-mtlp-8: NOTRUN -> [SKIP][205] ([i915#3555] / [i915#3840] / [i915#9159]) [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_dsc@dsc-basic.html - bat-jsl-1: NOTRUN -> [SKIP][206] ([i915#3555] / [i915#9886]) [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@kms_dsc@dsc-basic.html - bat-arlh-3: NOTRUN -> [SKIP][207] ([i915#9886]) [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_dsc@dsc-basic.html - bat-dg1-7: NOTRUN -> [SKIP][208] ([i915#3555] / [i915#3840]) [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_dsc@dsc-basic.html - bat-adlp-9: NOTRUN -> [SKIP][209] ([i915#3555] / [i915#3840]) [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_dsc@dsc-basic.html - bat-twl-2: NOTRUN -> [SKIP][210] ([i915#9886]) [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@kms_dsc@dsc-basic.html * igt@kms_flip@basic-flip-vs-dpms: - bat-adlp-11: NOTRUN -> [SKIP][211] ([i915#3637]) +3 other tests skip [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_flip@basic-flip-vs-dpms.html - bat-dg1-6: NOTRUN -> [SKIP][212] ([i915#12311] / [i915#3637]) +2 other tests skip [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_flip@basic-flip-vs-dpms.html * igt@kms_flip@basic-flip-vs-wf_vblank: - fi-rkl-11600: NOTRUN -> [SKIP][213] ([i915#3637]) +3 other tests skip [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_flip@basic-plain-flip: - bat-dg1-6: NOTRUN -> [SKIP][214] ([i915#12311]) +1 other test skip [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_flip@basic-plain-flip.html * igt@kms_force_connector_basic@force-load-detect: - fi-kbl-7567u: NOTRUN -> [SKIP][215] +12 other tests skip [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-7567u/igt@kms_force_connector_basic@force-load-detect.html - fi-cfl-8700k: NOTRUN -> [SKIP][216] +12 other tests skip [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-8700k/igt@kms_force_connector_basic@force-load-detect.html - bat-twl-1: NOTRUN -> [SKIP][217] ([i915#11032]) [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@kms_force_connector_basic@force-load-detect.html - fi-kbl-8809g: NOTRUN -> [SKIP][218] +18 other tests skip [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-8809g/igt@kms_force_connector_basic@force-load-detect.html - bat-jsl-5: NOTRUN -> [SKIP][219] [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_force_connector_basic@force-load-detect.html - bat-dg2-14: NOTRUN -> [SKIP][220] [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_force_connector_basic@force-load-detect.html - bat-arls-5: NOTRUN -> [SKIP][221] ([i915#10207]) [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_force_connector_basic@force-load-detect.html - fi-rkl-11600: NOTRUN -> [SKIP][222] [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html - bat-mtlp-9: NOTRUN -> [SKIP][223] [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_force_connector_basic@force-load-detect.html - bat-arls-6: NOTRUN -> [SKIP][224] ([i915#10207]) [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_force_connector_basic@force-load-detect.html - bat-dg2-9: NOTRUN -> [SKIP][225] [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_force_connector_basic@force-load-detect.html - bat-mtlp-8: NOTRUN -> [SKIP][226] [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_force_connector_basic@force-load-detect.html - bat-dg2-8: NOTRUN -> [SKIP][227] [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html - bat-jsl-1: NOTRUN -> [SKIP][228] [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@kms_force_connector_basic@force-load-detect.html - bat-adlp-6: NOTRUN -> [SKIP][229] [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@kms_force_connector_basic@force-load-detect.html - bat-arlh-3: NOTRUN -> [SKIP][230] ([i915#10207]) [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_force_connector_basic@force-load-detect.html - bat-dg1-7: NOTRUN -> [SKIP][231] [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_force_connector_basic@force-load-detect.html - bat-adlp-9: NOTRUN -> [SKIP][232] [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_force_connector_basic@force-load-detect.html - bat-twl-2: NOTRUN -> [SKIP][233] ([i915#11032]) [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@kms_force_connector_basic@force-load-detect.html - bat-dg2-11: NOTRUN -> [SKIP][234] [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-adlp-11: NOTRUN -> [SKIP][235] ([i915#4093]) +3 other tests skip [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_force_connector_basic@prune-stale-modes.html * igt@kms_frontbuffer_tracking@basic: - fi-kbl-x1275: NOTRUN -> [SKIP][236] +19 other tests skip [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@kms_frontbuffer_tracking@basic.html - bat-adlp-11: NOTRUN -> [SKIP][237] ([i915#4342] / [i915#5354]) [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_frontbuffer_tracking@basic.html - bat-dg1-6: NOTRUN -> [SKIP][238] ([i915#12311] / [i915#4342]) [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_frontbuffer_tracking@basic.html - fi-rkl-11600: NOTRUN -> [SKIP][239] ([i915#1849] / [i915#5354]) [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_frontbuffer_tracking@basic.html * igt@kms_hdmi_inject@inject-audio: - bat-adlp-11: NOTRUN -> [SKIP][240] ([i915#4369]) [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_hdmi_inject@inject-audio.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1: - fi-hsw-4770: NOTRUN -> [SKIP][241] +15 other tests skip [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-edp-1: - fi-skl-6600u: NOTRUN -> [SKIP][242] +10 other tests skip [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-edp-1.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24: - fi-rkl-11600: NOTRUN -> [SKIP][243] ([i915#11190]) +16 other tests skip [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html * igt@kms_pipe_crc_basic@read-crc: - fi-kbl-x1275: NOTRUN -> [SKIP][244] ([i915#11190]) +16 other tests skip [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-kbl-x1275/igt@kms_pipe_crc_basic@read-crc.html - bat-adlp-11: NOTRUN -> [SKIP][245] ([i915#11190]) +16 other tests skip [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_pipe_crc_basic@read-crc.html * igt@kms_pipe_crc_basic@read-crc-frame-sequence: - fi-bsw-nick: NOTRUN -> [SKIP][246] ([i915#11190]) +16 other tests skip [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-bsw-nick/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html - bat-kbl-2: NOTRUN -> [SKIP][247] ([i915#11190]) +16 other tests skip [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-kbl-2/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html * igt@kms_pm_backlight@basic-brightness: - bat-apl-1: NOTRUN -> [SKIP][248] +24 other tests skip [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-apl-1/igt@kms_pm_backlight@basic-brightness.html - bat-arls-5: NOTRUN -> [SKIP][249] ([i915#9812]) [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_pm_backlight@basic-brightness.html - fi-rkl-11600: NOTRUN -> [SKIP][250] ([i915#5354]) [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_pm_backlight@basic-brightness.html - bat-dg1-7: NOTRUN -> [SKIP][251] ([i915#5354]) [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_pm_backlight@basic-brightness.html - bat-dg2-11: NOTRUN -> [SKIP][252] ([i915#5354]) [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_pm_backlight@basic-brightness.html - bat-jsl-5: NOTRUN -> [SKIP][253] ([i915#15205]) [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_pm_backlight@basic-brightness.html - bat-dg2-14: NOTRUN -> [SKIP][254] ([i915#5354]) [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_pm_backlight@basic-brightness.html - bat-dg2-8: NOTRUN -> [SKIP][255] ([i915#5354]) [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_pm_backlight@basic-brightness.html - bat-arls-6: NOTRUN -> [SKIP][256] ([i915#9812]) [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_pm_backlight@basic-brightness.html - bat-dg2-9: NOTRUN -> [SKIP][257] ([i915#5354]) [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_pm_backlight@basic-brightness.html - bat-adlp-11: NOTRUN -> [SKIP][258] ([i915#9812]) [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_pm_backlight@basic-brightness.html - bat-dg1-6: NOTRUN -> [SKIP][259] ([i915#12311] / [i915#5354]) [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_pm_backlight@basic-brightness.html - bat-adlp-9: NOTRUN -> [SKIP][260] ([i915#9812]) [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_pm_backlight@basic-brightness.html * igt@kms_pm_rpm@basic-pci-d3-state: - fi-ivb-3770: NOTRUN -> [SKIP][261] +24 other tests skip [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-ivb-3770/igt@kms_pm_rpm@basic-pci-d3-state.html * igt@kms_psr@psr-cursor-plane-move: - fi-cfl-guc: NOTRUN -> [SKIP][262] +12 other tests skip [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-cfl-guc/igt@kms_psr@psr-cursor-plane-move.html - bat-arls-6: NOTRUN -> [SKIP][263] ([i915#9732]) +3 other tests skip [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_psr@psr-cursor-plane-move.html * igt@kms_psr@psr-primary-mmap-gtt: - bat-mtlp-9: NOTRUN -> [SKIP][264] ([i915#4077] / [i915#9688]) +1 other test skip [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_psr@psr-primary-mmap-gtt.html - bat-mtlp-8: NOTRUN -> [SKIP][265] ([i915#4077] / [i915#9688]) +1 other test skip [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_psr@psr-primary-mmap-gtt.html - bat-dg1-6: NOTRUN -> [SKIP][266] ([i915#1072] / [i915#12311] / [i915#9732]) +3 other tests skip [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_psr@psr-primary-mmap-gtt.html - bat-arlh-3: NOTRUN -> [SKIP][267] ([i915#12637] / [i915#9688]) +1 other test skip [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_psr@psr-primary-mmap-gtt.html * igt@kms_psr@psr-primary-page-flip: - bat-dg1-7: NOTRUN -> [SKIP][268] ([i915#1072] / [i915#9732]) +3 other tests skip [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_psr@psr-primary-page-flip.html * igt@kms_psr@psr-sprite-plane-onoff: - bat-adlp-9: NOTRUN -> [SKIP][269] ([i915#1072] / [i915#9732]) +3 other tests skip [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_psr@psr-sprite-plane-onoff.html - bat-dg2-11: NOTRUN -> [SKIP][270] ([i915#1072] / [i915#9732]) +3 other tests skip [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_psr@psr-sprite-plane-onoff.html - bat-jsl-5: NOTRUN -> [SKIP][271] ([i915#1072]) +3 other tests skip [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_psr@psr-sprite-plane-onoff.html - bat-dg2-14: NOTRUN -> [SKIP][272] ([i915#1072] / [i915#9732]) +3 other tests skip [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_psr@psr-sprite-plane-onoff.html - bat-arls-5: NOTRUN -> [SKIP][273] ([i915#9732]) +3 other tests skip [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_psr@psr-sprite-plane-onoff.html - fi-rkl-11600: NOTRUN -> [SKIP][274] ([i915#1072] / [i915#9732]) +3 other tests skip [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_psr@psr-sprite-plane-onoff.html - bat-dg2-9: NOTRUN -> [SKIP][275] ([i915#1072] / [i915#9732]) +3 other tests skip [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_psr@psr-sprite-plane-onoff.html - bat-adlp-11: NOTRUN -> [SKIP][276] ([i915#1072] / [i915#9732]) +3 other tests skip [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_psr@psr-sprite-plane-onoff.html - fi-hsw-4770: NOTRUN -> [SKIP][277] ([i915#1072]) +3 other tests skip [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-hsw-4770/igt@kms_psr@psr-sprite-plane-onoff.html - bat-dg2-8: NOTRUN -> [SKIP][278] ([i915#1072] / [i915#9732]) +3 other tests skip [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_psr@psr-sprite-plane-onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-adlp-9: NOTRUN -> [SKIP][279] ([i915#3555]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@kms_setmode@basic-clone-single-crtc.html - bat-twl-2: NOTRUN -> [SKIP][280] ([i915#8809]) [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@kms_setmode@basic-clone-single-crtc.html - bat-twl-1: NOTRUN -> [SKIP][281] ([i915#8809]) [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg2-14: NOTRUN -> [SKIP][282] ([i915#3555]) [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@kms_setmode@basic-clone-single-crtc.html - bat-arls-5: NOTRUN -> [SKIP][283] ([i915#10208] / [i915#8809]) [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@kms_setmode@basic-clone-single-crtc.html - bat-adlp-6: NOTRUN -> [SKIP][284] ([i915#3555]) [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@kms_setmode@basic-clone-single-crtc.html - fi-rkl-11600: NOTRUN -> [SKIP][285] ([i915#3555]) [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html - bat-mtlp-9: NOTRUN -> [SKIP][286] ([i915#3555] / [i915#8809]) [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg2-9: NOTRUN -> [SKIP][287] ([i915#3555]) [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg2-11: NOTRUN -> [SKIP][288] ([i915#3555]) [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html - bat-adlp-11: NOTRUN -> [SKIP][289] ([i915#3555]) [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@kms_setmode@basic-clone-single-crtc.html - bat-jsl-5: NOTRUN -> [SKIP][290] ([i915#3555]) [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-5/igt@kms_setmode@basic-clone-single-crtc.html - bat-mtlp-8: NOTRUN -> [SKIP][291] ([i915#3555] / [i915#8809]) [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg1-6: NOTRUN -> [SKIP][292] ([i915#12311] / [i915#3555]) [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg2-8: NOTRUN -> [SKIP][293] ([i915#3555]) [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html - bat-jsl-1: NOTRUN -> [SKIP][294] ([i915#3555]) [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-jsl-1/igt@kms_setmode@basic-clone-single-crtc.html - bat-arls-6: NOTRUN -> [SKIP][295] ([i915#10208] / [i915#8809]) [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@kms_setmode@basic-clone-single-crtc.html - bat-arlh-3: NOTRUN -> [SKIP][296] ([i915#8809]) [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@kms_setmode@basic-clone-single-crtc.html - bat-dg1-7: NOTRUN -> [SKIP][297] ([i915#3555]) [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@kms_setmode@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-dg1-7: NOTRUN -> [SKIP][298] ([i915#3708]) +3 other tests skip [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@prime_vgem@basic-fence-flip.html - bat-dg2-9: NOTRUN -> [SKIP][299] ([i915#3708]) [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@prime_vgem@basic-fence-flip.html - bat-dg2-11: NOTRUN -> [SKIP][300] ([i915#3708]) [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@prime_vgem@basic-fence-flip.html - bat-dg2-14: NOTRUN -> [SKIP][301] ([i915#3708]) [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@prime_vgem@basic-fence-flip.html - bat-dg2-8: NOTRUN -> [SKIP][302] ([i915#3708]) [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html - bat-adlp-11: NOTRUN -> [SKIP][303] ([i915#3708]) [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@prime_vgem@basic-fence-flip.html - fi-rkl-11600: NOTRUN -> [SKIP][304] ([i915#3708]) [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@prime_vgem@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - bat-arlh-3: NOTRUN -> [SKIP][305] ([i915#12637]) +4 other tests skip [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@prime_vgem@basic-fence-mmap.html - bat-dg1-7: NOTRUN -> [SKIP][306] ([i915#3708] / [i915#4077]) +1 other test skip [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-7/igt@prime_vgem@basic-fence-mmap.html - bat-dg2-11: NOTRUN -> [SKIP][307] ([i915#3708] / [i915#4077]) +1 other test skip [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@prime_vgem@basic-fence-mmap.html - bat-dg2-14: NOTRUN -> [SKIP][308] ([i915#3708] / [i915#4077]) +1 other test skip [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@prime_vgem@basic-fence-mmap.html - bat-dg2-8: NOTRUN -> [SKIP][309] ([i915#3708] / [i915#4077]) +1 other test skip [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html - bat-mtlp-9: NOTRUN -> [SKIP][310] ([i915#3708] / [i915#4077]) +1 other test skip [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@prime_vgem@basic-fence-mmap.html - bat-arls-6: NOTRUN -> [SKIP][311] ([i915#12637] / [i915#3708] / [i915#4077]) +1 other test skip [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@prime_vgem@basic-fence-mmap.html - bat-dg2-9: NOTRUN -> [SKIP][312] ([i915#3708] / [i915#4077]) +1 other test skip [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@prime_vgem@basic-fence-mmap.html - bat-mtlp-8: NOTRUN -> [SKIP][313] ([i915#3708] / [i915#4077]) +1 other test skip [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@prime_vgem@basic-fence-mmap.html - bat-dg1-6: NOTRUN -> [SKIP][314] ([i915#3708] / [i915#4077]) +1 other test skip [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@prime_vgem@basic-fence-mmap.html * igt@prime_vgem@basic-fence-read: - bat-adlp-11: NOTRUN -> [SKIP][315] ([i915#3291] / [i915#3708]) +2 other tests skip [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-11/igt@prime_vgem@basic-fence-read.html - bat-mtlp-8: NOTRUN -> [SKIP][316] ([i915#3708]) +1 other test skip [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@prime_vgem@basic-fence-read.html - bat-dg1-6: NOTRUN -> [SKIP][317] ([i915#3708]) +2 other tests skip [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@prime_vgem@basic-fence-read.html - bat-adlp-9: NOTRUN -> [SKIP][318] ([i915#3291] / [i915#3708]) +2 other tests skip [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-9/igt@prime_vgem@basic-fence-read.html - bat-arls-5: NOTRUN -> [SKIP][319] ([i915#10212] / [i915#3708]) [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@prime_vgem@basic-fence-read.html - bat-adlp-6: NOTRUN -> [SKIP][320] ([i915#3291] / [i915#3708]) +2 other tests skip [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-adlp-6/igt@prime_vgem@basic-fence-read.html - bat-arlh-3: NOTRUN -> [SKIP][321] ([i915#11726]) +1 other test skip [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@prime_vgem@basic-fence-read.html - bat-twl-2: NOTRUN -> [SKIP][322] ([i915#10212] / [i915#3708]) [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@prime_vgem@basic-fence-read.html - bat-twl-1: NOTRUN -> [SKIP][323] ([i915#10212] / [i915#3708]) [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@prime_vgem@basic-fence-read.html - bat-arls-6: NOTRUN -> [SKIP][324] ([i915#10212] / [i915#3708]) [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@prime_vgem@basic-fence-read.html * igt@prime_vgem@basic-gtt: - bat-arls-5: NOTRUN -> [SKIP][325] ([i915#12637] / [i915#3708] / [i915#4077]) +1 other test skip [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@prime_vgem@basic-gtt.html * igt@prime_vgem@basic-read: - bat-dg2-11: NOTRUN -> [SKIP][326] ([i915#3291] / [i915#3708]) +2 other tests skip [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-11/igt@prime_vgem@basic-read.html - bat-twl-1: NOTRUN -> [SKIP][327] ([i915#10214] / [i915#3708]) [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@prime_vgem@basic-read.html - bat-dg2-14: NOTRUN -> [SKIP][328] ([i915#3291] / [i915#3708]) +2 other tests skip [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-14/igt@prime_vgem@basic-read.html - bat-arls-5: NOTRUN -> [SKIP][329] ([i915#10214] / [i915#3708]) [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@prime_vgem@basic-read.html - fi-rkl-11600: NOTRUN -> [SKIP][330] ([i915#3291] / [i915#3708]) +2 other tests skip [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/fi-rkl-11600/igt@prime_vgem@basic-read.html - bat-mtlp-9: NOTRUN -> [SKIP][331] ([i915#3708]) +1 other test skip [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@prime_vgem@basic-read.html - bat-arls-6: NOTRUN -> [SKIP][332] ([i915#10214] / [i915#3708]) [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@prime_vgem@basic-read.html - bat-twl-2: NOTRUN -> [SKIP][333] ([i915#10214] / [i915#3708]) [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@prime_vgem@basic-read.html * igt@prime_vgem@basic-write: - bat-mtlp-9: NOTRUN -> [SKIP][334] ([i915#10216] / [i915#3708]) [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-9/igt@prime_vgem@basic-write.html - bat-arls-6: NOTRUN -> [SKIP][335] ([i915#10216] / [i915#3708]) [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-6/igt@prime_vgem@basic-write.html - bat-dg2-9: NOTRUN -> [SKIP][336] ([i915#3291] / [i915#3708]) +2 other tests skip [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-9/igt@prime_vgem@basic-write.html - bat-mtlp-8: NOTRUN -> [SKIP][337] ([i915#10216] / [i915#3708]) [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-mtlp-8/igt@prime_vgem@basic-write.html - bat-dg1-6: NOTRUN -> [SKIP][338] ([i915#11723] / [i915#3708]) [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg1-6/igt@prime_vgem@basic-write.html - bat-dg2-8: NOTRUN -> [SKIP][339] ([i915#3291] / [i915#3708]) +2 other tests skip [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-dg2-8/igt@prime_vgem@basic-write.html - bat-arlh-3: NOTRUN -> [SKIP][340] ([i915#11723]) [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arlh-3/igt@prime_vgem@basic-write.html - bat-twl-2: NOTRUN -> [SKIP][341] ([i915#10216] / [i915#3708]) [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-2/igt@prime_vgem@basic-write.html - bat-twl-1: NOTRUN -> [SKIP][342] ([i915#10216] / [i915#3708]) [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-twl-1/igt@prime_vgem@basic-write.html - bat-arls-5: NOTRUN -> [SKIP][343] ([i915#10216] / [i915#3708]) [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-arls-5/igt@prime_vgem@basic-write.html #### Warnings #### * igt@i915_selftest@live: - bat-atsm-1: [INCOMPLETE][344] ([i915#12061] / [i915#15157]) -> [INCOMPLETE][345] ([i915#12061] / [i915#15157] / [i915#15399]) [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17647/bat-atsm-1/igt@i915_selftest@live.html [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/bat-atsm-1/igt@i915_selftest@live.html [i915#10197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10197 [i915#10200]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10200 [i915#10202]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10202 [i915#10206]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10206 [i915#10207]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10207 [i915#10208]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10208 [i915#10209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10209 [i915#10211]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10211 [i915#10212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10212 [i915#10213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10213 [i915#10214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10214 [i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216 [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072 [i915#11030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11030 [i915#11031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11031 [i915#11032]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11032 [i915#11190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11190 [i915#11343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11343 [i915#11666]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11666 [i915#11671]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11671 [i915#11680]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11680 [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681 [i915#11723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11723 [i915#11724]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11724 [i915#11725]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11725 [i915#11726]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11726 [i915#11731]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11731 [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#12203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12203 [i915#12311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12311 [i915#12637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12637 [i915#14365]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14365 [i915#15157]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15157 [i915#15205]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15205 [i915#15399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15399 [i915#1849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1849 [i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190 [i915#2582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2582 [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637 [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083 [i915#4093]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4093 [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213 [i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215 [i915#4303]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4303 [i915#4342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4342 [i915#4369]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4369 [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613 [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190 [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354 [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621 [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707 [i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809 [i915#9159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9159 [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688 [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732 [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812 [i915#9886]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9886 Build changes ------------- * Linux: CI_DRM_17647 -> Patchwork_158651v2 CI-20190529: 20190529 CI_DRM_17647: 48deab361d3b570e2210875fdc8ffb29627d054f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8659: 8659 Patchwork_158651v2: 48deab361d3b570e2210875fdc8ffb29627d054f @ git://anongit.freedesktop.org/gfx-ci/linux == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v2/index.html [-- Attachment #2: Type: text/html, Size: 108120 bytes --] ^ permalink raw reply [flat|nested] 51+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (20 preceding siblings ...) 2025-12-09 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork @ 2025-12-10 19:14 ` Patchwork 2025-12-11 3:23 ` ✓ i915.CI.Full: " Patchwork 22 siblings, 0 replies; 51+ messages in thread From: Patchwork @ 2025-12-10 19:14 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 2974 bytes --] == Series Details == Series: drm/i915/vga: Try to sort out the VGA decode mess (rev3) URL : https://patchwork.freedesktop.org/series/158651/ State : success == Summary == CI Bug Log - changes from CI_DRM_17657 -> Patchwork_158651v3 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/index.html Participating hosts (42 -> 41) ------------------------------ Missing (1): bat-dg2-13 Known issues ------------ Here are the changes found in Patchwork_158651v3 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_hdmi_inject@inject-audio: - fi-tgl-1115g4: [PASS][1] -> [FAIL][2] ([i915#14867]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html #### Possible fixes #### * igt@i915_selftest@live@workarounds: - bat-mtlp-9: [DMESG-FAIL][3] ([i915#12061]) -> [PASS][4] +1 other test pass [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/bat-mtlp-9/igt@i915_selftest@live@workarounds.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/bat-mtlp-9/igt@i915_selftest@live@workarounds.html #### Warnings #### * igt@i915_selftest@live: - bat-atsm-1: [DMESG-FAIL][5] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][6] ([i915#12061] / [i915#13929]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/bat-atsm-1/igt@i915_selftest@live.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/bat-atsm-1/igt@i915_selftest@live.html * igt@i915_selftest@live@mman: - bat-atsm-1: [DMESG-FAIL][7] ([i915#14204]) -> [DMESG-FAIL][8] ([i915#13929]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/bat-atsm-1/igt@i915_selftest@live@mman.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/bat-atsm-1/igt@i915_selftest@live@mman.html [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929 [i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204 [i915#14867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14867 Build changes ------------- * Linux: CI_DRM_17657 -> Patchwork_158651v3 CI-20190529: 20190529 CI_DRM_17657: 474dafdcaf4e88df55d19684ff32a654ad0e8fd3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8662: 9410b6926f317e8bf824502394e09ee8753ff65e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_158651v3: 474dafdcaf4e88df55d19684ff32a654ad0e8fd3 @ git://anongit.freedesktop.org/gfx-ci/linux == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/index.html [-- Attachment #2: Type: text/html, Size: 3942 bytes --] ^ permalink raw reply [flat|nested] 51+ messages in thread
* ✓ i915.CI.Full: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) 2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala ` (21 preceding siblings ...) 2025-12-10 19:14 ` ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) Patchwork @ 2025-12-11 3:23 ` Patchwork 22 siblings, 0 replies; 51+ messages in thread From: Patchwork @ 2025-12-11 3:23 UTC (permalink / raw) To: Ville Syrjala; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 98444 bytes --] == Series Details == Series: drm/i915/vga: Try to sort out the VGA decode mess (rev3) URL : https://patchwork.freedesktop.org/series/158651/ State : success == Summary == CI Bug Log - changes from CI_DRM_17657_full -> Patchwork_158651v3_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (11 -> 10) ------------------------------ Missing (1): shard-dg2-set2 New tests --------- New tests have been introduced between CI_DRM_17657_full and Patchwork_158651v3_full: ### New IGT tests (4) ### * igt@kms_async_flips@invalid-async-flip-atomic@pipe-a-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.39] s * igt@kms_async_flips@invalid-async-flip-atomic@pipe-b-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.10] s * igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.11] s * igt@kms_async_flips@invalid-async-flip-atomic@pipe-d-hdmi-a-4: - Statuses : 1 pass(s) - Exec time: [0.11] s Known issues ------------ Here are the changes found in Patchwork_158651v3_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@device_reset@cold-reset-bound: - shard-rkl: NOTRUN -> [SKIP][1] ([i915#11078]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@device_reset@cold-reset-bound.html * igt@gem_basic@multigpu-create-close: - shard-tglu: NOTRUN -> [SKIP][2] ([i915#7697]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@gem_basic@multigpu-create-close.html * igt@gem_ctx_persistence@heartbeat-close: - shard-mtlp: NOTRUN -> [SKIP][3] ([i915#8555]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_ctx_persistence@heartbeat-close.html * igt@gem_ctx_persistence@heartbeat-stop: - shard-dg2: NOTRUN -> [SKIP][4] ([i915#8555]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_ctx_persistence@heartbeat-stop.html * igt@gem_ctx_persistence@legacy-engines-hang: - shard-snb: NOTRUN -> [SKIP][5] ([i915#1099]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-snb4/igt@gem_ctx_persistence@legacy-engines-hang.html * igt@gem_eio@suspend: - shard-dg2: NOTRUN -> [ABORT][6] ([i915#15131]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@gem_eio@suspend.html * igt@gem_exec_balancer@bonded-sync: - shard-dg2: NOTRUN -> [SKIP][7] ([i915#4771]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_exec_balancer@bonded-sync.html * igt@gem_exec_balancer@bonded-true-hang: - shard-mtlp: NOTRUN -> [SKIP][8] ([i915#4812]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_exec_balancer@bonded-true-hang.html * igt@gem_exec_balancer@parallel-keep-in-fence: - shard-rkl: NOTRUN -> [SKIP][9] ([i915#4525]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gem_exec_balancer@parallel-keep-in-fence.html * igt@gem_exec_balancer@parallel-ordering: - shard-tglu-1: NOTRUN -> [SKIP][10] ([i915#4525]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_balancer@sliced: - shard-dg2: NOTRUN -> [SKIP][11] ([i915#4812]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_exec_balancer@sliced.html * igt@gem_exec_flush@basic-wb-ro-before-default: - shard-dg2: NOTRUN -> [SKIP][12] ([i915#3539] / [i915#4852]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@gem_exec_flush@basic-wb-ro-before-default.html * igt@gem_exec_reloc@basic-cpu-wc-noreloc: - shard-dg2: NOTRUN -> [SKIP][13] ([i915#3281]) +2 other tests skip [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_exec_reloc@basic-cpu-wc-noreloc.html * igt@gem_exec_reloc@basic-wc-gtt-noreloc: - shard-mtlp: NOTRUN -> [SKIP][14] ([i915#3281]) +1 other test skip [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_exec_reloc@basic-wc-gtt-noreloc.html * igt@gem_exec_reloc@basic-write-read: - shard-rkl: NOTRUN -> [SKIP][15] ([i915#3281]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gem_exec_reloc@basic-write-read.html * igt@gem_exec_schedule@reorder-wide: - shard-dg2: NOTRUN -> [SKIP][16] ([i915#4537] / [i915#4812]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@gem_exec_schedule@reorder-wide.html * igt@gem_lmem_swapping@massive-random: - shard-rkl: NOTRUN -> [SKIP][17] ([i915#4613]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gem_lmem_swapping@massive-random.html * igt@gem_lmem_swapping@parallel-random-engines: - shard-tglu: NOTRUN -> [SKIP][18] ([i915#4613]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@gem_lmem_swapping@parallel-random-engines.html * igt@gem_lmem_swapping@random: - shard-glk: NOTRUN -> [SKIP][19] ([i915#4613]) +2 other tests skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@gem_lmem_swapping@random.html * igt@gem_mmap@bad-offset: - shard-mtlp: NOTRUN -> [SKIP][20] ([i915#4083]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_mmap@bad-offset.html * igt@gem_mmap_gtt@basic-small-copy-xy: - shard-mtlp: NOTRUN -> [SKIP][21] ([i915#4077]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_mmap_gtt@basic-small-copy-xy.html * igt@gem_mmap_gtt@big-copy-xy: - shard-dg2: NOTRUN -> [SKIP][22] ([i915#4077]) +2 other tests skip [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_mmap_gtt@big-copy-xy.html * igt@gem_mmap_wc@fault-concurrent: - shard-dg2: NOTRUN -> [SKIP][23] ([i915#4083]) +2 other tests skip [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_mmap_wc@fault-concurrent.html * igt@gem_pread@bench: - shard-rkl: NOTRUN -> [SKIP][24] ([i915#3282]) +2 other tests skip [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gem_pread@bench.html * igt@gem_pread@uncached: - shard-dg2: NOTRUN -> [SKIP][25] ([i915#3282]) +1 other test skip [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_pread@uncached.html * igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs: - shard-dg2: NOTRUN -> [SKIP][26] ([i915#5190] / [i915#8428]) +1 other test skip [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs.html * igt@gem_render_copy@y-tiled: - shard-mtlp: NOTRUN -> [SKIP][27] ([i915#8428]) +1 other test skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_render_copy@y-tiled.html * igt@gem_tiled_pread_pwrite: - shard-mtlp: NOTRUN -> [SKIP][28] ([i915#4079]) +2 other tests skip [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_tiled_pread_pwrite.html * igt@gem_userptr_blits@invalid-mmap-offset-unsync: - shard-tglu: NOTRUN -> [SKIP][29] ([i915#3297]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html * igt@gem_userptr_blits@readonly-unsync: - shard-dg2: NOTRUN -> [SKIP][30] ([i915#3297]) +1 other test skip [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gem_userptr_blits@readonly-unsync.html * igt@gem_userptr_blits@unsync-overlap: - shard-rkl: NOTRUN -> [SKIP][31] ([i915#3297]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gem_userptr_blits@unsync-overlap.html * igt@gen9_exec_parse@allowed-all: - shard-dg2: NOTRUN -> [SKIP][32] ([i915#2856]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@gen9_exec_parse@allowed-all.html * igt@gen9_exec_parse@basic-rejected-ctx-param: - shard-mtlp: NOTRUN -> [SKIP][33] ([i915#2856]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gen9_exec_parse@basic-rejected-ctx-param.html - shard-tglu-1: NOTRUN -> [SKIP][34] ([i915#2527] / [i915#2856]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@gen9_exec_parse@basic-rejected-ctx-param.html * igt@gen9_exec_parse@bb-large: - shard-tglu: NOTRUN -> [SKIP][35] ([i915#2527] / [i915#2856]) +1 other test skip [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@gen9_exec_parse@bb-large.html * igt@gen9_exec_parse@bb-start-far: - shard-rkl: NOTRUN -> [SKIP][36] ([i915#2527]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@gen9_exec_parse@bb-start-far.html * igt@i915_drm_fdinfo@all-busy-check-all: - shard-dg2: NOTRUN -> [SKIP][37] ([i915#14123]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@i915_drm_fdinfo@all-busy-check-all.html * igt@i915_module_load@reload-with-fault-injection: - shard-rkl: [PASS][38] -> [ABORT][39] ([i915#15342]) [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-1/igt@i915_module_load@reload-with-fault-injection.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-5/igt@i915_module_load@reload-with-fault-injection.html - shard-tglu: [PASS][40] -> [ABORT][41] ([i915#15342]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-tglu-7/igt@i915_module_load@reload-with-fault-injection.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-8/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-tglu: [PASS][42] -> [WARN][43] ([i915#13790] / [i915#2681]) +1 other test warn [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-fence.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-3/igt@i915_pm_rc6_residency@rc6-fence.html * igt@i915_pm_rpm@system-suspend: - shard-rkl: [PASS][44] -> [INCOMPLETE][45] ([i915#13356]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@i915_pm_rpm@system-suspend.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-4/igt@i915_pm_rpm@system-suspend.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-glk: NOTRUN -> [INCOMPLETE][46] ([i915#13356] / [i915#15172]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk5/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@i915_pm_rps@engine-order: - shard-mtlp: [PASS][47] -> [FAIL][48] ([i915#15320]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-mtlp-2/igt@i915_pm_rps@engine-order.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-4/igt@i915_pm_rps@engine-order.html * igt@i915_query@hwconfig_table: - shard-rkl: NOTRUN -> [SKIP][49] ([i915#6245]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@i915_query@hwconfig_table.html * igt@i915_suspend@basic-s3-without-i915: - shard-tglu-1: NOTRUN -> [INCOMPLETE][50] ([i915#4817] / [i915#7443]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@i915_suspend@basic-s3-without-i915.html - shard-dg1: [PASS][51] -> [DMESG-WARN][52] ([i915#4391] / [i915#4423]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-18/igt@i915_suspend@basic-s3-without-i915.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-15/igt@i915_suspend@basic-s3-without-i915.html - shard-mtlp: NOTRUN -> [SKIP][53] ([i915#6645]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@i915_suspend@basic-s3-without-i915.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-glk: NOTRUN -> [INCOMPLETE][54] ([i915#4817]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk6/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@i915_suspend@forcewake: - shard-rkl: [PASS][55] -> [INCOMPLETE][56] ([i915#4817]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@i915_suspend@forcewake.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@i915_suspend@forcewake.html * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling: - shard-mtlp: NOTRUN -> [SKIP][57] ([i915#4212]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html * igt@kms_addfb_basic@clobberred-modifier: - shard-dg2: NOTRUN -> [SKIP][58] ([i915#4212]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_addfb_basic@clobberred-modifier.html * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-tglu-1: NOTRUN -> [SKIP][59] ([i915#1769] / [i915#3555]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html * igt@kms_big_fb@4-tiled-32bpp-rotate-180: - shard-tglu-1: NOTRUN -> [SKIP][60] ([i915#5286]) +1 other test skip [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html * igt@kms_big_fb@4-tiled-64bpp-rotate-270: - shard-dg2: NOTRUN -> [SKIP][61] +3 other tests skip [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html * igt@kms_big_fb@4-tiled-8bpp-rotate-90: - shard-rkl: NOTRUN -> [SKIP][62] ([i915#5286]) +3 other tests skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180: - shard-tglu: NOTRUN -> [SKIP][63] ([i915#5286]) +1 other test skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180.html * igt@kms_big_fb@y-tiled-8bpp-rotate-180: - shard-dg2: NOTRUN -> [SKIP][64] ([i915#4538] / [i915#5190]) +4 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-mtlp: NOTRUN -> [SKIP][65] +2 other tests skip [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip: - shard-tglu: NOTRUN -> [SKIP][66] +30 other tests skip [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][67] ([i915#14098] / [i915#6095]) +41 other tests skip [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-2.html * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][68] ([i915#10307] / [i915#10434] / [i915#6095]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-4/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs: - shard-tglu: NOTRUN -> [SKIP][69] ([i915#12313]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-c-hdmi-a-1: - shard-tglu: NOTRUN -> [SKIP][70] ([i915#6095]) +39 other tests skip [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-c-hdmi-a-1.html * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1: - shard-glk: NOTRUN -> [SKIP][71] +91 other tests skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2: - shard-rkl: NOTRUN -> [SKIP][72] ([i915#6095]) +69 other tests skip [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-a-edp-1: - shard-mtlp: NOTRUN -> [SKIP][73] ([i915#6095]) +19 other tests skip [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-a-edp-1.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-1: - shard-tglu-1: NOTRUN -> [SKIP][74] ([i915#6095]) +19 other tests skip [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-dp-3: - shard-dg2: NOTRUN -> [SKIP][75] ([i915#6095]) +12 other tests skip [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-dp-3.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs: - shard-rkl: NOTRUN -> [SKIP][76] ([i915#12313]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][77] ([i915#6095]) +99 other tests skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-dp-3: - shard-dg2: NOTRUN -> [SKIP][78] ([i915#10307] / [i915#6095]) +105 other tests skip [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-dp-3.html * igt@kms_cdclk@mode-transition-all-outputs: - shard-tglu: NOTRUN -> [SKIP][79] ([i915#3742]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_cdclk@mode-transition-all-outputs.html * igt@kms_chamelium_audio@dp-audio: - shard-mtlp: NOTRUN -> [SKIP][80] ([i915#11151] / [i915#7828]) +1 other test skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_chamelium_audio@dp-audio.html * igt@kms_chamelium_frames@hdmi-crc-fast: - shard-dg2: NOTRUN -> [SKIP][81] ([i915#11151] / [i915#7828]) +2 other tests skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_chamelium_frames@hdmi-crc-fast.html * igt@kms_chamelium_hpd@dp-hpd: - shard-rkl: NOTRUN -> [SKIP][82] ([i915#11151] / [i915#7828]) +3 other tests skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_chamelium_hpd@dp-hpd.html * igt@kms_chamelium_hpd@dp-hpd-after-suspend: - shard-tglu-1: NOTRUN -> [SKIP][83] ([i915#11151] / [i915#7828]) +2 other tests skip [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode: - shard-tglu: NOTRUN -> [SKIP][84] ([i915#11151] / [i915#7828]) +2 other tests skip [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html * igt@kms_content_protection@atomic@pipe-a-dp-3: - shard-dg2: NOTRUN -> [FAIL][85] ([i915#7173]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_content_protection@atomic@pipe-a-dp-3.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-tglu-1: NOTRUN -> [SKIP][86] ([i915#3116] / [i915#3299]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_content_protection@dp-mst-lic-type-1.html - shard-mtlp: NOTRUN -> [SKIP][87] ([i915#3299]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@dp-mst-suspend-resume: - shard-tglu: NOTRUN -> [SKIP][88] ([i915#15330]) [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_content_protection@dp-mst-suspend-resume.html * igt@kms_content_protection@mei-interface: - shard-tglu-1: NOTRUN -> [SKIP][89] ([i915#6944] / [i915#9424]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_content_protection@mei-interface.html - shard-mtlp: NOTRUN -> [SKIP][90] ([i915#8063] / [i915#9433]) [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_content_protection@mei-interface.html * igt@kms_cursor_crc@cursor-onscreen-512x170: - shard-tglu: NOTRUN -> [SKIP][91] ([i915#13049]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_cursor_crc@cursor-onscreen-512x170.html * igt@kms_cursor_crc@cursor-onscreen-max-size: - shard-dg2: NOTRUN -> [SKIP][92] ([i915#3555]) +1 other test skip [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_cursor_crc@cursor-onscreen-max-size.html * igt@kms_cursor_crc@cursor-random-128x42: - shard-tglu: NOTRUN -> [FAIL][93] ([i915#13566]) +1 other test fail [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_cursor_crc@cursor-random-128x42.html * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1: - shard-rkl: NOTRUN -> [FAIL][94] ([i915#13566]) +5 other tests fail [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html * igt@kms_cursor_crc@cursor-random-256x85: - shard-tglu: [PASS][95] -> [FAIL][96] ([i915#13566]) +1 other test fail [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-tglu-10/igt@kms_cursor_crc@cursor-random-256x85.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-8/igt@kms_cursor_crc@cursor-random-256x85.html * igt@kms_cursor_crc@cursor-random-512x512: - shard-rkl: NOTRUN -> [SKIP][97] ([i915#13049]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_cursor_crc@cursor-random-512x512.html * igt@kms_cursor_crc@cursor-random-64x21: - shard-rkl: [PASS][98] -> [FAIL][99] ([i915#13566]) +2 other tests fail [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_cursor_crc@cursor-random-64x21.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_cursor_crc@cursor-random-64x21.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-mtlp: NOTRUN -> [SKIP][100] ([i915#9809]) +1 other test skip [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic: - shard-dg2: NOTRUN -> [SKIP][101] ([i915#13046] / [i915#5354]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy: - shard-rkl: NOTRUN -> [SKIP][102] +7 other tests skip [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions: - shard-rkl: NOTRUN -> [SKIP][103] ([i915#4103]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size: - shard-dg2: NOTRUN -> [SKIP][104] ([i915#4103] / [i915#4213]) [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html * igt@kms_dirtyfb@psr-dirtyfb-ioctl: - shard-dg2: NOTRUN -> [SKIP][105] ([i915#9833]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html * igt@kms_dp_aux_dev: - shard-tglu-1: NOTRUN -> [SKIP][106] ([i915#1257]) [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_dp_aux_dev.html * igt@kms_dsc@dsc-with-bpc: - shard-dg2: NOTRUN -> [SKIP][107] ([i915#3555] / [i915#3840]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_dsc@dsc-with-bpc.html * igt@kms_dsc@dsc-with-output-formats: - shard-tglu: NOTRUN -> [SKIP][108] ([i915#3555] / [i915#3840]) [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_dsc@dsc-with-output-formats.html * igt@kms_fbcon_fbt@psr-suspend: - shard-tglu: NOTRUN -> [SKIP][109] ([i915#3469]) [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_fbcon_fbt@psr-suspend.html - shard-mtlp: [PASS][110] -> [FAIL][111] ([i915#4767]) [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-mtlp-3/igt@kms_fbcon_fbt@psr-suspend.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-3/igt@kms_fbcon_fbt@psr-suspend.html * igt@kms_feature_discovery@psr1: - shard-dg2: NOTRUN -> [SKIP][112] ([i915#658]) [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-absolute-wf_vblank: - shard-dg2: NOTRUN -> [SKIP][113] ([i915#9934]) [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_flip@2x-absolute-wf_vblank.html * igt@kms_flip@2x-flip-vs-dpms: - shard-tglu: NOTRUN -> [SKIP][114] ([i915#3637] / [i915#9934]) +4 other tests skip [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_flip@2x-flip-vs-dpms.html * igt@kms_flip@2x-flip-vs-suspend: - shard-glk10: NOTRUN -> [INCOMPLETE][115] ([i915#12745] / [i915#4839]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk10/igt@kms_flip@2x-flip-vs-suspend.html * igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2: - shard-glk10: NOTRUN -> [INCOMPLETE][116] ([i915#4839]) [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk10/igt@kms_flip@2x-flip-vs-suspend@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#3637] / [i915#9934]) +1 other test skip [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html - shard-mtlp: NOTRUN -> [SKIP][118] ([i915#3637] / [i915#9934]) +1 other test skip [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@2x-wf_vblank-ts-check-interruptible: - shard-rkl: NOTRUN -> [SKIP][119] ([i915#9934]) +2 other tests skip [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling: - shard-tglu: NOTRUN -> [SKIP][120] ([i915#2672] / [i915#3555]) [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode: - shard-tglu: NOTRUN -> [SKIP][121] ([i915#2587] / [i915#2672]) +1 other test skip [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling: - shard-dg2: NOTRUN -> [SKIP][122] ([i915#2672] / [i915#3555]) +1 other test skip [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling: - shard-tglu: NOTRUN -> [SKIP][123] ([i915#2587] / [i915#2672] / [i915#3555]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling: - shard-tglu-1: NOTRUN -> [SKIP][124] ([i915#2587] / [i915#2672] / [i915#3555]) [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html - shard-mtlp: NOTRUN -> [SKIP][125] ([i915#2672] / [i915#3555] / [i915#8813]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-default-mode: - shard-mtlp: NOTRUN -> [SKIP][126] ([i915#2672] / [i915#8813]) [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode: - shard-tglu-1: NOTRUN -> [SKIP][127] ([i915#2587] / [i915#2672]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling: - shard-dg2: NOTRUN -> [SKIP][128] ([i915#2672] / [i915#3555] / [i915#5190]) +1 other test skip [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode: - shard-dg2: NOTRUN -> [SKIP][129] ([i915#2672]) +3 other tests skip [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt: - shard-tglu-1: NOTRUN -> [SKIP][130] +8 other tests skip [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-dg2: NOTRUN -> [SKIP][131] ([i915#5354]) +8 other tests skip [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt: - shard-dg2: NOTRUN -> [SKIP][132] ([i915#8708]) +8 other tests skip [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-wc: - shard-snb: NOTRUN -> [SKIP][133] +24 other tests skip [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-snb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu: - shard-mtlp: NOTRUN -> [SKIP][134] ([i915#1825]) +5 other tests skip [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4: - shard-tglu: NOTRUN -> [SKIP][135] ([i915#5439]) [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html * igt@kms_frontbuffer_tracking@pipe-fbc-rte: - shard-rkl: NOTRUN -> [SKIP][136] ([i915#9766]) [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt: - shard-rkl: NOTRUN -> [SKIP][137] ([i915#15102]) [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt: - shard-tglu-1: NOTRUN -> [SKIP][138] ([i915#15102]) +2 other tests skip [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu: - shard-tglu: NOTRUN -> [SKIP][139] ([i915#15102]) +11 other tests skip [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite: - shard-rkl: NOTRUN -> [SKIP][140] ([i915#15102] / [i915#3023]) +11 other tests skip [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-1p-rte: - shard-glk10: NOTRUN -> [SKIP][141] +82 other tests skip [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk10/igt@kms_frontbuffer_tracking@psr-1p-rte.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite: - shard-rkl: NOTRUN -> [SKIP][142] ([i915#1825]) +11 other tests skip [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt: - shard-mtlp: NOTRUN -> [SKIP][143] ([i915#8708]) +2 other tests skip [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render: - shard-dg2: NOTRUN -> [SKIP][144] ([i915#15102] / [i915#3458]) +8 other tests skip [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-render.html * igt@kms_hdr@static-swap: - shard-tglu: NOTRUN -> [SKIP][145] ([i915#3555] / [i915#8228]) +1 other test skip [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_hdr@static-swap.html * igt@kms_multipipe_modeset@basic-max-pipe-crc-check: - shard-rkl: NOTRUN -> [SKIP][146] ([i915#1839] / [i915#4816]) [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html * igt@kms_panel_fitting@atomic-fastset: - shard-dg2: NOTRUN -> [SKIP][147] ([i915#6301]) [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_panel_fitting@atomic-fastset.html * igt@kms_panel_fitting@legacy: - shard-tglu: NOTRUN -> [SKIP][148] ([i915#6301]) [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_panel_fitting@legacy.html * igt@kms_pipe_stress@stress-xrgb8888-yftiled: - shard-tglu: NOTRUN -> [SKIP][149] ([i915#14712]) [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html * igt@kms_plane@plane-panning-bottom-right-suspend: - shard-glk: NOTRUN -> [INCOMPLETE][150] ([i915#13026]) +1 other test incomplete [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@kms_plane@plane-panning-bottom-right-suspend.html * igt@kms_plane_alpha_blend@alpha-basic: - shard-glk: NOTRUN -> [FAIL][151] ([i915#12178]) [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@kms_plane_alpha_blend@alpha-basic.html * igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1: - shard-glk: NOTRUN -> [FAIL][152] ([i915#7862]) +1 other test fail [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@kms_plane_alpha_blend@alpha-basic@pipe-c-hdmi-a-1.html * igt@kms_plane_multiple@2x-tiling-y: - shard-rkl: NOTRUN -> [SKIP][153] ([i915#13958]) [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-y.html * igt@kms_plane_multiple@tiling-yf: - shard-rkl: NOTRUN -> [SKIP][154] ([i915#14259]) [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_plane_multiple@tiling-yf.html * igt@kms_plane_scaling@2x-scaler-multi-pipe: - shard-dg2: NOTRUN -> [SKIP][155] ([i915#13046] / [i915#5354] / [i915#9423]) [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_plane_scaling@2x-scaler-multi-pipe.html * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a: - shard-rkl: NOTRUN -> [SKIP][156] ([i915#15329]) +3 other tests skip [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-a.html * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers: - shard-dg1: [PASS][157] -> [DMESG-WARN][158] ([i915#4423]) +2 other tests dmesg-warn [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-17/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers.html [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-13/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-modifiers.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75: - shard-mtlp: NOTRUN -> [SKIP][159] ([i915#15329] / [i915#6953]) [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d: - shard-mtlp: NOTRUN -> [SKIP][160] ([i915#15329]) +3 other tests skip [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-d.html * igt@kms_pm_dc@dc5-psr: - shard-tglu-1: NOTRUN -> [SKIP][161] ([i915#9685]) [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_dc@dc5-retention-flops: - shard-dg2: NOTRUN -> [SKIP][162] ([i915#3828]) [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_pm_dc@dc5-retention-flops.html * igt@kms_pm_rpm@modeset-lpsp-stress: - shard-rkl: NOTRUN -> [SKIP][163] ([i915#15073]) [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress.html * igt@kms_pm_rpm@modeset-non-lpsp: - shard-rkl: [PASS][164] -> [SKIP][165] ([i915#15073]) [164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf: - shard-dg2: NOTRUN -> [SKIP][166] ([i915#11520]) +1 other test skip [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf: - shard-tglu: NOTRUN -> [SKIP][167] ([i915#11520]) +4 other tests skip [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf: - shard-tglu-1: NOTRUN -> [SKIP][168] ([i915#11520]) [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1: - shard-mtlp: NOTRUN -> [SKIP][169] ([i915#9808]) +1 other test skip [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1: - shard-mtlp: NOTRUN -> [SKIP][170] ([i915#12316]) +3 other tests skip [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1.html * igt@kms_psr2_sf@psr2-cursor-plane-update-sf: - shard-rkl: NOTRUN -> [SKIP][171] ([i915#11520]) +3 other tests skip [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html * igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf: - shard-glk10: NOTRUN -> [SKIP][172] ([i915#11520]) +2 other tests skip [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk10/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb: - shard-glk: NOTRUN -> [SKIP][173] ([i915#11520]) +1 other test skip [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html * igt@kms_psr2_su@page_flip-nv12: - shard-dg2: NOTRUN -> [SKIP][174] ([i915#9683]) [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-mtlp: NOTRUN -> [SKIP][175] ([i915#4348]) [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_psr2_su@page_flip-xrgb8888.html - shard-tglu-1: NOTRUN -> [SKIP][176] ([i915#9683]) [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@fbc-psr-sprite-mmap-gtt: - shard-tglu-1: NOTRUN -> [SKIP][177] ([i915#9732]) +3 other tests skip [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-1/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html * igt@kms_psr@fbc-psr-sprite-plane-move: - shard-tglu: NOTRUN -> [SKIP][178] ([i915#9732]) +10 other tests skip [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-8/igt@kms_psr@fbc-psr-sprite-plane-move.html * igt@kms_psr@fbc-psr2-primary-mmap-cpu: - shard-mtlp: NOTRUN -> [SKIP][179] ([i915#9688]) +4 other tests skip [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_psr@fbc-psr2-primary-mmap-cpu.html * igt@kms_psr@psr-primary-blt: - shard-dg2: NOTRUN -> [SKIP][180] ([i915#1072] / [i915#9732]) +5 other tests skip [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_psr@psr-primary-blt.html * igt@kms_psr@psr-sprite-plane-onoff: - shard-rkl: NOTRUN -> [SKIP][181] ([i915#1072] / [i915#9732]) +8 other tests skip [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_psr@psr-sprite-plane-onoff.html * igt@kms_rotation_crc@bad-pixel-format: - shard-dg2: NOTRUN -> [SKIP][182] ([i915#12755]) [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_rotation_crc@bad-pixel-format.html * igt@kms_rotation_crc@exhaust-fences: - shard-mtlp: NOTRUN -> [SKIP][183] ([i915#4235]) [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@kms_rotation_crc@exhaust-fences.html * igt@kms_scaling_modes@scaling-mode-none: - shard-tglu: NOTRUN -> [SKIP][184] ([i915#3555]) [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_scaling_modes@scaling-mode-none.html * igt@kms_setmode@invalid-clone-exclusive-crtc: - shard-rkl: NOTRUN -> [SKIP][185] ([i915#3555]) [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-7/igt@kms_setmode@invalid-clone-exclusive-crtc.html * igt@kms_vrr@flipline: - shard-dg2: NOTRUN -> [SKIP][186] ([i915#15243] / [i915#3555]) [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_vrr@flipline.html * igt@kms_vrr@seamless-rr-switch-drrs: - shard-tglu: NOTRUN -> [SKIP][187] ([i915#9906]) [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@kms_vrr@seamless-rr-switch-drrs.html * igt@perf_pmu@module-unload: - shard-glk: NOTRUN -> [FAIL][188] ([i915#14433]) [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-glk9/igt@perf_pmu@module-unload.html * igt@prime_vgem@basic-fence-mmap: - shard-dg2: NOTRUN -> [SKIP][189] ([i915#3708] / [i915#4077]) [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@prime_vgem@basic-fence-mmap.html * igt@prime_vgem@fence-flip-hang: - shard-dg2: NOTRUN -> [SKIP][190] ([i915#3708]) [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-10/igt@prime_vgem@fence-flip-hang.html * igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-6: - shard-tglu: NOTRUN -> [FAIL][191] ([i915#12910]) +9 other tests fail [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-9/igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-6.html * igt@sriov_basic@enable-vfs-autoprobe-on: - shard-dg2: NOTRUN -> [SKIP][192] ([i915#9917]) [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@sriov_basic@enable-vfs-autoprobe-on.html #### Possible fixes #### * igt@gem_ccs@suspend-resume: - shard-dg2: [INCOMPLETE][193] ([i915#13356]) -> [PASS][194] [193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-7/igt@gem_ccs@suspend-resume.html [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@gem_ccs@suspend-resume.html * igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0: - shard-dg2: [INCOMPLETE][195] ([i915#12392] / [i915#13356]) -> [PASS][196] [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-7/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html * igt@gem_mmap_offset@clear-via-pagefault: - shard-mtlp: [ABORT][197] ([i915#14809]) -> [PASS][198] +1 other test pass [197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-mtlp-4/igt@gem_mmap_offset@clear-via-pagefault.html [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-2/igt@gem_mmap_offset@clear-via-pagefault.html * igt@i915_pm_rpm@system-suspend: - shard-dg2: [ABORT][199] ([i915#15060]) -> [PASS][200] [199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-10/igt@i915_pm_rpm@system-suspend.html [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@i915_pm_rpm@system-suspend.html * igt@i915_selftest@live@workarounds: - shard-mtlp: [DMESG-FAIL][201] ([i915#12061]) -> [PASS][202] +1 other test pass [201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-mtlp-6/igt@i915_selftest@live@workarounds.html [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-mtlp-7/igt@i915_selftest@live@workarounds.html * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3: - shard-dg2: [FAIL][203] ([i915#5956]) -> [PASS][204] +3 other tests pass [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-8/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-3.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2: - shard-rkl: [INCOMPLETE][205] ([i915#12796]) -> [PASS][206] +1 other test pass [205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2.html [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2.html * igt@kms_flip@flip-vs-suspend: - shard-snb: [INCOMPLETE][207] ([i915#12314] / [i915#12745] / [i915#4839]) -> [PASS][208] [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-snb1/igt@kms_flip@flip-vs-suspend.html [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-snb7/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a1: - shard-snb: [INCOMPLETE][209] ([i915#12314] / [i915#4839]) -> [PASS][210] [209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-snb1/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-snb7/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html * igt@kms_hdr@invalid-metadata-sizes: - shard-dg2: [SKIP][211] ([i915#3555] / [i915#8228]) -> [PASS][212] [211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-6/igt@kms_hdr@invalid-metadata-sizes.html [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_hdr@invalid-metadata-sizes.html * igt@kms_plane_scaling@intel-max-src-size: - shard-rkl: [SKIP][213] ([i915#6953]) -> [PASS][214] [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_plane_scaling@intel-max-src-size.html [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size.html * igt@kms_pm_rpm@dpms-non-lpsp: - shard-rkl: [SKIP][215] ([i915#15073]) -> [PASS][216] +1 other test pass [215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-5/igt@kms_pm_rpm@dpms-non-lpsp.html [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_pm_rpm@dpms-non-lpsp.html #### Warnings #### * igt@gem_ccs@ctrl-surf-copy-new-ctx: - shard-rkl: [SKIP][217] ([i915#9323]) -> [SKIP][218] ([i915#14544] / [i915#9323]) [217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@gem_ccs@ctrl-surf-copy-new-ctx.html [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_ccs@ctrl-surf-copy-new-ctx.html * igt@gem_exec_balancer@parallel-ordering: - shard-rkl: [SKIP][219] ([i915#14544] / [i915#4525]) -> [SKIP][220] ([i915#4525]) [219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@gem_exec_balancer@parallel-ordering.html [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_capture@capture-invisible: - shard-rkl: [SKIP][221] ([i915#6334]) -> [SKIP][222] ([i915#14544] / [i915#6334]) +1 other test skip [221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_exec_capture@capture-invisible.html [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_exec_capture@capture-invisible.html * igt@gem_exec_capture@capture-recoverable: - shard-rkl: [SKIP][223] ([i915#6344]) -> [SKIP][224] ([i915#14544] / [i915#6344]) [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_exec_capture@capture-recoverable.html [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_exec_capture@capture-recoverable.html * igt@gem_exec_reloc@basic-gtt-cpu-active: - shard-rkl: [SKIP][225] ([i915#14544] / [i915#3281]) -> [SKIP][226] ([i915#3281]) +1 other test skip [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@gem_exec_reloc@basic-gtt-cpu-active.html [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@gem_exec_reloc@basic-gtt-cpu-active.html * igt@gem_exec_reloc@basic-write-gtt: - shard-rkl: [SKIP][227] ([i915#3281]) -> [SKIP][228] ([i915#14544] / [i915#3281]) +4 other tests skip [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_exec_reloc@basic-write-gtt.html [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_exec_reloc@basic-write-gtt.html * igt@gem_lmem_swapping@heavy-verify-multi: - shard-rkl: [SKIP][229] ([i915#4613]) -> [SKIP][230] ([i915#14544] / [i915#4613]) [229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-multi.html [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-multi.html * igt@gem_media_vme: - shard-rkl: [SKIP][231] ([i915#284]) -> [SKIP][232] ([i915#14544] / [i915#284]) [231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_media_vme.html [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_media_vme.html * igt@gem_pwrite@basic-exhaustion: - shard-rkl: [SKIP][233] ([i915#3282]) -> [SKIP][234] ([i915#14544] / [i915#3282]) +3 other tests skip [233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_pwrite@basic-exhaustion.html [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_pwrite@basic-exhaustion.html * igt@gem_set_tiling_vs_blt@tiled-to-untiled: - shard-rkl: [SKIP][235] ([i915#14544] / [i915#8411]) -> [SKIP][236] ([i915#8411]) [235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html * igt@gem_set_tiling_vs_pwrite: - shard-rkl: [SKIP][237] ([i915#14544] / [i915#3282]) -> [SKIP][238] ([i915#3282]) +1 other test skip [237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@gem_set_tiling_vs_pwrite.html * igt@gem_userptr_blits@unsync-unmap-after-close: - shard-rkl: [SKIP][239] ([i915#3297]) -> [SKIP][240] ([i915#14544] / [i915#3297]) [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gem_userptr_blits@unsync-unmap-after-close.html [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gem_userptr_blits@unsync-unmap-after-close.html * igt@gen9_exec_parse@basic-rejected-ctx-param: - shard-rkl: [SKIP][241] ([i915#14544] / [i915#2527]) -> [SKIP][242] ([i915#2527]) [241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@gen9_exec_parse@basic-rejected-ctx-param.html [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@gen9_exec_parse@basic-rejected-ctx-param.html * igt@gen9_exec_parse@valid-registers: - shard-rkl: [SKIP][243] ([i915#2527]) -> [SKIP][244] ([i915#14544] / [i915#2527]) +3 other tests skip [243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@gen9_exec_parse@valid-registers.html [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@gen9_exec_parse@valid-registers.html * igt@i915_module_load@reload-with-fault-injection: - shard-dg2: [ABORT][245] ([i915#15342]) -> [ABORT][246] ([i915#13447] / [i915#15342]) [245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-3/igt@i915_module_load@reload-with-fault-injection.html [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_freq_api@freq-reset-multiple: - shard-rkl: [SKIP][247] ([i915#8399]) -> [SKIP][248] ([i915#14544] / [i915#8399]) [247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@i915_pm_freq_api@freq-reset-multiple.html [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@i915_pm_freq_api@freq-reset-multiple.html * igt@kms_atomic@plane-primary-overlay-mutable-zpos: - shard-rkl: [SKIP][249] ([i915#9531]) -> [SKIP][250] ([i915#14544] / [i915#9531]) [249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-rkl: [SKIP][251] ([i915#14544] / [i915#1769] / [i915#3555]) -> [SKIP][252] ([i915#1769] / [i915#3555]) [251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html * igt@kms_big_fb@4-tiled-32bpp-rotate-0: - shard-rkl: [SKIP][253] ([i915#5286]) -> [SKIP][254] ([i915#14544] / [i915#5286]) +2 other tests skip [253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html * igt@kms_big_fb@4-tiled-32bpp-rotate-180: - shard-rkl: [SKIP][255] ([i915#14544] / [i915#5286]) -> [SKIP][256] ([i915#5286]) +1 other test skip [255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html * igt@kms_big_fb@linear-64bpp-rotate-90: - shard-rkl: [SKIP][257] ([i915#3638]) -> [SKIP][258] ([i915#14544] / [i915#3638]) +1 other test skip [257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-90.html [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html * igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs: - shard-rkl: [SKIP][259] ([i915#14098] / [i915#6095]) -> [SKIP][260] ([i915#14098] / [i915#14544] / [i915#6095]) +13 other tests skip [259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs.html * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs: - shard-rkl: [SKIP][261] ([i915#12313]) -> [SKIP][262] ([i915#12313] / [i915#14544]) +1 other test skip [261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2: - shard-rkl: [SKIP][263] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][264] ([i915#14098] / [i915#6095]) +7 other tests skip [263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2: - shard-rkl: [SKIP][265] ([i915#14544] / [i915#6095]) -> [SKIP][266] ([i915#6095]) +6 other tests skip [265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2: - shard-rkl: [SKIP][267] ([i915#6095]) -> [SKIP][268] ([i915#14544] / [i915#6095]) +12 other tests skip [267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode: - shard-rkl: [SKIP][269] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][270] ([i915#11151] / [i915#7828]) +2 other tests skip [269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html * igt@kms_chamelium_hpd@vga-hpd-after-suspend: - shard-dg1: [SKIP][271] ([i915#11151] / [i915#7828]) -> [SKIP][272] ([i915#11151] / [i915#4423] / [i915#7828]) +2 other tests skip [271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-17/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-13/igt@kms_chamelium_hpd@vga-hpd-after-suspend.html * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe: - shard-rkl: [SKIP][273] ([i915#11151] / [i915#7828]) -> [SKIP][274] ([i915#11151] / [i915#14544] / [i915#7828]) +4 other tests skip [273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html * igt@kms_content_protection@atomic: - shard-dg2: [SKIP][275] ([i915#6944] / [i915#7118] / [i915#9424]) -> [FAIL][276] ([i915#7173]) [275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-6/igt@kms_content_protection@atomic.html [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_content_protection@atomic.html * igt@kms_content_protection@atomic-dpms: - shard-dg2: [FAIL][277] ([i915#7173]) -> [SKIP][278] ([i915#6944] / [i915#7118] / [i915#9424]) [277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-11/igt@kms_content_protection@atomic-dpms.html [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-3/igt@kms_content_protection@atomic-dpms.html * igt@kms_content_protection@dp-mst-lic-type-0: - shard-rkl: [SKIP][279] ([i915#3116]) -> [SKIP][280] ([i915#14544] / [i915#3116]) [279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_content_protection@dp-mst-lic-type-0.html [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-0.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-rkl: [SKIP][281] ([i915#14544] / [i915#3116]) -> [SKIP][282] ([i915#3116]) [281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-1.html [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@lic-type-0: - shard-rkl: [SKIP][283] ([i915#6944] / [i915#9424]) -> [SKIP][284] ([i915#14544] / [i915#6944] / [i915#9424]) [283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_content_protection@lic-type-0.html [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_content_protection@lic-type-0.html * igt@kms_content_protection@mei-interface: - shard-rkl: [SKIP][285] ([i915#14544] / [i915#6944] / [i915#9424]) -> [SKIP][286] ([i915#6944] / [i915#9424]) [285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_content_protection@mei-interface.html [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_content_protection@mei-interface.html * igt@kms_content_protection@type1: - shard-rkl: [SKIP][287] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][288] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) [287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_content_protection@type1.html [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_content_protection@type1.html * igt@kms_cursor_crc@cursor-onscreen-32x32: - shard-rkl: [SKIP][289] ([i915#3555]) -> [SKIP][290] ([i915#14544] / [i915#3555]) [289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-32x32.html [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-32x32.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-rkl: [SKIP][291] ([i915#4103]) -> [SKIP][292] ([i915#14544] / [i915#4103]) [291]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot: - shard-rkl: [SKIP][293] ([i915#9067]) -> [SKIP][294] ([i915#14544] / [i915#9067]) [293]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc: - shard-rkl: [SKIP][295] ([i915#3555] / [i915#3804]) -> [SKIP][296] ([i915#14544] / [i915#3555] / [i915#3804]) [295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2: - shard-rkl: [SKIP][297] ([i915#3804]) -> [SKIP][298] ([i915#14544] / [i915#3804]) [297]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html * igt@kms_dp_aux_dev: - shard-rkl: [SKIP][299] ([i915#1257] / [i915#14544]) -> [SKIP][300] ([i915#1257]) [299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_dp_aux_dev.html [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_dp_aux_dev.html * igt@kms_dp_link_training@uhbr-mst: - shard-rkl: [SKIP][301] ([i915#13748]) -> [SKIP][302] ([i915#13748] / [i915#14544]) [301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_dp_link_training@uhbr-mst.html [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_dp_link_training@uhbr-mst.html * igt@kms_feature_discovery@display-3x: - shard-rkl: [SKIP][303] ([i915#1839]) -> [SKIP][304] ([i915#14544] / [i915#1839]) +1 other test skip [303]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_feature_discovery@display-3x.html [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_feature_discovery@display-3x.html * igt@kms_feature_discovery@psr1: - shard-rkl: [SKIP][305] ([i915#658]) -> [SKIP][306] ([i915#14544] / [i915#658]) [305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_feature_discovery@psr1.html [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_feature_discovery@psr1.html * igt@kms_flip@2x-dpms-vs-vblank-race: - shard-dg1: [SKIP][307] ([i915#9934]) -> [SKIP][308] ([i915#4423] / [i915#9934]) [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-12/igt@kms_flip@2x-dpms-vs-vblank-race.html [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-19/igt@kms_flip@2x-dpms-vs-vblank-race.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset: - shard-rkl: [SKIP][309] ([i915#14544] / [i915#9934]) -> [SKIP][310] ([i915#9934]) +1 other test skip [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset: - shard-rkl: [SKIP][311] ([i915#9934]) -> [SKIP][312] ([i915#14544] / [i915#9934]) +6 other tests skip [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling: - shard-rkl: [SKIP][313] ([i915#14544] / [i915#2672] / [i915#3555]) -> [SKIP][314] ([i915#2672] / [i915#3555]) [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode: - shard-rkl: [SKIP][315] ([i915#14544] / [i915#2672]) -> [SKIP][316] ([i915#2672]) [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite: - shard-dg1: [SKIP][317] -> [SKIP][318] ([i915#4423]) +2 other tests skip [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-16/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt: - shard-rkl: [SKIP][319] ([i915#15102]) -> [SKIP][320] ([i915#14544] / [i915#15102]) +1 other test skip [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt: - shard-rkl: [SKIP][321] -> [SKIP][322] ([i915#14544]) +11 other tests skip [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-indfb-fliptrack-mmap-gtt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt: - shard-rkl: [SKIP][323] ([i915#1825]) -> [SKIP][324] ([i915#14544] / [i915#1825]) +24 other tests skip [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-dg1: [SKIP][325] ([i915#15102] / [i915#3458] / [i915#4423]) -> [SKIP][326] ([i915#15102] / [i915#3458]) [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-cpu: - shard-rkl: [SKIP][327] ([i915#14544] / [i915#1825]) -> [SKIP][328] ([i915#1825]) +7 other tests skip [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-cpu.html [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite: - shard-rkl: [SKIP][329] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][330] ([i915#15102] / [i915#3023]) +5 other tests skip [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-slowdraw: - shard-dg2: [SKIP][331] ([i915#15102] / [i915#3458]) -> [SKIP][332] ([i915#10433] / [i915#15102] / [i915#3458]) +1 other test skip [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-slowdraw.html [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-slowdraw.html * igt@kms_frontbuffer_tracking@psr-suspend: - shard-rkl: [SKIP][333] ([i915#15102] / [i915#3023]) -> [SKIP][334] ([i915#14544] / [i915#15102] / [i915#3023]) +11 other tests skip [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-suspend.html [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_hdr@brightness-with-hdr: - shard-dg2: [SKIP][335] ([i915#12713]) -> [SKIP][336] ([i915#13331]) [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-dg2-6/igt@kms_hdr@brightness-with-hdr.html [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-dg2-11/igt@kms_hdr@brightness-with-hdr.html - shard-tglu: [SKIP][337] ([i915#12713]) -> [SKIP][338] ([i915#1187] / [i915#12713]) [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-tglu-4/igt@kms_hdr@brightness-with-hdr.html [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-2/igt@kms_hdr@brightness-with-hdr.html * igt@kms_joiner@basic-force-big-joiner: - shard-rkl: [SKIP][339] ([i915#12388] / [i915#14544]) -> [SKIP][340] ([i915#12388]) [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_joiner@basic-force-big-joiner.html [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_joiner@basic-force-big-joiner.html * igt@kms_joiner@basic-force-ultra-joiner: - shard-rkl: [SKIP][341] ([i915#12394]) -> [SKIP][342] ([i915#12394] / [i915#14544]) [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_joiner@basic-force-ultra-joiner.html [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_joiner@basic-force-ultra-joiner.html * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes: - shard-rkl: [SKIP][343] ([i915#14544]) -> [SKIP][344] +3 other tests skip [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html * igt@kms_plane_multiple@2x-tiling-none: - shard-rkl: [SKIP][345] ([i915#13958]) -> [SKIP][346] ([i915#13958] / [i915#14544]) [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-none.html [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-none.html * igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a: - shard-rkl: [SKIP][347] ([i915#15329]) -> [SKIP][348] ([i915#14544] / [i915#15329]) +7 other tests skip [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation@pipe-a.html * igt@kms_pm_backlight@brightness-with-dpms: - shard-rkl: [SKIP][349] ([i915#12343]) -> [SKIP][350] ([i915#12343] / [i915#14544]) [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_pm_backlight@brightness-with-dpms.html [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_pm_backlight@brightness-with-dpms.html * igt@kms_pm_dc@dc5-psr: - shard-rkl: [SKIP][351] ([i915#14544] / [i915#9685]) -> [SKIP][352] ([i915#9685]) [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_pm_dc@dc5-psr.html [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_dc@dc9-dpms: - shard-tglu: [SKIP][353] ([i915#15128]) -> [SKIP][354] ([i915#4281]) [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-tglu-2/igt@kms_pm_dc@dc9-dpms.html * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf: - shard-rkl: [SKIP][355] ([i915#11520] / [i915#14544]) -> [SKIP][356] ([i915#11520]) +2 other tests skip [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area: - shard-rkl: [SKIP][357] ([i915#11520]) -> [SKIP][358] ([i915#11520] / [i915#14544]) +3 other tests skip [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_su@page_flip-xrgb8888: - shard-rkl: [SKIP][359] ([i915#14544] / [i915#9683]) -> [SKIP][360] ([i915#9683]) [359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_psr2_su@page_flip-xrgb8888.html [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_psr2_su@page_flip-xrgb8888.html * igt@kms_psr@fbc-psr-sprite-mmap-gtt: - shard-rkl: [SKIP][361] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][362] ([i915#1072] / [i915#9732]) +3 other tests skip [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-3/igt@kms_psr@fbc-psr-sprite-mmap-gtt.html * igt@kms_psr@fbc-psr2-sprite-render: - shard-rkl: [SKIP][363] ([i915#1072] / [i915#9732]) -> [SKIP][364] ([i915#1072] / [i915#14544] / [i915#9732]) +11 other tests skip [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@kms_psr@fbc-psr2-sprite-render.html [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_psr@fbc-psr2-sprite-render.html * igt@kms_psr_stress_test@invalidate-primary-flip-overlay: - shard-rkl: [SKIP][365] ([i915#9685]) -> [SKIP][366] ([i915#14544] / [i915#9685]) [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html * igt@kms_vrr@flip-dpms: - shard-rkl: [SKIP][367] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][368] ([i915#15243] / [i915#3555]) [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-6/igt@kms_vrr@flip-dpms.html [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-4/igt@kms_vrr@flip-dpms.html * igt@kms_vrr@negative-basic: - shard-rkl: [SKIP][369] ([i915#3555] / [i915#9906]) -> [SKIP][370] ([i915#14544] / [i915#3555] / [i915#9906]) [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-3/igt@kms_vrr@negative-basic.html [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@kms_vrr@negative-basic.html * igt@prime_vgem@coherency-gtt: - shard-rkl: [SKIP][371] ([i915#3708]) -> [SKIP][372] ([i915#14544] / [i915#3708]) +1 other test skip [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@prime_vgem@coherency-gtt.html [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@prime_vgem@coherency-gtt.html * igt@sriov_basic@enable-vfs-bind-unbind-each: - shard-rkl: [SKIP][373] ([i915#9917]) -> [SKIP][374] ([i915#14544] / [i915#9917]) [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17657/shard-rkl-4/igt@sriov_basic@enable-vfs-bind-unbind-each.html [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/shard-rkl-6/igt@sriov_basic@enable-vfs-bind-unbind-each.html [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307 [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433 [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434 [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099 [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078 [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151 [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520 [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187 [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#12178]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12178 [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313 [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314 [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316 [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343 [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388 [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392 [i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394 [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257 [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713 [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745 [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755 [i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796 [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910 [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026 [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046 [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049 [i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331 [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356 [i915#13447]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13447 [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566 [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748 [i915#13790]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13790 [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958 [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098 [i915#14123]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14123 [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259 [i915#14433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14433 [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544 [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712 [i915#14809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14809 [i915#15060]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15060 [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073 [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102 [i915#15128]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15128 [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131 [i915#15172]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15172 [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243 [i915#15320]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15320 [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329 [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330 [i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342 [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839 [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527 [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2681 [i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284 [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023 [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282 [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299 [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469 [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638 [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708 [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742 [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804 [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083 [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213 [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235 [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281 [i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348 [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391 [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423 [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525 [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537 [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613 [i915#4767]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4767 [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771 [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812 [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816 [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817 [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839 [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852 [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190 [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286 [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354 [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439 [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956 [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095 [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245 [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301 [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334 [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344 [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658 [i915#6645]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6645 [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944 [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953 [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118 [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173 [i915#7443]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7443 [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697 [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828 [i915#7862]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7862 [i915#8063]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8063 [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228 [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399 [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411 [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428 [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555 [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708 [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813 [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067 [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323 [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423 [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424 [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433 [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531 [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683 [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685 [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688 [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732 [i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766 [i915#9808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9808 [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809 [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833 [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906 [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917 [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934 Build changes ------------- * Linux: CI_DRM_17657 -> Patchwork_158651v3 CI-20190529: 20190529 CI_DRM_17657: 474dafdcaf4e88df55d19684ff32a654ad0e8fd3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8662: 9410b6926f317e8bf824502394e09ee8753ff65e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_158651v3: 474dafdcaf4e88df55d19684ff32a654ad0e8fd3 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_158651v3/index.html [-- Attachment #2: Type: text/html, Size: 132772 bytes --] ^ permalink raw reply [flat|nested] 51+ messages in thread
end of thread, other threads:[~2025-12-11 3:23 UTC | newest]
Thread overview: 51+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala
2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
2025-12-09 10:23 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala
2025-12-09 10:26 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala
2025-12-09 10:27 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala
2025-12-09 10:28 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala
2025-12-09 10:29 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala
2025-12-09 10:32 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala
2025-12-09 10:35 ` Jani Nikula
2025-12-09 12:17 ` Ville Syrjälä
2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala
2025-12-09 10:39 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala
2025-12-09 10:40 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala
2025-12-09 10:47 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala
2025-12-09 10:49 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala
2025-12-09 10:52 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala
2025-12-09 10:53 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala
2025-12-08 21:07 ` kernel test robot
2025-12-08 21:18 ` kernel test robot
2025-12-08 22:22 ` kernel test robot
2025-12-09 7:55 ` [PATCH v2 " Ville Syrjala
2025-12-09 10:55 ` Jani Nikula
2025-12-10 14:13 ` [PATCH " kernel test robot
2025-12-10 14:24 ` kernel test robot
2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala
2025-12-09 10:56 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala
2025-12-09 10:57 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala
2025-12-09 10:58 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala
2025-12-09 11:00 ` Jani Nikula
2025-12-09 11:01 ` Jani Nikula
2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala
2025-12-09 11:03 ` Jani Nikula
2025-12-08 19:11 ` ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork
2025-12-09 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork
2025-12-10 19:14 ` ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) Patchwork
2025-12-11 3:23 ` ✓ i915.CI.Full: " Patchwork
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