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* [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess
@ 2025-12-08 18:26 Ville Syrjala
  2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
                   ` (22 more replies)
  0 siblings, 23 replies; 51+ messages in thread
From: Ville Syrjala @ 2025-12-08 18:26 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Another attempt at fixing the mess around VGA deocode. The
current GMCH_CTRL based stuff is a complete lie as the register
is locked on ILK+.

My original plan was to simply disable all legacy decoding in
intel_vga_disable() but that turned out not to work thanks to
one laptop that hangs when trying to reboot/shutdown. So I had
to come up with something a bit more clever (or possibly insane).

This has more or less been smoke tested on most of my laptops
in the gen2 to SNB range (all just have the iGPU), and various
desktop boards (i845,g4x,HSW,CFL) with some random Matrox
cards (PCI and PCIe) or DG2.

For the destop boards I tried to test all the possibilities:
- iGPU only
- dGPU only
- iGPU as primary + dGPU as secondary
- dGPU as primary + iGPU as secondary

Some boards disable VGA decoding on the secondary iGPU via
GMCH_CTRL, others leave both GPUs with VGA decoding enabled.
I don't think I was any case where VGA decoding was disabled
for a secondary dGPU, possibly because the bridge controls
achieve the same result effectively anyway.

I think I managed to cover most of the combinations, with
enoguh board swapping.

I also smoke tested UEFI boot on the HSW and CFL boards. And in
fact the CFL board wouldn't even POST with CSM enabled so that's
the only thing I tested there.

Ville Syrjälä (19):
  drm/i915/vga: Register vgaarb client later
  drm/i915/vga: Get rid of intel_vga_reset_io_mem()
  drm/i915/power: Remove i915_power_well_desc::has_vga
  drm/i915/vga: Extract intel_gmch_ctrl_reg()
  drm/i915/vga: Don't touch VGA registers if VGA decode is fully
    disabled
  drm/i915/vga: Clean up VGA registers even if VGA plane is disabled
  drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs
  drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control
  drm/i915/vga: Assert that VGA register accesses are going to the
    right GPU
  drm/i915/de: Simplify intel_de_read8()
  drm/i915/de: Add intel_de_write8()
  drm/i915/vga: Introduce intel_vga_{read,write}()
  drm/i915/vga: Use MMIO for VGA registers on pre-g4x
  video/vga: Add VGA_IS0_R
  drm/i915/crt: Use IS0_R instead of VGA_MIS_W
  drm/i915/crt: Extract intel_crt_sense_above_threshold()
  drm/i915: Get rid of the INTEL_GMCH_CTRL alias
  drm/i915: Clean up PCI config space reg defines
  drm/i915: Document the GMCH_CTRL register a bit

 drivers/gpu/drm/i915/display/intel_crt.c      |  18 +-
 drivers/gpu/drm/i915/display/intel_crt_regs.h |   2 -
 drivers/gpu/drm/i915/display/intel_de.h       |  17 +-
 .../drm/i915/display/intel_display_driver.c   |  18 +-
 .../i915/display/intel_display_power_map.c    |  13 -
 .../i915/display/intel_display_power_well.c   |   8 +-
 .../i915/display/intel_display_power_well.h   |   2 -
 drivers/gpu/drm/i915/display/intel_vga.c      | 320 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_vga.h      |   5 +-
 .../drm/xe/compat-i915-headers/intel_uncore.h |   8 +
 drivers/gpu/drm/xe/xe_mmio.c                  |   9 +
 drivers/gpu/drm/xe/xe_mmio.h                  |   1 +
 include/drm/intel/i915_drm.h                  |  82 ++---
 include/video/vga.h                           |   2 +
 14 files changed, 336 insertions(+), 169 deletions(-)

-- 
2.51.2


^ permalink raw reply	[flat|nested] 51+ messages in thread

end of thread, other threads:[~2025-12-11  3:23 UTC | newest]

Thread overview: 51+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-12-08 18:26 [PATCH 00/19] drm/i915/vga: Try to sort out the VGA decode mess Ville Syrjala
2025-12-08 18:26 ` [PATCH 01/19] drm/i915/vga: Register vgaarb client later Ville Syrjala
2025-12-09 10:23   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 02/19] drm/i915/vga: Get rid of intel_vga_reset_io_mem() Ville Syrjala
2025-12-09 10:26   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 03/19] drm/i915/power: Remove i915_power_well_desc::has_vga Ville Syrjala
2025-12-09 10:27   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 04/19] drm/i915/vga: Extract intel_gmch_ctrl_reg() Ville Syrjala
2025-12-09 10:28   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 05/19] drm/i915/vga: Don't touch VGA registers if VGA decode is fully disabled Ville Syrjala
2025-12-09 10:29   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 06/19] drm/i915/vga: Clean up VGA registers even if VGA plane is disabled Ville Syrjala
2025-12-09 10:32   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 07/19] drm/i915/vga: Avoid VGA arbiter during intel_vga_disable() for iGPUs Ville Syrjala
2025-12-09 10:35   ` Jani Nikula
2025-12-09 12:17     ` Ville Syrjälä
2025-12-08 18:26 ` [PATCH 08/19] drm/i915/vga: Stop trying to use GMCH_CTRL for VGA decode control Ville Syrjala
2025-12-09 10:39   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 09/19] drm/i915/vga: Assert that VGA register accesses are going to the right GPU Ville Syrjala
2025-12-09 10:40   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 10/19] drm/i915/de: Simplify intel_de_read8() Ville Syrjala
2025-12-09 10:47   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 11/19] drm/i915/de: Add intel_de_write8() Ville Syrjala
2025-12-09 10:49   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 12/19] drm/i915/vga: Introduce intel_vga_{read,write}() Ville Syrjala
2025-12-09 10:52   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 13/19] drm/i915/vga: Use MMIO for VGA registers on pre-g4x Ville Syrjala
2025-12-09 10:53   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 14/19] video/vga: Add VGA_IS0_R Ville Syrjala
2025-12-08 21:07   ` kernel test robot
2025-12-08 21:18   ` kernel test robot
2025-12-08 22:22   ` kernel test robot
2025-12-09  7:55   ` [PATCH v2 " Ville Syrjala
2025-12-09 10:55     ` Jani Nikula
2025-12-10 14:13   ` [PATCH " kernel test robot
2025-12-10 14:24   ` kernel test robot
2025-12-08 18:26 ` [PATCH 15/19] drm/i915/crt: Use IS0_R instead of VGA_MIS_W Ville Syrjala
2025-12-09 10:56   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 16/19] drm/i915/crt: Extract intel_crt_sense_above_threshold() Ville Syrjala
2025-12-09 10:57   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 17/19] drm/i915: Get rid of the INTEL_GMCH_CTRL alias Ville Syrjala
2025-12-09 10:58   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 18/19] drm/i915: Clean up PCI config space reg defines Ville Syrjala
2025-12-09 11:00   ` Jani Nikula
2025-12-09 11:01   ` Jani Nikula
2025-12-08 18:26 ` [PATCH 19/19] drm/i915: Document the GMCH_CTRL register a bit Ville Syrjala
2025-12-09 11:03   ` Jani Nikula
2025-12-08 19:11 ` ✗ Fi.CI.BUILD: failure for drm/i915/vga: Try to sort out the VGA decode mess Patchwork
2025-12-09 11:31 ` ✗ i915.CI.BAT: failure for drm/i915/vga: Try to sort out the VGA decode mess (rev2) Patchwork
2025-12-10 19:14 ` ✓ i915.CI.BAT: success for drm/i915/vga: Try to sort out the VGA decode mess (rev3) Patchwork
2025-12-11  3:23 ` ✓ i915.CI.Full: " Patchwork

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